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switch to stm32f427, setup eth pins

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This commit is contained in:
Astro 2020-03-09 00:27:35 +01:00
parent 72b44b4b22
commit 2f50071afa
3 changed files with 39 additions and 5 deletions
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4
Cargo.toml
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@ -22,8 +22,8 @@ cortex-m = "0.6"
cortex-m-rt = { version = "0.6", features = ["device"] } cortex-m-rt = { version = "0.6", features = ["device"] }
cortex-m-log = { version = "0.5", features = ["log-integration"] } cortex-m-log = { version = "0.5", features = ["log-integration"] }
embedded-hal = "0.2" embedded-hal = "0.2"
stm32f4xx-hal = { version = "0.7", features = ["rt", "stm32f429"] } stm32f4xx-hal = { version = "0.7", features = ["rt", "stm32f427"] }
stm32-eth = { version = "0.1.2", features = ["smoltcp-phy", "nucleo-f429zi"], path = "../../stm32f4/stm32-eth" } stm32-eth = { version = "0.1.2", features = ["smoltcp-phy"], path = "../../stm32f4/stm32-eth" }
smoltcp = { version = "0.6.0", default-features = false, features = ["proto-ipv4", "socket-tcp", "log"] } smoltcp = { version = "0.6.0", default-features = false, features = ["proto-ipv4", "socket-tcp", "log"] }
hash2hwaddr = { version = "0.0", optional = true } hash2hwaddr = { version = "0.0", optional = true }

8
src/main.rs
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@ -25,6 +25,7 @@ use smoltcp::{
wire::EthernetAddress, wire::EthernetAddress,
}; };
mod pins;
mod adc_input; mod adc_input;
use adc_input::AdcInput; use adc_input::AdcInput;
mod net; mod net;
@ -100,9 +101,10 @@ fn main() -> ! {
let mut adc_input = AdcInput::new(dp.ADC1, gpioa.pa3); let mut adc_input = AdcInput::new(dp.ADC1, gpioa.pa3);
info!("Eth setup"); info!("Eth setup");
stm32_eth::setup_pins( pins::setup_ethernet(
gpioa.pa1, gpioa.pa2, gpioa.pa7, gpiob.pb13, gpioc.pc1, gpioa.pa1, gpioa.pa2, gpioc.pc1, gpioa.pa7,
gpioc.pc4, gpioc.pc5, gpiog.pg11, gpiog.pg13 gpioc.pc4, gpioc.pc5, gpiob.pb11, gpiog.pg13,
gpiob.pb13
); );
info!("Timer setup"); info!("Timer setup");

32
src/pins.rs Normal file
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@ -0,0 +1,32 @@
use stm32f4xx_hal::gpio::{
gpioa::{PA1, PA2, PA7},
gpiob::{PB11, PB13},
gpioc::{PC1, PC4, PC5},
gpiog::{PG13},
Speed::VeryHigh,
};
pub fn setup_ethernet<M1, M2, M3, M4, M5, M6, M7, M8, M9>(
pa1: PA1<M1>, pa2: PA2<M2>, pc1: PC1<M3>, pa7: PA7<M4>,
pc4: PC4<M5>, pc5: PC5<M6>, pb11: PB11<M7>, pg13: PG13<M8>,
pb13: PB13<M9>
) {
// PA1 RMII Reference Clock - SB13 ON
pa1.into_alternate_af11().set_speed(VeryHigh);
// PA2 RMII MDIO - SB160 ON
pa2.into_alternate_af11().set_speed(VeryHigh);
// PC1 RMII MDC - SB164 ON
pc1.into_alternate_af11().set_speed(VeryHigh);
// PA7 RMII RX Data Valid D11 JP6 ON
pa7.into_alternate_af11().set_speed(VeryHigh);
// PC4 RMII RXD0 - SB178 ON
pc4.into_alternate_af11().set_speed(VeryHigh);
// PC5 RMII RXD1 - SB181 ON
pc5.into_alternate_af11().set_speed(VeryHigh);
// PB11 RMII TX Enable - SB183 ON
pb11.into_alternate_af11().set_speed(VeryHigh);
// PG13 RXII TXD0 - SB182 ON
pg13.into_alternate_af11().set_speed(VeryHigh);
// PB13 RMII TXD1 I2S_A_CK JP7 ON
pb13.into_alternate_af11().set_speed(VeryHigh);
}