2024-01-16 15:22:11 +08:00
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use core::arch::asm;
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2021-01-18 16:59:13 +08:00
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use cortex_m_rt::pre_init;
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use stm32f4xx_hal::stm32::{RCC, SYSCFG};
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2021-01-13 11:59:06 +08:00
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const DFU_TRIG_MSG: u32 = 0xDECAFBAD;
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extern "C" {
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// This symbol comes from memory.x
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static mut _dfu_msg: u32;
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}
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pub unsafe fn set_dfu_trigger() {
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_dfu_msg = DFU_TRIG_MSG;
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}
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/// Called by reset handler in lib.rs immediately after reset.
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2024-10-14 11:52:15 +08:00
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/// This function should not be called outside of reset handler as
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2021-01-13 11:59:06 +08:00
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/// bootloader expects MCU to be in reset state when called.
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2021-01-16 11:04:24 +08:00
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#[cfg(target_arch = "arm")]
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2021-01-13 11:59:06 +08:00
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#[pre_init]
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unsafe fn __pre_init() {
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if _dfu_msg == DFU_TRIG_MSG {
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_dfu_msg = 0x00000000;
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// Enable system config controller clock
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2021-01-18 16:45:01 +08:00
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let rcc = &*RCC::ptr();
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rcc.apb2enr.modify(|_, w| w.syscfgen().set_bit());
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2021-01-13 11:59:06 +08:00
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// Bypass BOOT pins and remap bootloader to 0x00000000
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2024-10-14 11:52:15 +08:00
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let syscfg = &*SYSCFG::ptr();
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syscfg.memrm.write(|w| w.mem_mode().bits(0b01));
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2021-01-13 11:59:06 +08:00
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2021-01-18 16:45:01 +08:00
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// Impose instruction and memory barriers
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cortex_m::asm::isb();
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cortex_m::asm::dsb();
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2024-10-14 11:52:15 +08:00
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2021-01-13 11:59:06 +08:00
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asm!(
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// Set stack pointer to bootloader location
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"LDR R0, =0x1FFF0000",
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"LDR SP,[R0, #0]",
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// Jump to bootloader
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"LDR R0,[R0, #4]",
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"BX R0",
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);
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}
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2021-01-18 16:59:13 +08:00
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}
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