diff --git a/libboard_zynq/src/flash/mod.rs b/libboard_zynq/src/flash/mod.rs
index 4dd42aa6..d40568be 100644
--- a/libboard_zynq/src/flash/mod.rs
+++ b/libboard_zynq/src/flash/mod.rs
@@ -120,6 +120,7 @@ impl<MODE> Flash<MODE> {
     }
 
     fn wait_tx_fifo_flush(&mut self) {
+        self.regs.config.modify(|_, w| w.man_start_com(true));
         while !self.regs.intr_status.read().tx_fifo_not_full() {}
     }
 }
diff --git a/libboard_zynq/src/flash/transfer.rs b/libboard_zynq/src/flash/transfer.rs
index 6d761a8f..53f09963 100644
--- a/libboard_zynq/src/flash/transfer.rs
+++ b/libboard_zynq/src/flash/transfer.rs
@@ -47,7 +47,6 @@ impl<'a, Args: Iterator<Item = W>, W: Into<SpiWord>> Transfer<'a, Args, W> {
                 _ => {
                     if !self.flash.regs.intr_status.read().tx_fifo_not_full() {
                         // Flush if necessary
-                        self.flash.regs.config.modify(|_, w| w.man_start_com(true));
                         self.flash.wait_tx_fifo_flush();
                     }
 
@@ -74,7 +73,6 @@ impl<'a, Args: Iterator<Item = W>, W: Into<SpiWord>> Transfer<'a, Args, W> {
                         SpiWord::W32(_) => unreachable!(),
                     }
 
-                    self.flash.regs.config.modify(|_, w| w.man_start_com(true));
                     self.flash.wait_tx_fifo_flush();
                 }
             }