From 4159aab6c876264d90e8b48bbaef6a421d2e61fe Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Fri, 25 Jun 2021 16:26:04 +0800
Subject: [PATCH] i2c: conservative timing, avoid SCL/SDA races. Closes #83

---
 libboard_zynq/src/i2c/mod.rs | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/libboard_zynq/src/i2c/mod.rs b/libboard_zynq/src/i2c/mod.rs
index b75baa1..b0de0f1 100644
--- a/libboard_zynq/src/i2c/mod.rs
+++ b/libboard_zynq/src/i2c/mod.rs
@@ -150,6 +150,7 @@ impl I2c {
         self.sda_oe(true);
         self.half_period();
         self.scl_oe(true);
+        self.half_period();
         // postcondition: SCL and SDA low
         Ok(())
     }
@@ -188,6 +189,7 @@ impl I2c {
             self.scl_oe(false);
             self.half_period();
             self.scl_oe(true);
+            self.half_period();
         }
         self.sda_oe(false);
         self.half_period();
@@ -196,6 +198,7 @@ impl I2c {
         // Read ack/nack
         let ack = !self.sda_i();
         self.scl_oe(true);
+        self.half_period();
         self.sda_oe(true);
         // postcondition: SCL and SDA low