From 411eebd96cd9e400d55740b020dd56966437941b Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Sat, 19 Jun 2021 18:49:20 +0800
Subject: [PATCH] i2c: configure I2C_SW_RESET MIO on Kasli-SoC

---
 libboard_zynq/src/i2c/mod.rs | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/libboard_zynq/src/i2c/mod.rs b/libboard_zynq/src/i2c/mod.rs
index 57f201d..8290903 100644
--- a/libboard_zynq/src/i2c/mod.rs
+++ b/libboard_zynq/src/i2c/mod.rs
@@ -33,6 +33,17 @@ impl I2c {
                     .pullup(true)
                     .disable_rcvr(true)
             );
+            // On Kasli-SoC prototype, leakage through the unconfigured I2C_SW_RESET
+            // MIO pin develops enough voltage on the T21 gate to assert the reset.
+            // Configure the pin to avoid this problem.
+            #[cfg(feature = "target_kasli_soc")]
+            slcr.mio_pin_33.write(
+                slcr::MioPin33::zeroed()
+                    .l3_sel(0b000)
+                    .io_type(slcr::IoBufferType::Lvcmos33)
+                    .pullup(false)
+                    .disable_rcvr(true)
+            );
             // Reset
             slcr.gpio_rst_ctrl.reset_gpio();
         });