From 351d18c10f17b6adb29b559cd3568a0bde2d057d Mon Sep 17 00:00:00 2001 From: Astro Date: Mon, 20 May 2019 23:01:50 +0200 Subject: [PATCH] add register_at! macro --- src/regs.rs | 12 ++++++++++++ src/slcr.rs | 16 +++------------- src/uart/regs.rs | 17 +++-------------- 3 files changed, 18 insertions(+), 27 deletions(-) diff --git a/src/regs.rs b/src/regs.rs index 4363a47..e3a87a6 100644 --- a/src/regs.rs +++ b/src/regs.rs @@ -163,3 +163,15 @@ macro_rules! register_bits { } ); } + +#[macro_export] +macro_rules! register_at { + ($name: ident, $addr: expr, $ctor: ident) => ( + impl $name { + pub fn $ctor() -> &'static mut Self { + let addr = $addr as *mut Self; + unsafe { &mut *addr } + } + } + ) +} diff --git a/src/slcr.rs b/src/slcr.rs index 4f25e43..afb0a47 100644 --- a/src/slcr.rs +++ b/src/slcr.rs @@ -1,6 +1,6 @@ #[allow(unused)] -use crate::{register, register_bit, register_bits, regs::RegisterRW}; +use crate::{register, register_bit, register_bits, register_at, regs::RegisterW, regs::RegisterRW}; pub enum PllSource { IoPll = 0b00, @@ -13,13 +13,8 @@ register_bit!(uart_clk_ctrl, clkact0, 0); register_bit!(uart_clk_ctrl, clkact1, 1); register_bits!(uart_clk_ctrl, divisor, u8, 8, 13); register_bits!(uart_clk_ctrl, srcsel, u8, 4, 5); +register_at!(UartClkCtrl, 0xF8000154, new); impl UartClkCtrl { - const ADDR: *mut Self = 0xF8000154 as *mut _; - - pub fn new() -> &'static mut Self { - unsafe { &mut *Self::ADDR } - } - pub fn enable_uart0(&self) { self.modify(|_, w| { // a. Clock divisor, slcr.UART_CLK_CTRL[DIVISOR] = 0x14. @@ -37,13 +32,8 @@ register_bit!(uart_rst_ctrl, uart0_ref_rst, 3); register_bit!(uart_rst_ctrl, uart1_ref_rst, 2); register_bit!(uart_rst_ctrl, uart0_cpu1x_rst, 1); register_bit!(uart_rst_ctrl, uart1_cpu1x_rst, 0); +register_at!(UartRstCtrl, 0xF8000228, new); impl UartRstCtrl { - const ADDR: *mut Self = 0xF8000228 as *mut _; - - pub fn new() -> &'static mut Self { - unsafe { &mut *Self::ADDR } - } - pub fn reset_uart0(&self) { self.modify(|_, w| w.uart0_ref_rst(true)); self.modify(|_, w| w.uart0_ref_rst(false)); diff --git a/src/uart/regs.rs b/src/uart/regs.rs index e4c92b7..e842cd6 100644 --- a/src/uart/regs.rs +++ b/src/uart/regs.rs @@ -1,6 +1,6 @@ use volatile_register::{RO, WO, RW}; -use crate::{register, register_bit, register_bits, regs::*}; +use crate::{register, register_bit, register_bits, register_at, regs::*}; #[repr(C)] pub struct RegisterBlock { @@ -23,6 +23,8 @@ pub struct RegisterBlock { pub unused1: RO, pub tx_fifo_trigger_level: RW, } +register_at!(RegisterBlock, 0xE0000000, uart0); +register_at!(RegisterBlock, 0xE0001000, uart1); register!(control, Control, RW, u32); register_bit!(control, rxrst, 0); @@ -46,16 +48,3 @@ register_bits!(tx_rx_fifo, data, u32, 0, 31); register!(baud_rate_div, BaudRateDiv, RW, u32); register_bits!(baud_rate_div, bdiv, u8, 0, 7); - -impl RegisterBlock { - const UART0: *mut Self = 0xE0000000 as *mut _; - const UART1: *mut Self = 0xE0001000 as *mut _; - - pub fn uart0() -> &'static mut Self { - unsafe { &mut *Self::UART0 } - } - - pub fn uart1() -> &'static mut Self { - unsafe { &mut *Self::UART1 } - } -}