From bba16a693ec44a48bfb0a9b68dd5959dc2e866bd Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Sun, 5 Jul 2020 23:18:06 +0800 Subject: [PATCH] zynq: power-cycle ZC706 before running tests Like most trashy hardware of its kind, Zynq does not have a reliable reset. --- zynq.nix | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/zynq.nix b/zynq.nix index 1eef651..0bc9b85 100644 --- a/zynq.nix +++ b/zynq.nix @@ -29,12 +29,15 @@ in __networked = true; buildInputs = [ - pkgs.openssh pkgs.rsync artiq-fast.artiq + pkgs.netcat pkgs.openssh pkgs.rsync artiq-fast.artiq ]; phases = [ "buildPhase" ]; buildPhase = '' + (echo b; sleep 5; echo B) | nc -N 192.168.1.31 3131 + sleep 5 + export USER=hydra pushd ${} bash ${}/remote_run.sh -h rpi-4 -o "-F /dev/null -o StrictHostKeyChecking=no -o UserKnownHostsFile=/dev/null -o LogLevel=ERROR -i /opt/hydra_id_rsa" -d ${artiq-zynq.zc706-simple-jtag}