forked from M-Labs/nac3
nac3artiq: support ISA selection
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bfd041d361
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dceaf42500
@ -3,11 +3,13 @@ from functools import wraps
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import nac3artiq
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import nac3artiq
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import device_db
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__all__ = ["extern", "kernel"]
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__all__ = ["extern", "kernel"]
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nac3 = nac3artiq.NAC3()
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nac3 = nac3artiq.NAC3(device_db.device_db["core"]["arguments"]["target"])
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allow_module_registration = True
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allow_module_registration = True
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@ -24,10 +24,17 @@ use nac3core::{
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mod symbol_resolver;
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mod symbol_resolver;
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use symbol_resolver::*;
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use symbol_resolver::*;
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#[derive(Clone, Copy)]
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enum Isa {
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RiscV,
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CortexA9
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}
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// TODO: do we really want unsendable?
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// TODO: do we really want unsendable?
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// TopLevelComposer causes a lot of problems for Send.
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// TopLevelComposer causes a lot of problems for Send.
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#[pyclass(unsendable,name="NAC3")]
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#[pyclass(unsendable,name="NAC3")]
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struct Nac3 {
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struct Nac3 {
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isa: Isa,
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primitive: PrimitiveStore,
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primitive: PrimitiveStore,
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internal_resolver: Arc<ResolverInternal>,
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internal_resolver: Arc<ResolverInternal>,
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resolver: Arc<Box<dyn SymbolResolver + Send + Sync>>,
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resolver: Arc<Box<dyn SymbolResolver + Send + Sync>>,
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@ -39,7 +46,12 @@ struct Nac3 {
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#[pymethods]
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#[pymethods]
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impl Nac3 {
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impl Nac3 {
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#[new]
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#[new]
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fn new() -> Self {
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fn new(isa: &str) -> PyResult<Self> {
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let isa = match isa {
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"riscv" => Isa::RiscV,
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"cortexa9" => Isa::CortexA9,
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_ => return Err(exceptions::PyValueError::new_err("invalid ISA"))
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};
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let primitive: PrimitiveStore = TopLevelComposer::make_primitives().0;
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let primitive: PrimitiveStore = TopLevelComposer::make_primitives().0;
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let (composer, builtins_def, builtins_ty) = TopLevelComposer::new(vec![
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let (composer, builtins_def, builtins_ty) = TopLevelComposer::new(vec![
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("output_int".into(), FunSignature {
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("output_int".into(), FunSignature {
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@ -60,14 +72,15 @@ impl Nac3 {
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let resolver = Arc::new(
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let resolver = Arc::new(
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Box::new(Resolver(internal_resolver.clone())) as Box<dyn SymbolResolver + Send + Sync>
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Box::new(Resolver(internal_resolver.clone())) as Box<dyn SymbolResolver + Send + Sync>
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);
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);
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Nac3 {
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Ok(Nac3 {
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isa,
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primitive,
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primitive,
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internal_resolver,
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internal_resolver,
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resolver,
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resolver,
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composer,
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composer,
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top_level: None,
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top_level: None,
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registered_module_ids: HashSet::new()
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registered_module_ids: HashSet::new()
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}
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})
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}
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}
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fn register_module(&mut self, obj: PyObject) -> PyResult<()> {
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fn register_module(&mut self, obj: PyObject) -> PyResult<()> {
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@ -175,6 +188,7 @@ impl Nac3 {
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unifier: top_level.unifiers.read()[instance.unifier_id].clone(),
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unifier: top_level.unifiers.read()[instance.unifier_id].clone(),
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calls: instance.calls,
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calls: instance.calls,
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};
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};
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let isa = self.isa;
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let f = Arc::new(WithCall::new(Box::new(move |module| {
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let f = Arc::new(WithCall::new(Box::new(move |module| {
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let builder = PassManagerBuilder::create();
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let builder = PassManagerBuilder::create();
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builder.set_optimization_level(OptimizationLevel::Aggressive);
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builder.set_optimization_level(OptimizationLevel::Aggressive);
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@ -182,11 +196,10 @@ impl Nac3 {
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builder.populate_module_pass_manager(&passes);
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builder.populate_module_pass_manager(&passes);
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passes.run_on(module);
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passes.run_on(module);
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// For RISC-V (needs https://git.m-labs.hk/M-Labs/nac3/issues/24)
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let (triple, features) = match isa {
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//let triple = TargetTriple::create("riscv32-unknown-linux");
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Isa::RiscV => (TargetTriple::create("riscv32-unknown-linux"), "+a,+m"),
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//let features = "+a,+m";
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Isa::CortexA9 => (TargetTriple::create("armv7-unknown-linux-gnueabihf"), "+dsp,+fp16,+neon,+vfp3"),
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let triple = TargetTriple::create("armv7-unknown-linux-gnueabihf");
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};
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let features = "+dsp,+fp16,+neon,+vfp3";
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let target =
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let target =
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Target::from_triple(&triple).expect("couldn't create target from target triple");
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Target::from_triple(&triple).expect("couldn't create target from target triple");
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let target_machine = target
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let target_machine = target
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