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\input{preamble.tex}
\graphicspath{{images/5108}{images}}
\title{5108 ADC Sampler}
\author{M-Labs Limited}
\date{January 2022}
\revision{Revision 1}
\companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
\begin{document}
\maketitle
\section{Features}
\begin{itemize}
\item{8-channel ADC}
\item{16-bits resolution}
\item{1.5 MSPS simultaneously on all channels}
\item{Full scale input voltage, $\pm$10mV to $\pm$10V}
\item{BNC connector}
\item{SMA breakout with 5528 SMA-IDC adapter}
\end{itemize}
\section{Applications}
\begin{itemize}
\item{Sample intermediate-frequency (IF) waveform}
\item{Monitor laser power with a photodiode}
\item{Synchronize laser frequencies with a phase frequency detector}
\item{Form a laser intensity servo with 4410 Urukul}
\end{itemize}
\section{General Description}
The 5108 ADC Sampler is a 8hp EEM module, part of the ARTIQ/Sinara family. It adds analog-digital converting capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC. It can also be combined with 4410 DDS Urukul to form the ARTIQ SU-Servo configuration.
It provides eight analog-to-digital channels, exposed by eight BNC connectors. Each channel supports input voltage ranges from \textpm 10mV to \textpm 10V. All channels can be sampled simultaneously. Channels can broken out to SMA by adding a 5528 SMA-IDC card.
5108 ADC Sampler provides a sample rate of 1.5 MSPS. However, the sample rate in practice is typically limited by the use of ARTIQ-Python kernel code.
% Switch to next column
\vfill\break
\begin{figure}[h]
\centering
\scalebox{1}{
\begin{circuitikz}[european, scale=0.95, every label/.append style={align=center}]
% Node to pin-point the locations of BNC symbols
\draw[color=white, text=black] (-0.1, 1.225) node[twoportshape, circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (bnc0) {};
\draw[color=white, text=black] (-0.1, 0.875) node[twoportshape, circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (bnc1) {};
\draw[color=white, text=black] (-0.1, 0.525) node[twoportshape, circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (bnc2) {};
\draw[color=white, text=black] (-0.1, 0.175) node[twoportshape, circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (bnc3) {};
\draw[color=white, text=black] (-0.1, -0.175) node[twoportshape, circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (bnc4) {};
\draw[color=white, text=black] (-0.1, -0.525) node[twoportshape, circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (bnc5) {};
\draw[color=white, text=black] (-0.1, -0.875) node[twoportshape, circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (bnc6) {};
\draw[color=white, text=black] (-0.1, -1.225) node[twoportshape, circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (bnc7) {};
% Labels for BNC 0-7
\node [label=left:\tiny{IN 0}] at (0.35, 1.225) {};
\node [label=left:\tiny{IN 1}] at (0.35, 0.875) {};
\node [label=left:\tiny{IN 2}] at (0.35, 0.525) {};
\node [label=left:\tiny{IN 3}] at (0.35, 0.175) {};
\node [label=left:\tiny{IN 4}] at (0.35, -0.175) {};
\node [label=left:\tiny{IN 5}] at (0.35, -0.525) {};
\node [label=left:\tiny{IN 6}] at (0.35, -0.875) {};
\node [label=left:\tiny{IN 7}] at (0.35, -1.225) {};
% draw BNC 0-7
\begin{scope}[scale=0.07 , rotate=-90, xshift=2.5cm, yshift=2cm]
\draw (0,0.65) -- (0,3);
\clip (-1.5,0) rectangle (1.5,1.5);
\draw (0,0) circle(1.5);
\clip (-0.8,0) rectangle (0.8,0.8);
\draw (0,0) circle(0.8);
\end{scope}
\begin{scope}[scale=0.07 , rotate=-90, xshift=7.5cm, yshift=2cm]
\draw (0,0.65) -- (0,3);
\clip (-1.5,0) rectangle (1.5,1.5);
\draw (0,0) circle(1.5);
\clip (-0.8,0) rectangle (0.8,0.8);
\draw (0,0) circle(0.8);
\end{scope}
\begin{scope}[scale=0.07 , rotate=-90, xshift=12.5cm, yshift=2cm]
\draw (0,0.65) -- (0,3);
\clip (-1.5,0) rectangle (1.5,1.5);
\draw (0,0) circle(1.5);
\clip (-0.8,0) rectangle (0.8,0.8);
\draw (0,0) circle(0.8);
\end{scope}
\begin{scope}[scale=0.07 , rotate=-90, xshift=17.5cm, yshift=2cm]
\draw (0,0.65) -- (0,3);
\clip (-1.5,0) rectangle (1.5,1.5);
\draw (0,0) circle(1.5);
\clip (-0.8,0) rectangle (0.8,0.8);
\draw (0,0) circle(0.8);
\end{scope}
\begin{scope}[scale=0.07 , rotate=-90, xshift=-2.5cm, yshift=2cm]
\draw (0,0.65) -- (0,3);
\clip (-1.5,0) rectangle (1.5,1.5);
\draw (0,0) circle(1.5);
\clip (-0.8,0) rectangle (0.8,0.8);
\draw (0,0) circle(0.8);
\end{scope}
\begin{scope}[scale=0.07 , rotate=-90, xshift=-7.5cm, yshift=2cm]
\draw (0,0.65) -- (0,3);
\clip (-1.5,0) rectangle (1.5,1.5);
\draw (0,0) circle(1.5);
\clip (-0.8,0) rectangle (0.8,0.8);
\draw (0,0) circle(0.8);
\end{scope}
\begin{scope}[scale=0.07 , rotate=-90, xshift=-12.5cm, yshift=2cm]
\draw (0,0.65) -- (0,3);
\clip (-1.5,0) rectangle (1.5,1.5);
\draw (0,0) circle(1.5);
\clip (-0.8,0) rectangle (0.8,0.8);
\draw (0,0) circle(0.8);
\end{scope}
\begin{scope}[scale=0.07 , rotate=-90, xshift=-17.5cm, yshift=2cm]
\draw (0,0.65) -- (0,3);
\clip (-1.5,0) rectangle (1.5,1.5);
\draw (0,0) circle(1.5);
\clip (-0.8,0) rectangle (0.8,0.8);
\draw (0,0) circle(0.8);
\end{scope}
% Draw termination switches
\draw (1.0, 1.925) node[twoportshape,t=\fourcm{100k/50\textOmega}{Switch \phantom{s} x8}, circuitikz/bipoles/twoport/width=1.5, scale=0.5] (termswitch) {};
\begin{scope}[xshift=1.2cm, yshift=1.925cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
\draw (0.4,0) to[short,-o](0.75,0);
\draw (0.78,0)-- +(30:0.46);
\draw (1.25,0)to[short,o-](1.6,0) ;
\end{scope}
% Dwar IDC Port (ADC IN)
\draw (0.8, -1.925) node[twoportshape,t={IDC Port}, circuitikz/bipoles/twoport/width=1.5, scale=0.5] (idc) {};
% Draw PGIAs
% The connections are too complicated for the usual buffer/op-amp symbol
\draw (3, 2.45) node[twoportshape,t=\fourcm{CH 0}{PGIA}, circuitikz/bipoles/twoport/width=1.2, scale=0.5] (pgia0) {};
\draw (3, 1.75) node[twoportshape,t=\fourcm{CH 1}{PGIA}, circuitikz/bipoles/twoport/width=1.2, scale=0.5] (pgia1) {};
\draw (3, 1.05) node[twoportshape,t=\fourcm{CH 2}{PGIA}, circuitikz/bipoles/twoport/width=1.2, scale=0.5] (pgia2) {};
\draw (3, 0.35) node[twoportshape,t=\fourcm{CH 3}{PGIA}, circuitikz/bipoles/twoport/width=1.2, scale=0.5] (pgia3) {};
\draw (3, -0.35) node[twoportshape,t=\fourcm{CH 4}{PGIA}, circuitikz/bipoles/twoport/width=1.2, scale=0.5] (pgia4) {};
\draw (3, -1.05) node[twoportshape,t=\fourcm{CH 5}{PGIA}, circuitikz/bipoles/twoport/width=1.2, scale=0.5] (pgia5) {};
\draw (3, -1.75) node[twoportshape,t=\fourcm{CH 6}{PGIA}, circuitikz/bipoles/twoport/width=1.2, scale=0.5] (pgia6) {};
\draw (3, -2.45) node[twoportshape,t=\fourcm{CH 7}{PGIA}, circuitikz/bipoles/twoport/width=1.2, scale=0.5] (pgia7) {};
% Draw termination connection to input lines
\draw [-] (0.65, 1.675) -- (0.65, 1.225);
\draw [-] (0.75, 1.675) -- (0.75, 0.875);
\draw [-] (0.85, 1.675) -- (0.85, 0.525);
\draw [-] (0.95, 1.675) -- (0.95, 0.175);
\draw [-] (1.05, 1.675) -- (1.05, -0.175);
\draw [-] (1.15, 1.675) -- (1.15, -0.525);
\draw [-] (1.25, 1.675) -- (1.25, -0.875);
\draw [-] (1.35, 1.675) -- (1.35, -1.225);
% Draw IDC port (ADC IN) connection to input lines
\draw [-] (0.45, -1.675) -- (0.45, 1.225);
\draw [-] (0.55, -1.675) -- (0.55, 0.875);
\draw [-] (0.65, -1.675) -- (0.65, 0.525);
\draw [-] (0.75, -1.675) -- (0.75, 0.175);
\draw [-] (0.85, -1.675) -- (0.85, -0.175);
\draw [-] (0.95, -1.675) -- (0.95, -0.525);
\draw [-] (1.05, -1.675) -- (1.05, -0.875);
\draw [-] (1.15, -1.675) -- (1.15, -1.225);
% Connect BNC to PGIA, with termination line
\draw [-latexslim] (bnc0.east) -- (1.9, 1.225) -- (1.9, 2.45) -- (pgia0.west);
\draw [-latexslim] (bnc1.east) -- (2, 0.875) -- (2, 1.75) -- (pgia1.west);
\draw [-latexslim] (bnc2.east) -- (2.1, 0.525) -- (2.1, 1.05) -- (pgia2.west);
\draw [-latexslim] (bnc3.east) -- (2.2, 0.175) -- (2.2, 0.35) -- (pgia3.west);
\draw [-latexslim] (bnc4.east) -- (2.2, -0.175) -- (2.2, -0.35) -- (pgia4.west);
\draw [-latexslim] (bnc5.east) -- (2.1, -0.525) -- (2.1, -1.05) -- (pgia5.west);
\draw [-latexslim] (bnc6.east) -- (2, -0.875) -- (2, -1.75) -- (pgia6.west);
\draw [-latexslim] (bnc7.east) -- (1.9, -1.225) -- (1.9, -2.45) -- (pgia7.west);
% Draw shift register & ADC
\draw (4.7, 1) node[twoportshape,t=\fourcm{Shift}{Registers}, circuitikz/bipoles/twoport/width=1.6, scale=0.6, rotate=-90] (sr) {};
\draw (4.7, -1) node[twoportshape,t={ADC}, circuitikz/bipoles/twoport/width=1.6, scale=0.6, rotate=-90] (adc) {};
% Connect PGIA -> ADC paths
\draw [-] (3.45, 2.55) -- (4, 2.55) -- (4, -1);
\draw [-] (3.45, -2.35) -- (4, -2.35) -- (4, -1);
\draw [-] (3.45, 1.85) -- ++ (0.55, 0);
\draw [-] (3.45, 1.15) -- ++ (0.55, 0);
\draw [-] (3.45, 0.45) -- ++ (0.55, 0);
\draw [-] (3.45, -0.25) -- ++ (0.55, 0);
\draw [-latexslim] (3.45, -0.95) -- ++ (0.95, 0);
\draw [-] (3.45, -1.65) -- ++ (0.55, 0);
% Connect SR -> PGIA paths
\draw [latexslim-] (3.45, 2.35) -- (3.8, 2.35) -- (3.8, 1);
\draw [latexslim-] (3.45, -2.55) -- (3.8, -2.55) -- (3.8, 1);
\draw [latexslim-] (3.45, 1.65) -- ++ (0.35, 0);
\draw [latexslim-] (3.45, 0.95) -- ++ (0.95, 0);
\draw [latexslim-] (3.45, 0.25) -- ++ (0.35, 0);
\draw [latexslim-] (3.45, -0.45) -- ++ (0.35, 0);
\draw [latexslim-] (3.45, -1.15) -- ++ (0.35, 0);
\draw [latexslim-] (3.45, -1.85) -- ++ (0.35, 0);
% Draw LVDS transceivers & repeaters
\draw (6.3, 1) node[twoportshape,t=\fourcm{LVDS}{Transceivers}, circuitikz/bipoles/twoport/width=1.8, scale=0.6, rotate=-90] (lvds) {};
\draw (6.3, -1) node[twoportshape,t={Repeaters}, circuitikz/bipoles/twoport/width=1.8, scale=0.6, rotate=-90] (rep) {};
% ADC & SR connection lines
% Note: MISO line from shift register ignored, the repeater is omiited in some versions
% Also, that MISO line does not do anything useful. The ARTIQ driver implementation is just a huge data integrity check.
\draw [-latexslim] (6, 1.2) -- (5, 1.2);
\draw [-latexslim] (6, 0.8) -- (5.5, 0.8) -- (5.5, -0.8) -- (5, -0.8);
% Data comes out of the ADC, the only signal that goes in is the clock
\draw [-latexslim] (5, -1.2) -- (6, -1.2);
% Draw EEPROMs
\draw (6, 2.35) node[twoportshape,t={EEPROM}, circuitikz/bipoles/twoport/width=1.4, scale=0.6] (eeprom0) {};
\draw (6.3, -2.6) node[twoportshape,t={EEPROM}, circuitikz/bipoles/twoport/width=1.4, scale=0.6, rotate=-90] (eeprom1) {};
% Draw EEM 0 & 1
\draw (7.9, 1.9) node[twoportshape,t={EEM Port 0}, circuitikz/bipoles/twoport/width=3.4, scale=0.6, rotate=-90] (eem0) {};
\draw (7.9, -1.9) node[twoportshape,t={EEM Port 1}, circuitikz/bipoles/twoport/width=2.6, scale=0.6, rotate=-90] (eem1) {};
% Connect EEM Port 1
\draw [-latexslim] (6.6, -1.2) -- (7.6, -1.2);
\draw [latexslim-latexslim] (eeprom1.north) -- (7.6, -2.6);
% Connect EEM Port 0
\draw [-latexslim] (6.6, -0.8) -- (7.1, -0.8) -- (7.1, 0.8) -- (7.6, 0.8);
\draw [latexslim-] (6.6, 1.2) -- (7.6, 1.2);
\draw [latexslim-latexslim] (eeprom0.east) -- (7.6, 2.35);
% Draw IO Expander
\draw (3, 3.15) node[twoportshape,t={IO Expander}, circuitikz/bipoles/twoport/width=1.8, scale=0.5] (i2c) {};
% Connect IO Expander
\draw [-latexslim] (termswitch.north) -- (1, 3.15) -- (i2c.west);
\draw [-latexslim] (i2c.east) -- (7.6, 3.15);
% Stress that the termination status I2C interface is read-only
\node [label=center:\tiny{Read Only}] at (1.6, 3.25) {};
% State that PGIA stands for "Programmable Gain Instrumentation Amplifier"
% The name is too long, and there isn't any good places to mention this
\node [label=center:\tiny{Note: PGIA = Programmable Gain Instrumentation Amplifier}] at (3, -3) {};
\end{circuitikz}
}
\caption{Simplified Block Diagram}
\end{figure}
\begin{figure}[hbt!]
\centering
\includegraphics[height=2.3in]{photo5108.jpg}
\includegraphics[height=2.5in, angle=90]{Sampler_FP.jpg}
\caption{Sampler card and front panel}
\end{figure}
% For wide tables, a single column layout is better. It can be switched
% page-by-page.
\onecolumn
\sourcesection{5108 ADC Sampler}{https://github.com/sinara-hw/Sampler}
\section{Electrical Specifications}
\begin{table}[h]
\centering
\begin{threeparttable}
\caption{Input Specifications}
\begin{tabularx}{0.9\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Input voltage & -10 & & 10 & V & 1x gain, termination off* \\
& -1 & & 1 & V & 10x gain\\
& -100 & & 100 & mV & 100x gain\\
& -10 & & 10 & mV & 1000x gain\\
\hline
DC Input signal impedance & \multicolumn{4}{c|}{100 k$\Omega$} & Termination off\\
& \multicolumn{4}{c|}{50 $\Omega$} & Termination on\\
\hline
Resolution &\multicolumn{4}{c|}{16 bits}& \\
\thickhline
\multicolumn{6}{l}{*With the 50\textOmega~termination enabled, the input voltage magnitude must not exceed 5V.}
\end{tabularx}
\end{threeparttable}
\end{table}
The electrical characteristics are based on various test results\footnote{\label{sinara226}\url{https://github.com/sinara-hw/sinara/issues/226}}\textsuperscript{,}
\footnote{\label{sinara489}\url{https://github.com/sinara-hw/sinara/issues/489}}\textsuperscript{,}
\footnote{\label{sampler2}\url{https://github.com/sinara-hw/Sampler/issues/2}}.
\begin{table}[hbt!]
\centering
\begin{threeparttable}
\caption{Electrical Characteristics}
\begin{tabularx}{\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions / Comments} \\
\hline
% Github wiki page info regarding BW is outdated, so only coarse estimate here
% There is an updated plot for this. See the plots.
-6dB bandwidth\repeatfootnote{sampler2} & & & & & See bandwidth plots \\
& & 200 & & kHz & 1x/10x/100x gain \\
& & 90 & & kHz & 1000x gain \\
\hline
Noise\repeatfootnote{sampler2} & & & & & 83.33 kHz sampling rate \\
\hspace{18mm} 1x gain & & 1.78 & & LSB RMS & Termination on \\
& & 1.75 & & LSB RMS & Termination off \\
\hspace{18mm} 10x gain & & 1.84 & & LSB RMS & Termination on \\
& & 3.09 & & LSB RMS & Termination off \\
\hspace{18mm} 100x gain & & 3.47 & & LSB RMS & Termination on \\
& & 26.02 & & LSB RMS & Termination off \\
\hspace{18mm} 1000x gain & & 13.87 & & LSB RMS & Termination on \\
& & 206.3 & & LSB RMS & Termination off \\
% \hline
DC cross-talk\repeatfootnote{sinara226} & & & -96 & dB & 1x gain\\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\begin{table}[h]
\begin{threeparttable}
\caption{Electrical Characteristics (cont.)}
\begin{tabularx}{\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions / Comments} \\
\hline
% AC cross-talk data on wiki is also outdated (when it was still novo)
% sinara-hw/sinara #489 is a better source of info
% But it seems that AC-XT is not channel-invariant
% So it is tabulated instead.
Second-order harmonics\repeatfootnote{sinara226} & & & & & 25 kHz input, termination on, 1x gain \\
& & -51 & & dBc & 0.1 V\textsubscript{pp} (-48dBFS), limited by ADC (-100dBFS) \\
& & -69 & & dBc & 1 V\textsubscript{pp} (-28dBFS) \\
& & -58.8 & & dBc & 10 V\textsubscript{pp} (-8dBFS) \\
\hline
Common-mode rejection ratio\repeatfootnote{sinara226} & & & & & 2 V\textsubscript{pp} sine wave as CM input, termination on\\
\hspace{12mm} 1x gain & & & -98 & dB & $f=0.01,0.1,1$ kHz \\
& & -87 & & dB & $f=10$ kHz \\
& & -55 & & dB & $f=100$ kHz \\
& & -83 & & dB & $f=1$ MHz \\
& & -85 & & dB & $f=10$ MHz \\
\cline{2-6}
\hspace{12mm} 100x gain & & & -118 & dB & $f=0.01$ kHz \\
& & -98 & & dB & $f=0.1$ kHz \\
& & -88 & & dB & $f=1$ kHz \\
& & -70 & & dB & $f=10$ kHz \\
& & -50 & & dB & $f=100$ kHz \\
& & -80 & & dB & $f=1$ MHz \\
& & & -118 & dB & $f=10$ MHz \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\subsection{Channel crosstalk}
Crosstalk between ADC channels of 5108 ADC Sampler is shown below\repeatfootnote{sinara489}.
A 10 V\textsubscript{pp} signal was used as the input. The aggressor channel always has 1x gain. All channels have 50 \textOmega~termination enabled.
Data was acquired by taking 512 samples at 80 kHz sampling rate 20 times to average out the FFT.
\newcolumntype{Y}{>{\centering\arraybackslash}X}
\begin{table}[h]
\begin{threeparttable}
\caption{Crosstalk with 35 kHz input frequency, 1000x gain on victim}
\begin{tabularx}{\textwidth}{| c | Y | Y | Y | Y | Y | Y | Y | Y |}
\thickhline
\multirow{2}{*}{\textbf{Aggressor}} &
\multicolumn{8}{c|}{\textbf{Crosstalk (dB) on Victim Channels}}\\
\cline{2-9} & 0 & 1 & 2 & 3 & 4 & 5 & 6 & 7 \\
\hline
Channel 0 & 0.00 & -114.90 & -129.35 & -131.54 & -132.19 & -142.56 & -145.39 & -159.98 \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\begin{figure}[hbt!]
\centering
\includegraphics[width=\textwidth]{sampler_xt_35khz.png}
\caption{Crosstalk with 35 kHz input frequency, 1000x gain on victim, channel 0 as the aggressor}
\end{figure}
\begin{table}[hbt!]
\begin{threeparttable}
\caption{Crosstalk with 300 kHz input frequency, 1000x gain on victim}
\begin{tabularx}{\textwidth}{| c | Y | Y | Y | Y | Y | Y | Y | Y |}
\thickhline
\multirow{2}{*}{\textbf{Aggressor}} &
\multicolumn{8}{c|}{\textbf{Crosstalk (dB) on Victim Channels}}\\
\cline{2-9} & 0 & 1 & 2 & 3 & 4 & 5 & 6 & 7 \\
\hline
Channel 0 & 0.00 & -109.18 & -123.94 & -128.46 & -131.11 & -134.45 & -135.62 & -158.51 \\
\hline
Channel 1 & -112.90 & 0.00 & -114.98 & -124.11 & -131.40 & -142.61 & -145.94 & -168.51 \\
\hline
Channel 2 & -123.27 & -112.58 & 0.00 & -111.17 & -121.46 & -129.97 & -137.31 & -163.77 \\
\hline
Channel 3 & -140.61 & -125.20 & -114.49 & 0.00 & -111.84 & -125.10 & -133.74 & -164.55 \\
\hline
Channel 4 & -140.12 & -131.07 & -124.30 & -112.65 & 0.00 & -109.22 & -124.71 & -160.22 \\
\hline
Channel 5 & -140.33 & -135.77 & -134.42 & -126.34 & -116.35 & 0.00 & -118.40 & -156.63 \\
\hline
Channel 6 & -142.39 & -139.25 & -138.51 & -134.73 & -125.00 & -108.91 & 0.00 & -146.29 \\
\hline
Channel 7 & -145.06 & -138.97 & -144.31 & -139.50 & -135.50 & -120.62 & -114.28 & 0.00 \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\clearpage
% The plots are quite small given that it is 8-plots-in-1, but the numbers should give a better picture
\begin{figure}[hbt!]
\centering
\includegraphics[width=\textwidth]{sampler_xt_300khz.png}
\caption{Crosstalk with 300 kHz input frequency, 1000x gain on victim, channel 0 as the aggressor}
\end{figure}
\begin{table}[hbt!]
\begin{threeparttable}
\caption{Crosstalk with 300 kHz input frequency, 1x gain on victim}
\begin{tabularx}{\textwidth}{| c | Y | Y | Y | Y | Y | Y | Y | Y |}
\thickhline
\multirow{2}{*}{\textbf{Aggressor}} &
\multicolumn{8}{c|}{\textbf{Crosstalk (dB) on Victim Channels}}\\
\cline{2-9} & 0 & 1 & 2 & 3 & 4 & 5 & 6 & 7 \\
\hline
Channel 0 & 0.00 & -84.36 & -100.65 & -100.16 & -102.72 & -93.51 & -96.23 & -105.70 \\
\hline
Channel 1 & -91.95 & 0.00 & -87.47 & -104.87 & -115.80 & -99.91 & -101.55 & -106.71 \\
\hline
Channel 2 & -109.04 & -86.28 & 0.00 & -88.78 & -96.81 & -95.41 & -108.53 & -109.23 \\
\hline
Channel 3 & -101.31 & -97.47 & -92.72 & 0.00 & -88.65 & -96.58 & -100.80 & -97.46 \\
\hline
Channel 4 & -101.27 & -95.18 & -97.16 & -88.29 & 0.00 & -87.26 & -99.11 & -100.12 \\
\hline
Channel 5 & -103.41 & -102.10 & -101.54 & -104.59 & -99.87 & 0.00 & -89.34 & -102.49 \\
\hline
Channel 6 & -104.62 & -104.64 & -103.39 & -101.73 & -104.08 & -87.61 & 0.00 & -88.34 \\
\hline
Channel 7 & -100.67 & -99.20 & -97.34 & -95.48 & -102.93 & -113.76 & -92.80 & 0.00 \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\clearpage
\begin{figure}[hbt!]
\centering
\includegraphics[width=\textwidth]{sampler_xt_300khz_1x_gain.png}
\caption{Crosstalk with 300 kHz input frequency, 1x gain on victim, channel 3 as the aggressor}
\end{figure}
\subsection{Bandwidth}
Bandwidth of small signal and large signal input is shown below\repeatfootnote{sampler2}. The setup is as follows:
\begin{enumerate}
\itemsep0em
\item 10k samples, sampled at 79.37 kHz
\item Driven by sinusoid from Keysight 33500B generator; sampled using channel 7 without termination
\item Small signal measured using 2V\textsubscript{pp}/gain; large signal measured using 15V\textsubscript{pp}/gain
\end{enumerate}
\begin{multicols}{2}
\begin{figure}[H]
\includegraphics[width=3.3in]{sampler_small_signal_bw.png}
\caption{Small signal bandwidth}
\end{figure}
\columnbreak
\begin{figure}[H]
\includegraphics[width=3.3in]{sampler_large_signal_bw.png}
\caption{Large signal bandwidth}
\end{figure}
\end{multicols}
\newpage
\begin{multicols}{2}
\section{Configuring Termination}
The input termination must be configured by setting physical switches on the board. The termination switches are found at the middle left part of the card and by-channel. Setting these switches to \texttt{on} adds a 50\textOmega~termination between the differential input signals.
Regardless of switch configurations, the differential input signals are separately terminated with 100k\textOmega~to the PCB ground.
\vspace*{\fill}
\columnbreak
\begin{center}
\centering
\includegraphics[height=1.7in]{sampler_switches.jpg}
\captionof{figure}{Position of switches}
\end{center}
\end{multicols}
\sysdescsection
5108 Sampler should be entered into the peripherals list of the corresponding core device in the following format:
\begin{tcolorbox}[colback=white]
\begin{minted}{json}
{
"type": "sampler",
"ports": [0, 1]
}
\end{minted}
\end{tcolorbox}
Replace 0 and 1 with the EEM port numbers used on the core device. Any ports can be used.
\newpage
\codesection{5108 ADC Sampler}
\subsection{Get input voltage}
The following example initializes the Sampler card with 1x gain on all ADC channels. At the end all ADC channels are sampled.
\inputcolorboxminted{firstline=9,lastline=21}{examples/sampler.py}
% Direct input to avoid issues with minted
\input{shared/suservo.tex}
\ordersection{5108 ADC Sampler}
\finalfootnote
\end{document}
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