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236
4410-4412.tex
236
4410-4412.tex
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@ -1,4 +1,4 @@
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\include{preamble.tex}
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\input{preamble.tex}
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\graphicspath{{images/4410-4412}{images}}
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\title{4410/4412 DDS Urukul}
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@ -13,33 +13,28 @@
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\section{Features}
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\begin{itemize}
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\item{4-channel 1GS/s DDS.}
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\item{Output frequency ranges from \textless 1 to \textgreater 400 MHz.}
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\item{Sub-Hz frequency resolution.}
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\item{Controlled phase steps.}
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\item{Accurate output amplitude control.}
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\item{4-channel 1GS/s DDS}
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\item{Output frequency from \textless 1 to \textgreater 400 MHz}
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\item{Sub-Hz frequency resolution}
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\item{Controlled phase steps}
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\item{Accurate output amplitude control}
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\end{itemize}
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\section{Applications}
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\begin{itemize}
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\item{Dynamic low-noise RF source.}
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\item{Driving RF electrodes in ion traps.}
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\item{Driving acousto-optic modulators.}
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\item{Form a laser intensity servo with 5108 Sampler.}
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\item{Dynamic low-noise RF source}
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\item{Driving RF electrodes in ion traps}
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\item{Driving acousto-optic modulators}
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\item{Form a laser intensity servo with 5108 Sampler}
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\end{itemize}
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\section{General Description}
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The 4410/4412 DDS Urukul card is a 4hp EEM module part of the ARTIQ Sinara family.
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It adds frequency generation capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
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The 4410/4412 DDS Urukul card is a 4hp EEM module, part of the ARTIQ/Sinara family. It adds frequency generation capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
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It provides 4 channels of DDS at 1GS/s.
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Output frequency from \textless 1 to \textgreater 400 MHz are supported.
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The nominal maximum output power of each channel is 10dBm.
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Each channel can be attenuated from 0 to -31.5 dB by a digital attenuator.
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RF switches (1ns temporal resolution) on each channel provides 70 dB isolation.
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4410 DDS Urukul comes with AD9910 chips, while 4412 DDS Urukul comes with AD9912 chips instead.
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It provides 4 channels of DDS (direct digital synthesis) at 1GS/s. Output frequencies from \textless 1 to \textgreater 400 MHz are supported. The nominal maximum output power of each channel is 10dBm. Each channel can be attenuated from 0 to -31.5 dB by a digital attenuator. RF switches (1ns temporal resolution) on each channel provide 70 dB isolation.
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4410 DDS Urukul features AD9910 chips, while 4412 DDS Urukul features AD9912 chips. AD9912 is capable of higher frequency precision (~8 \textmu Hz) than the AD9910 (~0.25 Hz). The ARTIQ SU-Servo configuration is only available for AD9910.
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% Switch to next column
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\vfill\break
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@ -276,22 +271,23 @@ RF switches (1ns temporal resolution) on each channel provides 70 dB isolation.
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\centering
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\includegraphics[height=2.2in]{Urukul_FP.jpg}
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\includegraphics[height=2.2in]{photo4410.jpg}
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\caption{Urukul Card photo}
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\caption{Urukul card and front panel}
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\end{figure}
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% For wide tables, a single column layout is better. It can be switched
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% page-by-page.
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\onecolumn
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\sourcesection{4410/4412 DDS Urukul}{https://github.com/sinara-hw/Urukul/}
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\section{Electrical Specifications}
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Specifications of parameters are based on the datasheets of the
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DDS IC(AD9910\footnote{\label{ad9910}https://www.analog.com/media/en/technical-documentation/data-sheets/AD9910.pdf},
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AD9912\footnote{\label{ad9912}https://www.analog.com/media/en/technical-documentation/data-sheets/AD9912.pdf}),
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clock buffer IC (Si53312\footnote{\label{clock_buffer}https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/Si53312.pdf}),
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digital attenuator IC (HMC542BLP4E\footnote{\label{attenuator}https://www.analog.com/media/en/technical-documentation/data-sheets/hmc542b.pdf}),
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various information from Sinara wiki\footnote{\label{urukul_wiki}https://github.com/sinara-hw/Urukul/wiki\#details-specification-and-typical-performance-data}
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and corresponding test results\footnote{\label{sinara354}https://github.com/sinara-hw/sinara/issues/354\#issuecomment-352859041}.
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Specifications of parameters are based on the datasheets of the DDS IC
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(AD9910\footnote{\label{ad9910}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/AD9910.pdf}},
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AD9912\footnote{\label{ad9912}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/AD9912.pdf}}),
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clock buffer IC (Si53312\footnote{\label{clock_buffer}\url{https://www.skyworksinc.com/-/media/SkyWorks/SL/documents/public/data-sheets/Si5331x_datasheet.pdf}}),
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digital attenuator IC (HMC542BLP4E\footnote{\label{attenuator}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/hmc542b.pdf}}), Sinara project information\footnote{\label{urukul_wiki}\url{https://github.com/sinara-hw/Urukul/wiki\#details-specification-and-typical-performance-data}}
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and corresponding test results\footnote{\label{sinara354}\url{https://github.com/sinara-hw/sinara/issues/354\#issuecomment-352859041}}.
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\begin{table}[h]
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\centering
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\begin{threeparttable}
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@ -332,11 +328,9 @@ and corresponding test results\footnote{\label{sinara354}https://github.com/sina
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Resolution & & & & & \\
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\hspace{3mm} Frequency\repeatfootnote{ad9910}\textsuperscript{,}\repeatfootnote{urukul_wiki} & & 0.25 & & Hz & AD9910 \\
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& & 8 & & $\mu$Hz & AD9912 \\
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\hspace{3mm} Phase offset\repeatfootnote{ad9910}\textsuperscript{,}\repeatfootnote{ad9912} & & 16 & & bits & AD9910 \\
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& & 14 & & bits & AD9912 \\
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\hspace{3mm} Phase offset\repeatfootnote{ad9910}\textsuperscript{,}\repeatfootnote{ad9912} & & 16/14 & & bits & AD9910/AD9912 respectively \\
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\hspace{3mm} Digital amplitude\repeatfootnote{ad9910} & & 14 & & bits & AD9910 \\
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\hspace{3mm} DAC full scale current\repeatfootnote{ad9910}\textsuperscript{,}\repeatfootnote{ad9912} & & 8 & & bits & AD9910 \\
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& & 10 & & bits & AD9912 \\
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\hspace{3mm} DAC full scale current\repeatfootnote{ad9910}\textsuperscript{,}\repeatfootnote{ad9912} & & 8/10 & & bits & AD9910/AD9912 respectively \\
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\hspace{3mm} Temporal (I/O Update)\repeatfootnote{urukul_wiki} & & 4 & & ns & \\
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\hspace{3mm} Digital attenuation\repeatfootnote{attenuator} & & 0.5 & & dB & \\
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\thickhline
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@ -344,14 +338,12 @@ and corresponding test results\footnote{\label{sinara354}https://github.com/sina
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\end{threeparttable}
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\end{table}
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\newpage
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The tabulated performance characteristics are produced using the following setup unless otherwise noted.
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The tabulated performance characteristics are produced using the following setup unless otherwise noted:
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\begin{itemize}
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\item 100 MHz input clock into SMA, 10 dBm.
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\item Input clock divided by 4.
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\item PLL with x40 multiplier.
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\item Output frequency at 80 MHz or 81 MHz.
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\item 100 MHz input clock into SMA, 10 dBm
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\item Input clock divided by 4
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\item PLL with x40 multiplier
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\item Output frequency at 80 MHz or 81 MHz
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\end{itemize}
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\begin{table}[h]
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@ -399,7 +391,7 @@ The tabulated performance characteristics are produced using the following setup
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\newpage
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Harmonic content of the DDS signals from 4410 DDS Urukul is tabulated below\footnote{\label{urukul29}https://github.com/sinara-hw/Urukul/issues/29}. An external 125 MHz clock signal were supplied.
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Harmonic content of the DDS signals from 4410 DDS Urukul is tabulated below\footnote{\label{urukul29}\url{https://github.com/sinara-hw/Urukul/issues/29}}. An external 125 MHz clock signal was supplied.
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\newcommand{\ts}{\textsuperscript}
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\newcolumntype{Y}{>{\centering\arraybackslash}X}
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@ -552,9 +544,7 @@ Harmonic content of the DDS signals from 4410 DDS Urukul is tabulated below\foot
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\newpage
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The RMS voltage of a 4410 DDS Urukul channel at different amplitude scale factor is measured.
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The DDS channel is directly connected to an oscilloscope with a 50\textOmega~termination.
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The reported values are obtained from the oscilloscope.
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The RMS voltage of a 4410 DDS Urukul channel at different amplitude scale factors is measured below. The DDS channel is directly connected to an oscilloscope with a 50\textOmega~termination. The reported values are obtained from the oscilloscope.
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\begin{multicols}{2}
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\begin{figure}[H]
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@ -703,7 +693,7 @@ The measured RMS voltage divided by the full scale ideal RMS voltage (i.e. $V_\m
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color=blue,
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mark=square,
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samples=11,
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y filter/.code={\pgfmathparse{\pgfmathresult/0.089807*0.1}\pgfmathresult}
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y filter/.expression={y/0.089807 * 0.1}
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] coordinates {
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(0.0, 0) (0.1, 0.089807) (0.2, 0.179723) (0.3, 0.268852) (0.4, 0.354310) (0.5, 0.441055)
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(0.6, 0.526386) (0.7, 0.61233) (0.8, 0.69044) (0.9, 0.75856) (1.0, 0.81703)
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@ -713,7 +703,7 @@ The measured RMS voltage divided by the full scale ideal RMS voltage (i.e. $V_\m
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color=orange,
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mark=square,
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samples=11,
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y filter/.code={\pgfmathparse{\pgfmathresult/50.0729*0.1}\pgfmathresult}
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y filter/.expression={y/50.0729 * 0.1}
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] coordinates {
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(0, 0) (0.1, 50.0729) (0.2, 100.309) (0.3, 150.996) (0.4, 200.905) (0.5, 250.004)
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(0.6, 297.000) (0.7, 345.980) (0.8, 394.391) (0.9, 442.869) (1.0, 490.651)
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@ -723,7 +713,7 @@ The measured RMS voltage divided by the full scale ideal RMS voltage (i.e. $V_\m
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color=green,
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mark=square,
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samples=11,
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y filter/.code={\pgfmathparse{\pgfmathresult/28.4696*0.1}\pgfmathresult}
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y filter/.expression={y/28.4696 * 0.1}
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] coordinates {
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(0, 0) (0.1, 28.4696) (0.2, 57.143) (0.3, 85.776) (0.4, 114.694) (0.5, 143.302)
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(0.6, 171.911) (0.7, 200.098) (0.8, 227.816) (0.9, 256.321) (1.0, 281.930)
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@ -733,7 +723,7 @@ The measured RMS voltage divided by the full scale ideal RMS voltage (i.e. $V_\m
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color=red,
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mark=square,
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samples=11,
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y filter/.code={\pgfmathparse{\pgfmathresult/16.6691*0.1}\pgfmathresult}
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y filter/.expression={y/16.6691 * 0.1}
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] coordinates {
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(0, 0) (0.1, 16.6691) (0.2, 33.3762) (0.3, 49.8844) (0.4, 67.055) (0.5, 83.652)
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(0.6, 99.970) (0.7, 116.906) (0.8, 133.368) (0.9, 150.839) (1.0, 167.033)
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@ -786,7 +776,7 @@ The measured RMS voltage divided by the full scale ideal RMS voltage (i.e. $V_\m
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\end{multicols}
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\footnotetext{\label{urukul64}https://github.com/sinara-hw/Urukul/issues/64}
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\footnotetext{\label{urukul64}\url{https://github.com/sinara-hw/Urukul/issues/64}}
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\begin{figure}[H]
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\centering
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@ -807,61 +797,8 @@ The measured RMS voltage divided by the full scale ideal RMS voltage (i.e. $V_\m
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\end{figure}
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\newpage
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\section{Front Panel Drawings}
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\begin{multicols}{2}
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\begin{center}
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\centering
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\includegraphics[height=3in]{dds_drawings.pdf}
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\captionof{figure}{4410 DDS Urukul front panel drawings}
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\end{center}
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\begin{center}
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\captionof{table}{Bill of Material (Standalone)}
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\tiny
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\begin{tabular}{|c|c|c|c|}
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\hline
|
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Index & Part No. & Qty & Description \\ \hline
|
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1 & 90498177 & 1 & FRONT PANEL 3U 4HP PIU TYPE2 \\ \hline
|
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2 & 3020716 & 0.02 & SLEEVE GREY PLAS.M2.5 (100PCS) \\ \hline
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3 & 3218843 & 2 & FP-ALIGNMENT PIN (LOCALIZATION) \\ \hline
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\end{tabular}
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\end{center}
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|
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\columnbreak
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\begin{center}
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\centering
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\includegraphics[height=3in]{dds_assembly.pdf}
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\captionof{figure}{4410 DDS Urukul front panel assembly}
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\end{center}
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\begin{center}
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\captionof{table}{Bill of Material (Assembled)}
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\tiny
|
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\begin{tabular}{|c|c|c|c|}
|
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\hline
|
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Index & Part No. & Qty & Description \\ \hline
|
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1 & 90498177 & 1 & FP-LYKJ 3U4HP PANEL \\ \hline
|
||||
2 & 3001012 & 2 & SCR M2.5*6 PAN PHL NI DIN7985 \\ \hline
|
||||
3 & 3010110 & 0.02 & WASHER PLN.M2.7 DIN125 (100X) \\ \hline
|
||||
4 & 3010124 & 0.1 & EMC GASKET FABRIC 3U (10PCS) \\ \hline
|
||||
5 & 3033098 & 0.02 & SCREW COLLAR M2.5X12.3 (100X) \\ \hline
|
||||
6 & 3040012 & 1 & HANDLE 4HP GREY PLASTIC \\ \hline
|
||||
7 & 3040138 & 2 & PB HOLDER DIE-CAST \\ \hline
|
||||
8 & 3201099 & 0.01 & SCR M2.5*8 OVL PHL ST NI 100EA \\ \hline
|
||||
9 & 3207075 & 0.01 & SCR M2.5*12 PAN 100 21101-221 \\ \hline
|
||||
\end{tabular}
|
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\end{center}
|
||||
|
||||
\end{multicols}
|
||||
|
||||
\newpage
|
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\section{Urukul Mode Configurations}
|
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Mode of operation is specified by a DIP switch.
|
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The DIP switch can be found at the top right corner of the card.
|
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The following table summarizes the required setting for each mode.
|
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\section{Configuring Operation Mode}
|
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Mode of operation is specified by a DIP switch. The DIP switch can be found at the top right corner of the card. The following table summarizes the required setting for each mode.
|
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\ding{51} indicates ON, while \ding{53} indicates OFF.
|
||||
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\begin{multicols}{2}
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@ -887,47 +824,37 @@ The following table summarizes the required setting for each mode.
|
|||
|
||||
\end{multicols}
|
||||
|
||||
\section{Urukul 1-EEM/2-EEM Modes}
|
||||
4410/4412 DDS Urukul can operate with either 1 or 2 EEM connections.
|
||||
It is in 1-EEM mode when only EEM0 is connected, 2-EEM mode when both EEM0 \& EEM1 are connected.
|
||||
2-EEM mode provides these additional features in comparison to 1-EEM mode.
|
||||
\begin{itemize}
|
||||
\item 1 ns temporal resolution RF switches \\
|
||||
Without EEM1, the only way to access the switches is through the CPLD using SPI. \\
|
||||
With EEM1, RF switches can be controlled as a TTL output through the LVDS transceiver.
|
||||
1 ns temporal resolution is achieved using the ARTIQ RTIO system.
|
||||
\section{Urukul Single-/Double-EEM Modes}
|
||||
|
||||
\item SU-Servo (4410 DDS Urukul feature) \\
|
||||
SU-Servo requires both EEM0 \& EEM1 to control multiple DDS channels simultaneously using the QSPI interface.
|
||||
4410/4412 DDS Urukul cards can operate with either a single or double EEM connections. When only EEM0 is connected, the card will act in single-EEM mode; when both EEM0 and EEM1 are connected, the card will act in double-EEM mode. 2-EEM mode when both EEM0 \& EEM1 are connected. Double-EEM mode provides these additional features in comparison to single-EEM mode:
|
||||
\begin{itemize}
|
||||
\item \textbf{1 ns temporal resolution RF switches} \\
|
||||
Without EEM1, the only way to access the switches is through the CPLD, using SPI. \\
|
||||
With EEM1, RF switches can be controlled as a TTL output through the LVDS transceiver. 1 ns temporal resolution can then be achieved using the ARTIQ RTIO system.
|
||||
|
||||
\item \textbf{SU-Servo (4410 DDS Urukul feature)} \\
|
||||
SU-Servo requires both EEM0 \& EEM1 to allow the control of multiple DDS channels simultaneously using the QSPI interface.
|
||||
|
||||
\end{itemize}
|
||||
|
||||
\newpage
|
||||
|
||||
\section{Example ARTIQ code}
|
||||
The sections below demonstrate simple usage scenarios of the 4410/4412 DDS Urukul card with the ARTIQ control system.
|
||||
They do not exhaustively demonstrate all the features of the ARTIQ system.
|
||||
The full documentation for the ARTIQ software and gateware is available at \url{https://m-labs.hk}.
|
||||
\codesection{4410/4412 DDS Urukul}
|
||||
|
||||
\subsection{10 MHz Sinusoidal Wave}
|
||||
Generate a 10MHz sinusoid from RF0 with full scale amplitude, attenuated by 6 dB.
|
||||
Both the CPLD and the DDS channels should be initialized.
|
||||
By default, AD9910 single-tone profiles are programmed to profile 7.
|
||||
\subsection{10 MHz sinusoidal wave}
|
||||
Generates a 10MHz sinusoid from RF0 with full scale amplitude, attenuated by 6 dB. Both the CPLD and the DDS channels should be initialized. By default, AD9910 single-tone profiles are programmed to profile 7.
|
||||
|
||||
\inputcolorboxminted{firstline=11,lastline=18}{examples/dds.py}
|
||||
|
||||
If the synchronization feature of AD9910 was enabled, RF signal across different channels of the same Urukul can be synchronized.
|
||||
For example, phase-coherent RF signal can be produced on both channel 0 and channel 1 after configuring an appropriate phase mode.
|
||||
If the synchronization feature of AD9910 is enabled, RF signal across different channels of the same Urukul can be synchronized. For example, phase-coherent RF signal can be produced on both channel 0 and channel 1 after configuring an appropriate phase mode.
|
||||
|
||||
\inputcolorboxminted{firstline=28,lastline=43}{examples/dds.py}
|
||||
|
||||
Note that the phase difference between the 2 channels might not be exactly 0.25 turns, but it is a constant.
|
||||
It can be negated by adjusting the \texttt{phase} parameter.
|
||||
Note that the phase difference between the 2 channels might not be exactly 0.25 turns, but it is a constant. It can be negated by adjusting the \texttt{phase} parameter.
|
||||
|
||||
\newpage
|
||||
\subsection{Periodic RF pulse (AD9910 Only)}
|
||||
This examples demonstrates that the RF signal can be modulated by amplitude using the RAM modulation feature of AD9910.
|
||||
By default, RAM profiles are programmed to profile 0.
|
||||
This example demonstrates that the RF signal can be modulated by amplitude using the RAM modulation feature of the AD9910. By default, RAM profiles are programmed to profile 0.
|
||||
|
||||
\inputcolorboxminted{firstline=53,lastline=91}{examples/dds.py}
|
||||
|
||||
|
@ -939,8 +866,7 @@ The generated RF output of the above example consists of the following features
|
|||
\item No signal for 3 microseconds.
|
||||
\item Go back to item 1.
|
||||
\end{enumerate}
|
||||
The expected waveform is plotted on the following figure.
|
||||
Note that phase of the RF pulses may drift gradually.
|
||||
The expected waveform is plotted on the following figure. Note that phase of the RF pulses may drift gradually.
|
||||
Urukul was operated with a 50$\Omega$ termination to produce the waveform.
|
||||
|
||||
\begin{tikzpicture}[
|
||||
|
@ -948,7 +874,7 @@ Urukul was operated with a 50$\Omega$ termination to produce the waveform.
|
|||
func(\x)= (\x<0) * (0) +
|
||||
and(\x>=0, \x<2) * (0.42*cos(deg(10*pi*\x))) +
|
||||
and(\x>=2, \x<3) * (0) +
|
||||
and(\x>=3, \x<4) * (0.42*cos(deg(10*pi*\x)))) +
|
||||
and(\x>=3, \x<4) * (0.42*cos(deg(10*pi*\x))) +
|
||||
and(\x>=4, \x<7) * (0) +
|
||||
and(\x>=7, \x<7.5) * (0.42*cos(deg(10*pi*\x)));
|
||||
}
|
||||
|
@ -973,15 +899,12 @@ Urukul was operated with a 50$\Omega$ termination to produce the waveform.
|
|||
\end{axis}
|
||||
\end{tikzpicture}
|
||||
|
||||
\subsection{Simple Amplitude Ramp (AD9910 Only)}
|
||||
\subsection{Simple amplitude ramp (AD9910 only)}
|
||||
An amplitude ramp of an RF signal can be generated by modifying the \texttt{self.amp} array in the previous example.
|
||||
|
||||
\inputcolorboxminted{firstline=95,lastline=98}{examples/dds.py}
|
||||
|
||||
The generated RF output has an incrementing amplitude scale factor (ASF), increasing by 0.1 at every microsecond.
|
||||
Once the ASF reaches 1.0, it drops back to 0.0 at the next microsecond.
|
||||
The expected waveform over 1 cycle is plotted on the following figure.
|
||||
Note that phase of the RF pulses may drift gradually.
|
||||
The generated RF output has an incrementing amplitude scale factor (ASF), increasing by 0.1 at every microsecond. Once the ASF reaches 1.0, it drops back to 0.0 at the next microsecond. The expected waveform over 1 cycle is plotted on the following figure. Note that phase of the RF pulses may drift gradually.
|
||||
Urukul was operated with a 50$\Omega$ termination to produce the waveform.
|
||||
|
||||
\begin{tikzpicture}[
|
||||
|
@ -1023,26 +946,23 @@ Urukul was operated with a 50$\Omega$ termination to produce the waveform.
|
|||
|
||||
\newpage
|
||||
|
||||
\subsection{RAM Synchronization (AD9910 Only)}
|
||||
Multiple RAM channels can also be synchronized.
|
||||
Similar to the 10 MHz single-tone RF signals, specify \texttt{phase} when calling \texttt{dds.set()} in \texttt{configure\char`_ram\char`_mode}.
|
||||
For example, set phase to 0 for the channels (\texttt{phase=0.0}).
|
||||
\subsection{RAM synchronization (AD9910 only)}
|
||||
Multiple RAM channels can also be synchronized. Similar to the 10 MHz single-tone RF signals, specify \texttt{phase} when calling \texttt{dds.set()} in \texttt{configure\char`_ram\char`_mode}. For example, set phase to 0 for the channels (\texttt{phase=0.0}):
|
||||
|
||||
\inputcolorboxminted{firstline=116,lastline=116}{examples/dds.py}
|
||||
|
||||
Then, replace the \texttt{run()} function with the following.
|
||||
Then, replace the \texttt{run()} function with the following:
|
||||
|
||||
\inputcolorboxminted{firstline=122,lastline=134}{examples/dds.py}
|
||||
|
||||
Two phase-coherent RF signal with the same waveform as the previous figure (from either RAM examples) should be generated.
|
||||
|
||||
\subsection{Voltage-controlled DDS Amplitude (SU-Servo Only)}
|
||||
The SU-Servo feature can be enabled by integrating the 4410 DDS Urukul with a 5108 Sampler.
|
||||
Amplitude of the DDS output can be controlled by the ADC input of the Sampler through PI control, characterised by the following transfer function.
|
||||
\subsection{Voltage-controlled DDS amplitude (SU-Servo only)}
|
||||
The SU-Servo feature can be enabled by integrating the 4410 DDS Urukul with a 5108 Sampler. Amplitude of the DDS output can be controlled by the ADC input of the Sampler through PI control, characterised by the following transfer function:
|
||||
|
||||
\[H(s)=k_p+\frac{k_i}{s+\frac{k_i}{g}}\]
|
||||
In the following example, the amplitude of DDS is proportional to the ADC input from Sampler.
|
||||
First, initialize the RTIO, SU-Servo and its channel.
|
||||
Note that the programmable gain of the Sampler is $10^0=1$, the input range is [-10V, 10V].
|
||||
|
||||
In the following example, the amplitude of DDS is proportional to the ADC input from Sampler. First, initialize the RTIO, SU-Servo and its channel. Note that the programmable gain of the Sampler is $10^0=1$ and the input range is [-10V, 10V].
|
||||
|
||||
\inputcolorboxminted{firstline=10,lastline=17}{examples/suservo.py}
|
||||
|
||||
|
@ -1055,17 +975,13 @@ When input voltage $\geq$ offset voltage, the DDS output amplitude is 0.
|
|||
|
||||
\inputcolorboxminted{firstline=26,lastline=30}{examples/suservo.py}
|
||||
|
||||
SU-Servo encodes the ADC voltage in a linear scale [-1, 1].
|
||||
Therefore, 3V is converted to 0.3.
|
||||
Note that the ASF of all DDS channels are capped at 1.0, the amplitude clips when ADC input $\leq -7V$ with the above IIR filter.
|
||||
SU-Servo encodes the ADC voltage in a linear scale [-1, 1]. Therefore, 3V is converted to 0.3. Note that the ASF of all DDS channels are capped at 1.0 and the amplitude clips when ADC input $\leq -7V$ with the above IIR filter.
|
||||
|
||||
Finally, enable the SU-Servo channel with the IIR filter programmed beforehand.
|
||||
Finally, enable the SU-Servo channel with the IIR filter programmed beforehand:
|
||||
|
||||
\inputcolorboxminted{firstline=32,lastline=33}{examples/suservo.py}
|
||||
|
||||
A 10 MHz DDS signal is generated from the example above, with amplitude controllable by ADC.
|
||||
The RMS voltage of the DDS channel against the ADC voltage is plotted.
|
||||
The DDS channel is terminated with 50\textOmega.
|
||||
A 10 MHz DDS signal is generated from the example above, with amplitude controllable by ADC. The RMS voltage of the DDS channel against the ADC voltage is plotted. The DDS channel is terminated with 50\textOmega.
|
||||
|
||||
\begin{center}
|
||||
\begin{tikzpicture}[
|
||||
|
@ -1098,20 +1014,10 @@ The DDS channel is terminated with 50\textOmega.
|
|||
\end{tikzpicture}
|
||||
\end{center}
|
||||
|
||||
DDS signal should be attenuated.
|
||||
High output power affects the linearity due to the 1 dB compression point of the amplifier at 13 dBm output power.
|
||||
15 dB attenuation at the digital attenuator was applied in this example.
|
||||
DDS signal should be attenuated. High output power affects the linearity due to the 1 dB compression point of the amplifier at 13 dBm output power. 15 dB attenuation at the digital attenuator was applied in this example.
|
||||
|
||||
\section{Ordering Information}
|
||||
To order, please visit \url{https://m-labs.hk} and select the 4410 DDS Urukul in the ARTIQ Sinara crate configuration tool.
|
||||
The default chip is AD9910 (4410 DDS Urukul), which supports more features.
|
||||
If you need the higher frequency resolution of the AD9912 (4412 DDS Urukul), leave us a note when placing the order.
|
||||
To enable SU-Servo feature between 4410 Urukul and 5108 Sampler, specify that SU-Servo is to be integrated into the gateware when placing the order.
|
||||
The cards may also be ordered separately by writing to \url{mailto:sales@m-labs.hk}.
|
||||
\ordersection{4410/4412 DDS Urukul}
|
||||
|
||||
\section*{}
|
||||
\vspace*{\fill}
|
||||
|
||||
\input{footnote.tex}
|
||||
\finalfootnote
|
||||
|
||||
\end{document}
|
||||
|
|
92
4456.tex
92
4456.tex
|
@ -1,4 +1,4 @@
|
|||
\include{preamble.tex}
|
||||
\input{preamble.tex}
|
||||
\graphicspath{{images/4456}{images}}
|
||||
|
||||
\title{4456 Synthesizer Mirny}
|
||||
|
@ -13,31 +13,28 @@
|
|||
\section{Features}
|
||||
|
||||
\begin{itemize}
|
||||
\item{4-channel VCO/PLL.}
|
||||
\item{Output frequency ranges from 53 MHz to \textgreater 4 GHz.}
|
||||
\item{Up to 13.6 GHz with Almazny mezzanine.}
|
||||
\item{Higher frequency resolution than Urukul.}
|
||||
\item{Lower jitter and phase noise.}
|
||||
\item{Large frequency changes take several milliseconds.}
|
||||
\item{4-channel VCO/PLL}
|
||||
\item{Output frequency ranges from 53 MHz to \textgreater 4 GHz}
|
||||
\item{Up to 13.6 GHz with Almazny mezzanine}
|
||||
\item{Higher frequency resolution than Urukul}
|
||||
\item{Lower jitter and phase noise}
|
||||
\item{Large frequency changes take several milliseconds}
|
||||
\end{itemize}
|
||||
|
||||
\section{Applications}
|
||||
|
||||
\begin{itemize}
|
||||
\item{Low-noise microwave source.}
|
||||
\item{Quantum state control.}
|
||||
\item{Driving acousto/electro-optic modulators.}
|
||||
\item{Low-noise microwave source}
|
||||
\item{Quantum state control}
|
||||
\item{Driving acousto/electro-optic modulators}
|
||||
\end{itemize}
|
||||
|
||||
\section{General Description}
|
||||
The 4456 Synthesizer Mirny card is a 4hp EEM module part of the ARTIQ Sinara family.
|
||||
It adds microwave generation capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
|
||||
The 4456 Synthesizer Mirny card is a 4hp EEM module, part of the ARTIQ/Sinara family. It adds microwave generation capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
|
||||
|
||||
It provides 4 channels of PLL frequency synthesis.
|
||||
Output frequency from 53 MHz to \textgreater 4 GHz are supported.
|
||||
The range can be expanded up to 13.6 GHz with Almazny mezzanine.
|
||||
Each channel can be attenuated from 0 to -31.5 dB by a digital attenuator.
|
||||
RF switches on each channel provides at least 50 dB isolation.
|
||||
It provides 4 channels of PLL frequency synthesis. Output frequencies from 53 MHz to \textgreater 4 GHz are supported.The range can be expanded up to 13.6 GHz with the Almazny mezzanine (4467 HF Synthesizer).
|
||||
|
||||
Each channel can be attenuated from 0 to -31.5 dB by a digital attenuator. RF switches on each channel provides at least 50 dB isolation.
|
||||
|
||||
|
||||
% Switch to next column
|
||||
|
@ -278,22 +275,24 @@ RF switches on each channel provides at least 50 dB isolation.
|
|||
|
||||
\begin{figure}[hbt!]
|
||||
\centering
|
||||
\includegraphics[height=2in]{Mirny_FP.pdf}
|
||||
\includegraphics[height=2in]{photo4456.jpg}
|
||||
\caption{Mirny Card photo}
|
||||
\includegraphics[height=3in, angle=90]{Mirny_FP.pdf}
|
||||
\caption{Mirny card and front panel}
|
||||
\end{figure}
|
||||
|
||||
% For wide tables, a single column layout is better. It can be switched
|
||||
% page-by-page.
|
||||
\onecolumn
|
||||
|
||||
\sourcesection{4456 Synthesizer Mirny}{https://github.com/sinara-hw/mirny}
|
||||
|
||||
\section{Electrical Specifications}
|
||||
|
||||
Specifications of parameters are based on the datasheets of the
|
||||
PLL IC(ADF5356\footnote{\label{adf5356}https://www.analog.com/media/en/technical-documentation/data-sheets/ADF5356.pdf}),
|
||||
clock buffer IC (Si53340-B-GM\footnote{\label{clock_buffer}https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/si5334x-datasheet.pdf}),
|
||||
digital attenuator IC (HMC542BLP4E\footnote{\label{attenuator}https://www.analog.com/media/en/technical-documentation/data-sheets/hmc542b.pdf}).
|
||||
Test results are from the Krzysztof Belewicz's thesis ``Microwave synthesizer for driving ion traps in quantum computing"\footnote{\label{mirny_thesis}https://m-labs.hk/Krzysztof\_Belewicz\_V1.1.pdf}.
|
||||
Specifications of parameters are based on the datasheets of the PLL IC
|
||||
(ADF5356\footnote{\label{adf5356}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/ADF5356.pdf}}),
|
||||
clock buffer IC (Si53340-B-GM\footnote{\label{clock_buffer}\url{https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/si5334x-datasheet.pdf}}),
|
||||
and digital attenuator IC (HMC542BLP4E\footnote{\label{attenuator}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/hmc542b.pdf}}).
|
||||
Test results are from Krzysztof Belewicz's thesis. "Microwave synthesizer for driving ion traps in quantum computing"\footnote{\label{mirny_thesis}\url{https://m-labs.hk/Krzysztof\_Belewicz\_V1.1.pdf}}.
|
||||
|
||||
\begin{table}[h]
|
||||
\centering
|
||||
|
@ -342,16 +341,12 @@ Test results are from the Krzysztof Belewicz's thesis ``Microwave synthesizer fo
|
|||
|
||||
\newpage
|
||||
|
||||
Phase noise performance of Mirny was tested using the ADF4351 evaluation kit\repeatfootnote{mirny_thesis}.
|
||||
The SPI signal is driven by the evaluation kit, converted into LVDS signal by propagating through the DIO-tester card, finally arriving at the Mirny card.
|
||||
Mirny is then connected to the RSA5100A spectrum analyzer for measurement.
|
||||
Phase noise performance of Mirny was tested using the ADF4351 evaluation kit\repeatfootnote{mirny_thesis}. The SPI signal was driven by the evaluation kit, converted into LVDS signal by propagating through the DIO-tester card, finally arriving at the Mirny card. Mirny was then connected to the RSA5100A spectrum analyzer for measurement.
|
||||
|
||||
Noise response spike can be improved by inserting an additional common-mode choke between the power supply and Mirny.
|
||||
Note that the common-mode choke is not present on the Mirny card.
|
||||
The following is a comparison between 2 setups at 1 GHz output:
|
||||
Noise response spike can be improved by inserting an additional common-mode choke between the power supply and Mirny; note that this common-mode choke is not present on the card itself. The following is a comparison between the two setups at 1 GHz output:
|
||||
\begin{itemize}
|
||||
\item Red: Before any modifications
|
||||
\item Blue: Adding a CM choke with an 100 \textmu F capacitor after the CM choke
|
||||
\item Blue: CM choke added with an 100 \textmu F capacitor after the CM choke
|
||||
\end{itemize}
|
||||
|
||||
\begin{figure}[H]
|
||||
|
@ -360,7 +355,7 @@ The following is a comparison between 2 setups at 1 GHz output:
|
|||
\caption{Phase noise measurement at 1 GHz}
|
||||
\end{figure}
|
||||
|
||||
Phase noise at different output frequencies are then measured.
|
||||
Phase noise at different output frequencies is then measured:
|
||||
|
||||
\newcolumntype{Y}{>{\centering\arraybackslash}X}
|
||||
|
||||
|
@ -396,22 +391,15 @@ Phase noise at different output frequencies are then measured.
|
|||
\caption{Phase noise measurement}
|
||||
\end{figure}
|
||||
|
||||
\newpage
|
||||
\codesection{4456 Synthesizer Mirny}
|
||||
|
||||
\section{Example ARTIQ code}
|
||||
The sections below demonstrate simple usage scenarios of the 4456 Synthesizer Mirny card with the ARTIQ control system.
|
||||
They do not exhaustively demonstrate all the features of the ARTIQ system.
|
||||
The full documentation for the ARTIQ software and gateware is available at \url{https://m-labs.hk}.
|
||||
|
||||
\subsection{1 GHz Sinusoidal Wave}
|
||||
Generate a 1 GHz sinusoid from RF0 with full scale amplitude, attenuated by 12 dB.
|
||||
Both the CPLD and the PLL channels should be initialized.
|
||||
\subsection{1 GHz sinusoidal wave}
|
||||
Generates a 1 GHz sinusoid from RF0 with full scale amplitude, attenuated by 12 dB. Both the CPLD and the PLL channels should be initialized.
|
||||
|
||||
\inputcolorboxminted{firstline=10,lastline=17}{examples/pll.py}
|
||||
|
||||
\subsection{ADF5356 Power Control}
|
||||
Output power can be controlled be configuring the PLL channels individually, in addition to the digital attenuators.
|
||||
After initialization of the PLL channel (ADF5356), the following line of code can change the output power level.
|
||||
\subsection{ADF5356 power control}
|
||||
Output power can be controlled be configuring the PLL channels individually in addition to the digital attenuators. After initialization of the PLL channel (ADF5356), the following line of code can change the output power level:
|
||||
|
||||
\inputcolorboxminted{firstline=28,lastline=28}{examples/pll.py}
|
||||
|
||||
|
@ -429,25 +417,17 @@ The parameter corresponds to a specific change of output power according to the
|
|||
\end{tabular}
|
||||
\end{center}
|
||||
|
||||
ADF5356 gives +5 dBm by default. The stored parameter in ADF5356 can be read using the folowing line.
|
||||
ADF5356 gives +5 dBm by default. The stored parameter in ADF5356 can be read using the following line"
|
||||
|
||||
\inputcolorboxminted{firstline=29,lastline=29}{examples/pll.py}
|
||||
|
||||
\newpage
|
||||
\subsection{Periodic 100\textmu s pulses}
|
||||
The output can be toggled on and off periodically using the RF switches.
|
||||
The following code emits a 100\textmu s pulse in every millisecond.
|
||||
A microwave signal should be programmed in prior (such as the 1 GHz wave example).
|
||||
The output can be toggled on and off periodically using the RF switches. The following code emits a 100\textmu s pulse in every millisecond. A microwave signal should be programmed in prior (such as the 1 GHz wave example).
|
||||
|
||||
\inputcolorboxminted{firstline=42,lastline=44}{examples/pll.py}
|
||||
|
||||
\section{Ordering Information}
|
||||
To order, please visit \url{https://m-labs.hk} and select the 4456 Synthesizer Mirny in the ARTIQ Sinara crate configuration tool.
|
||||
The cards may also be ordered separately by writing to \url{mailto:sales@m-labs.hk}.
|
||||
\ordersection{4456 Synthesizer Mirny}
|
||||
|
||||
\section*{}
|
||||
\vspace*{\fill}
|
||||
|
||||
\input{footnote.tex}
|
||||
\finalfootnote
|
||||
|
||||
\end{document}
|
||||
|
|
132
5432.tex
132
5432.tex
|
@ -1,4 +1,4 @@
|
|||
\include{preamble.tex}
|
||||
\input{preamble.tex}
|
||||
\graphicspath{{images/5432}{images}}
|
||||
|
||||
\title{5432 DAC Zotino}
|
||||
|
@ -13,30 +13,26 @@
|
|||
\section{Features}
|
||||
|
||||
\begin{itemize}
|
||||
\item{32-channel DAC.}
|
||||
\item{16-bits resolution.}
|
||||
\item{1 MSPS shared between all channels.}
|
||||
\item{Output voltage $\pm$10V.}
|
||||
\item{HD68 connector.}
|
||||
\item{Can be broken out to BNC/SMA/MCX.}
|
||||
\item{32-channel DAC}
|
||||
\item{16-bits resolution}
|
||||
\item{1 MSPS shared between all channels}
|
||||
\item{Output voltage $\pm$10V}
|
||||
\item{HD68 connector}
|
||||
\item{Can be broken out to BNC/SMA/MCX}
|
||||
\end{itemize}
|
||||
|
||||
\section{Applications}
|
||||
|
||||
\begin{itemize}
|
||||
\item{Controlling setpoints of PID controllers for laser power stabilization.}
|
||||
\item{Low-frequency arbitrary waveform generation.}
|
||||
\item{Driving DC electrodes in ion traps.}
|
||||
\item{Controlling setpoints of PID controllers for laser power stabilization}
|
||||
\item{Low-frequency arbitrary waveform generation}
|
||||
\item{Driving DC electrodes in ion traps}
|
||||
\end{itemize}
|
||||
|
||||
\section{General Description}
|
||||
The 5432 Zotino is a 4hp EEM module part of the ARTIQ Sinara family.
|
||||
It adds digital-analog converting capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
|
||||
The 5432 Zotino is a 4hp EEM module and part of the ARTIQ/Sinara family. It adds digital-analog conversion capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
|
||||
|
||||
It provides 4 groups of 8 analog channels each, exposed by 1 HD68 connector.
|
||||
Each channel supports output voltage from -10 V to 10 V.
|
||||
All channels can be updated simultaneously.
|
||||
Channels can broken out to BNC, SMA or MCX by adding external 5518 BNC-IDC, 5528 SMA-IDC or 5538 MCX-IDC cards.
|
||||
It provides four groups of eight analog channels each, exposed by one HD68 connector. Each channel supports output voltage from -10 V to 10 V. All channels can be updated simultaneously. Channels can broken out to BNC, SMA or MCX by adding external 5518 BNC-IDC, 5528 SMA-IDC or 5538 MCX-IDC cards.
|
||||
|
||||
% Switch to next column
|
||||
\vfill\break
|
||||
|
@ -115,24 +111,33 @@ Channels can broken out to BNC, SMA or MCX by adding external 5518 BNC-IDC, 5528
|
|||
\caption{Simplified Block Diagram}
|
||||
\end{figure}
|
||||
|
||||
\begin{figure}[h]
|
||||
|
||||
\begin{figure}[hbt!]
|
||||
\centering
|
||||
\includegraphics[height=2in]{Zotino_FP.jpg}
|
||||
\includegraphics[height=2in]{photo5432.jpg}
|
||||
\caption{Zotino Card photo}
|
||||
\caption{Zotino card photograph}
|
||||
\end{figure}
|
||||
|
||||
|
||||
\begin{figure}[hbt!]
|
||||
\centering
|
||||
\includegraphics[height=2.3in, angle=90]{Zotino_FP.jpg}
|
||||
\caption{Zotino front panel}
|
||||
\end{figure}
|
||||
|
||||
% For wide tables, a single column layout is better. It can be switched
|
||||
% page-by-page.
|
||||
\onecolumn
|
||||
|
||||
\sourcesection{5432 DAC Zotino}{https://github.com/sinara-hw/Zotino/}
|
||||
|
||||
\section{Electrical Specifications}
|
||||
|
||||
% \hypersetup{hidelinks}
|
||||
% \urlstyle{same}
|
||||
The specifications are based on the datasheet of the DAC IC
|
||||
(AD5372BCPZ\footnote{\label{dac}https://www.analog.com/media/en/technical-documentation/data-sheets/AD5372\_5373.pdf}),
|
||||
and various information from Sinara wiki\footnote{\label{zotino_wiki}https://github.com/sinara-hw/Zotino/wiki}.
|
||||
These specifications are based on the datasheet of the DAC IC
|
||||
(AD5372BCPZ\footnote{\label{dac}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/AD5372\_5373.pdf}}),
|
||||
and various information from the Sinara wiki\footnote{\label{zotino_wiki}\url{https://github.com/sinara-hw/Zotino/wiki}}.
|
||||
|
||||
\begin{table}[h]
|
||||
\centering
|
||||
|
@ -157,9 +162,7 @@ and various information from Sinara wiki\footnote{\label{zotino_wiki}https://git
|
|||
\end{threeparttable}
|
||||
\end{table}
|
||||
|
||||
The following are cross-talk and transient behavior of Zotino\footnote{\label{zotino21}https://github.com/sinara-hw/Zotino/issues/21}.
|
||||
In terms of output noise, it was measured after 15 cm IDC cable, IDC-SMA, 100 cm coax ($\sim$50 pF), and 500 k$\Omega$ $||$ 150 pF\footnote{\label{zotino27}https://github.com/sinara-hw/Zotino/issues/27}.
|
||||
The DAC output during noise measurement is 3.5 V.
|
||||
The following table records the cross-talk and transient behavior of Zotino\footnote{\label{zotino21}\url{https://github.com/sinara-hw/Zotino/issues/21}}. In terms of output noise, measurements were made after a 15-cm IDC cable, IDC-SMA, 100 cm coax ($\sim$50 pF), and 500 k$\Omega$ $||$ 150 pF\footnote{\label{zotino27}\url{https://github.com/sinara-hw/Zotino/issues/27}}. DAC output during noise measurement was 3.5 V.
|
||||
|
||||
\begin{table}[h]
|
||||
\centering
|
||||
|
@ -194,7 +197,7 @@ The DAC output during noise measurement is 3.5 V.
|
|||
|
||||
\newpage
|
||||
|
||||
Step response are found by setting the DAC register to 0x0000 (-10V) or 0xFFFF (10V) and observe the waveform\repeatfootnote{zotino21}.
|
||||
Step response was found by setting the DAC register to 0x0000 (-10V) or 0xFFFF (10V) and observing the waveform\repeatfootnote{zotino21}.
|
||||
|
||||
\begin{figure}[hbt!]
|
||||
\centering
|
||||
|
@ -207,12 +210,12 @@ Step response are found by setting the DAC register to 0x0000 (-10V) or 0xFFFF (
|
|||
\caption{Step response}%
|
||||
\end{figure}
|
||||
|
||||
Far-end crosstalk is measured using the following setup\repeatfootnote{zotino21}.
|
||||
Far-end crosstalk was measured using the following setup\repeatfootnote{zotino21}:
|
||||
|
||||
\begin{enumerate}
|
||||
\item CH1 as aggressor, CH0 as victim
|
||||
\item CH0, 2-7 terminated, CH 8-31 open
|
||||
\item Aggressor signal from BNC passed through 15cm IDC26, 2m HD68-HD68 SCSI-3 shielded twisted pair, 15cm IDC26, converted back to BNC with adapters between all different cables \& connectors.
|
||||
\item Aggressor signal from BNC passed through 15cm IDC26, 2m HD68-HD68 SCSI-3 shielded twisted pair, 15cm IDC26, converted back to BNC with adapters between all different cables and connectors.
|
||||
\end{enumerate}
|
||||
|
||||
\begin{figure}[hbt!]
|
||||
|
@ -223,83 +226,24 @@ Far-end crosstalk is measured using the following setup\repeatfootnote{zotino21}
|
|||
|
||||
\newpage
|
||||
|
||||
\section{Front Panel Drawings}
|
||||
\begin{multicols}{2}
|
||||
\codesection{5432 DAC Zotino}
|
||||
|
||||
\begin{center}
|
||||
\centering
|
||||
\includegraphics[height=3in]{zotino_drawings.pdf}
|
||||
\captionof{figure}{5432 DAC Zotino front panel drawings}
|
||||
\end{center}
|
||||
|
||||
\begin{center}
|
||||
\captionof{table}{Bill of Material (Standalone)}
|
||||
\tiny
|
||||
\begin{tabular}{|c|c|c|c|}
|
||||
\hline
|
||||
Index & Part No. & Qty & Description \\ \hline
|
||||
1 & 90503572 & 1 & FRONT PANEL 3U 4HP PIU TYPE2 \\ \hline
|
||||
2 & 3020716 & 0.02 & SLEEVE GREY PLAS.M2.5 (100PCS) \\ \hline
|
||||
3 & 3218843 & 2 & FP-ALIGNMENT PIN (LOCALIZATION) \\ \hline
|
||||
\end{tabular}
|
||||
\end{center}
|
||||
|
||||
\columnbreak
|
||||
|
||||
\begin{center}
|
||||
\centering
|
||||
\includegraphics[height=3in]{zotino_assembly.pdf}
|
||||
\captionof{figure}{5432 DAC Zotino front panel assembly}
|
||||
\end{center}
|
||||
|
||||
\begin{center}
|
||||
\captionof{table}{Bill of Material (Assembled)}
|
||||
\tiny
|
||||
\begin{tabular}{|c|c|c|c|}
|
||||
\hline
|
||||
Index & Part No. & Qty & Description \\ \hline
|
||||
1 & 90503572 & 1 & FP-LYKJ 3U4HP PANEL \\ \hline
|
||||
2 & 3001012 & 2 & SCR M2.5*6 PAN PHL NI DIN7985 \\ \hline
|
||||
3 & 3010110 & 0.02 & WASHER PLN.M2.7 DIN125 (100X) \\ \hline
|
||||
4 & 3010124 & 0.1 & EMC GASKET FABRIC 3U (10PCS) \\ \hline
|
||||
5 & 3033098 & 0.02 & SCREW COLLAR M2.5X12.3 (100X) \\ \hline
|
||||
6 & 3040012 & 1 & HANDLE 4HP GREY PLASTIC \\ \hline
|
||||
7 & 3040138 & 2 & PB HOLDER DIE-CAST \\ \hline
|
||||
8 & 3207075 & 0.01 & SCR M2.5*12 PAN 100 21101-221 \\ \hline
|
||||
9 & 3201099 & 0.01 & SCR M2.5*8 OVL PHL ST NI 100EA \\ \hline
|
||||
\end{tabular}
|
||||
\end{center}
|
||||
|
||||
\end{multicols}
|
||||
\newpage
|
||||
|
||||
\section{Example ARTIQ code}
|
||||
The sections below demonstrate simple usage scenarios of the 5432 DAC Zotino card with the ARTIQ control system.
|
||||
They do not exhaustively demonstrate all the features of the ARTIQ system.
|
||||
The full documentation for the ARTIQ software and gateware is available at \url{https://m-labs.hk}.
|
||||
|
||||
\subsection{Set output voltage}
|
||||
The following example initializes the Zotino card, then emits 1.0 V, 2.0 V, 3.0 V and 4.0 V at channel 0, 1, 2, 3 respectively.
|
||||
Voltages of all 4 channels are updated simultaneously with the use of \texttt{set\char`_dac()}.
|
||||
\subsection{Setting output voltage}
|
||||
The following example initializes the Zotino card, then emits 1.0 V, 2.0 V, 3.0 V and 4.0 V at channels 0, 1, 2, and 3 respectively. Voltages of all 4 channels are updated simultaneously with the use of \texttt{set\char`_dac()}.
|
||||
|
||||
\inputcolorboxminted{firstline=11,lastline=22}{examples/zotino.py}
|
||||
|
||||
\newpage
|
||||
|
||||
\subsection{Triangular Wave}
|
||||
A triangular waveform at 10 Hz, 16 V peak-to-peak.
|
||||
Timing accuracy of the RTIO system can be demonstrated by the precision of the frequency.
|
||||
\subsection{Triangular wave}
|
||||
Generates a triangular waveform at 10 Hz, 16 V peak-to-peak. Timing accuracy of the RTIO system can be demonstrated by the precision of the frequency.
|
||||
|
||||
Import \texttt{scipy.signal} and \texttt{numpy} modules to run this example.
|
||||
|
||||
\inputcolorboxminted{firstline=30,lastline=49}{examples/zotino.py}
|
||||
|
||||
\section{Ordering Information}
|
||||
To order, please visit \url{https://m-labs.hk} and select the 5432 DAC Zotino in the ARTIQ Sinara crate configuration tool. The card may also be ordered separately by writing to \url{mailto:sales@m-labs.hk}.
|
||||
\ordersection{5432 DAC Zotino}
|
||||
|
||||
\section*{}
|
||||
\vspace*{\fill}
|
||||
|
||||
\input{footnote.tex}
|
||||
\finalfootnote
|
||||
|
||||
\end{document}
|
||||
|
|
155
5518-5528.tex
155
5518-5528.tex
|
@ -1,4 +1,4 @@
|
|||
\include{preamble.tex}
|
||||
\input{preamble.tex}
|
||||
\graphicspath{{images/5518-5528}{images}}
|
||||
|
||||
\title{5518 BNC-IDC / 5528 SMA-IDC}
|
||||
|
@ -13,31 +13,27 @@
|
|||
\section{Features}
|
||||
|
||||
\begin{itemize}
|
||||
\item{8 channels.}
|
||||
\item{Internal IDC connector.}
|
||||
\item{External BNC or SMA connectors.}
|
||||
\item{8 channels}
|
||||
\item{Internal IDC connector}
|
||||
\item{External BNC or SMA connectors}
|
||||
\end{itemize}
|
||||
|
||||
\section{Applications}
|
||||
|
||||
\begin{itemize}
|
||||
\item{Breaks out analog signals.}
|
||||
\item{Break out analog signals}
|
||||
\item{BNC or SMA adapters for: \begin{itemize}
|
||||
\item{5432 DAC Zotino}
|
||||
\item{5632 DAC Fastino}
|
||||
\end{itemize}}
|
||||
\item{(5528 only) SMA adapter for 5108 Sampler.}
|
||||
\item{Convert from/to HD68 with 5568 HD68-IDC.}
|
||||
\item{(5528 only) SMA adapter for 5108 Sampler}
|
||||
\item{Convert from/to HD68 with 5568 HD68-IDC}
|
||||
\end{itemize}
|
||||
|
||||
\section{General Description}
|
||||
The 5518 BNC-IDC card is a 8hp EEM module, while the 5528 SMA-IDC card is a 4hp EEM module.
|
||||
Both adapter cards break out analog signal from IDC connectors to BNC (5518) or SMA (5528).
|
||||
IDC connectors can be found on 5108 Sampler, 5432 DAC Zotino, 5632 DAC Fastino \& 5568 HD68-IDC.
|
||||
The 5518 BNC-IDC card is a 8hp EEM module; the 5528 SMA-IDC card is a 4hp EEM module. Both adapter cards break out analog signals from IDC connectors to BNC (5518) or SMA (5528). IDC connectors can be found on 5108 Sampler, 5432 DAC Zotino, 5632 DAC Fastino and 5568 HD68-IDC.
|
||||
|
||||
Each card provides 8 channels, with BNC (5518) or SMA (5528) connectors.
|
||||
Breaking out all 32 channels from 5432 DAC Zotino, 5632 DAC Fastino or 5568 HD68-IDC requires 4 BNC/SMA-IDC cards.
|
||||
Only 1 BNC/SMA-IDC is required to break out all 8 ADC channels from a 5108 Sampler.
|
||||
Each card provides 8 channels, with respectively BNC or SMA connectors. Breaking out all 32 channels of 5432 DAC Zotino, 5632 DAC Fastino or 5568 HD68-IDC requires four BNC/SMA-IDC cards. Breaking out all 8 ADC channels of 5108 Sampler requires only one BNC/SMA-IDC card.
|
||||
|
||||
% Switch to next column
|
||||
\vfill\break
|
||||
|
@ -171,15 +167,12 @@ Only 1 BNC/SMA-IDC is required to break out all 8 ADC channels from a 5108 Sampl
|
|||
\begin{figure}[hbt!]
|
||||
\centering
|
||||
\subfloat[\centering BNC-IDC]{{
|
||||
\includegraphics[height=2.5in]{BNC_IDC_FP.jpg}
|
||||
\includegraphics[height=2.5in]{photo5518.jpg}
|
||||
}}%
|
||||
\subfloat[\centering SMA-IDC]{{
|
||||
\quad
|
||||
\includegraphics[height=2.5in]{SMA_IDC_FP.pdf}
|
||||
\quad
|
||||
\includegraphics[height=2.6in]{photo5528.jpg}
|
||||
}}%
|
||||
\caption{BNC-IDC/SMA-IDC Card photos}%
|
||||
\caption{BNC-IDC/SMA-IDC card photos}%
|
||||
\label{fig:example}%
|
||||
\end{figure}
|
||||
|
||||
|
@ -187,39 +180,41 @@ Only 1 BNC/SMA-IDC is required to break out all 8 ADC channels from a 5108 Sampl
|
|||
% page-by-page.
|
||||
\onecolumn
|
||||
|
||||
\sourcesectiond{5518 BNC-IDC}{5528 SMA-IDC}{https://github.com/sinara-hw/BNC\_IDC}{https://github.com/sinara-hw/SMA\_IDC\_Adapter}
|
||||
|
||||
\section{Electrical Specifications}
|
||||
|
||||
Specifications of parameters are based on the datasheet of the
|
||||
common mode line filter\footnote{\label{cm_choke}https://www.we-online.com/catalog/datasheet/744229.pdf}.
|
||||
common mode line filter\footnote{\label{cm_choke}\url{https://www.we-online.com/catalog/datasheet/744229.pdf}}.
|
||||
\begin{table}[h]
|
||||
\centering
|
||||
\begin{threeparttable}
|
||||
\caption{Electrical Specifications}
|
||||
\begin{tabularx}{0.65\textwidth}{l | c | c | c | X}
|
||||
\begin{tabularx}{0.65\textwidth}{l | c | c | X}
|
||||
\thickhline
|
||||
\textbf{Parameter} & \textbf{Symbol} & \textbf{Max. Value} & \textbf{Unit} & \textbf{Conditions} \\
|
||||
\textbf{Parameter} & \textbf{Max. Value} & \textbf{Unit} & \textbf{Conditions} \\
|
||||
\hline
|
||||
Rated voltage & $V_{R}$ & 80 & V & \\
|
||||
Rated voltage & 80 & V & \\
|
||||
\hline
|
||||
Rated current & $I_{R}$ & 400 & mA & $\Delta T^{*}=40K$ \\
|
||||
Rated current & 400 & mA & $\Delta T^{*}=40K$ \\
|
||||
\thickhline
|
||||
\end{tabularx}
|
||||
*$\Delta T$ refers to the temperature of the CM line filter minus the ambient.
|
||||
\end{threeparttable}
|
||||
\end{table}
|
||||
|
||||
Impedance characteristics of common mode \& differential mode signal at different frequencies are shown in the following graph.
|
||||
Impedance characteristics of common mode \& differential mode signal at different frequencies are shown in the following graph:
|
||||
|
||||
\begin{figure}[H]
|
||||
\centering
|
||||
\includegraphics[]{idc_cm_choke.pdf}
|
||||
\includegraphics[height=4.8in]{idc_cm_choke.jpg}
|
||||
\caption{Common Mode Line Filter Impedance Characteristics}
|
||||
\end{figure}
|
||||
|
||||
\newpage
|
||||
|
||||
\section{Channel Mapping}
|
||||
The following table shows the corresponding channel number of the BNC/SMA-IDC adapter IO ports, when it is connected to Sinara cards that support IDC connections.
|
||||
The following table shows the corresponding channel numbers of the BNC/SMA-IDC adapter IO ports when connected to Sinara cards that support IDC connections.
|
||||
\begin{table}[h]
|
||||
\caption{Channel Mapping of BNC/SMA-IDC to Zotino, Fastino \& HD68-IDC}
|
||||
\centering
|
||||
|
@ -238,116 +233,14 @@ The following table shows the corresponding channel number of the BNC/SMA-IDC ad
|
|||
\centering
|
||||
\begin{tabular}{|l|l|l|l|l|l|l|l|l|}
|
||||
\hline
|
||||
& IO 0 & IO 1 & IO 2 & IO 3 & IO 4 & IO 5 & IO 6 & IO 7 \\ \hline
|
||||
& IO 0 & IO 1 & IO 2 & IO 3 & IO 4 & IO 5 & IO 6 & IO 7 \\ \hline
|
||||
Sampler Ch. & \multicolumn{1}{c|}{7} & \multicolumn{1}{c|}{6} & \multicolumn{1}{c|}{5} & \multicolumn{1}{c|}{4} & \multicolumn{1}{c|}{3} & \multicolumn{1}{c|}{2} & \multicolumn{1}{c|}{1} & \multicolumn{1}{c|}{0} \\ \hline
|
||||
\end{tabular}
|
||||
\end{table}
|
||||
|
||||
\section{Front Panel Drawings}
|
||||
\ordersection{5518 BNC-IDC/5528 SMA-IDC}
|
||||
|
||||
\begin{multicols}{2}
|
||||
\finalfootnote
|
||||
|
||||
\begin{center}
|
||||
\centering
|
||||
\includegraphics[height=2.7in]{bnc_idc_drawings.pdf}
|
||||
\captionof{figure}{5518 BNC-IDC front panel drawings}
|
||||
\end{center}
|
||||
|
||||
\begin{center}
|
||||
\captionof{table}{Bill of Material (5518 Standalone)}
|
||||
\tiny
|
||||
\begin{tabular}{|c|c|c|c|}
|
||||
\hline
|
||||
Index & Part No. & Qty & Description \\ \hline
|
||||
1 & 90506946 & 1 & FP-FRONT PANEL, EXTRUDED, TYPE 2, STATIC, 3Ux8HP \\ \hline
|
||||
2 & 3218843 & 2 & FP-ALIGNMENT PIN (LOCALIZATION) \\ \hline
|
||||
3 & 3020716 & 0.04 & SLEEVE GREY PLAS.M2.5 (100PCS) \\ \hline
|
||||
\end{tabular}
|
||||
\end{center}
|
||||
|
||||
\columnbreak
|
||||
|
||||
\begin{center}
|
||||
\centering
|
||||
\includegraphics[height=2.7in]{bnc_idc_assembly.pdf}
|
||||
\captionof{figure}{5518 BNC-IDC front panel assembly}
|
||||
\end{center}
|
||||
|
||||
\begin{center}
|
||||
\captionof{table}{Bill of Material (5518 Assembled)}
|
||||
\tiny
|
||||
\begin{tabular}{|c|c|c|c|}
|
||||
\hline
|
||||
Index & Part No. & Qty & Description \\ \hline
|
||||
1 & 90506946 & 1 & FP-LYKJ 3U8HP PANEL \\ \hline
|
||||
2 & 3033098 & 0.04 & SCREW COLLAR M2.5X12.3 (100X) \\ \hline
|
||||
3 & 3040138 & 2 & PB HOLDER DIE-CAST \\ \hline
|
||||
4 & 3001012 & 2 & SCR M2.5*6 PAN PHL NI DIN7985 \\ \hline
|
||||
5 & 3010110 & 0.02 & WASHER PLN.M2.7 DIN125 (100X) \\ \hline
|
||||
6 & 3201099 & 0.01 & SCR M2.5*8 OVL PHL ST NI (100EA) \\ \hline
|
||||
7 & 3040005 & 1 & HANDLE 8HP GREY PLASTIC \\ \hline
|
||||
8 & 3207076 & 0.01 & SCR M2.5*16 PAN 100 21101-222 \\ \hline
|
||||
9 & 3201130 & 0.01 & NUT M2.5 HEX ST NI KIT (100PCS) \\ \hline
|
||||
10 & 3211232 & 1 & SCR M2.5*14 PAN PHL SS \\ \hline
|
||||
11 & 3010124 & 0.1 & EMC GASKET FABRIC 3U (10PCS) \\ \hline
|
||||
\end{tabular}
|
||||
\end{center}
|
||||
\end{multicols}
|
||||
|
||||
\begin{multicols}{2}
|
||||
|
||||
\begin{center}
|
||||
\centering
|
||||
\includegraphics[height=3in]{sma_idc_drawings.pdf}
|
||||
\captionof{figure}{5528 SMA-IDC front panel drawings}
|
||||
\end{center}
|
||||
|
||||
\begin{center}
|
||||
\captionof{table}{Bill of Material (5528 Standalone)}
|
||||
\tiny
|
||||
\begin{tabular}{|c|c|c|c|}
|
||||
\hline
|
||||
Index & Part No. & Qty & Description \\ \hline
|
||||
1 & 90506946 & 1 & FRONT PANEL 3U 4HP PIU TYPE2 \\ \hline
|
||||
2 & 3020716 & 0.02 & SLEEVE GREY PLAS.M2.5 (100PCS) \\ \hline
|
||||
3 & 3218843 & 2 & FP-ALIGNMENT PIN (LOCALIZATION) \\ \hline
|
||||
\end{tabular}
|
||||
\end{center}
|
||||
|
||||
\columnbreak
|
||||
|
||||
\begin{center}
|
||||
\centering
|
||||
\includegraphics[height=3in]{sma_idc_assembly.pdf}
|
||||
\captionof{figure}{5528 SMA-IDC front panel assembly}
|
||||
\end{center}
|
||||
|
||||
\begin{center}
|
||||
\captionof{table}{Bill of Material (5528 Assembled)}
|
||||
\tiny
|
||||
\begin{tabular}{|c|c|c|c|}
|
||||
\hline
|
||||
Index & Part No. & Qty & Description \\ \hline
|
||||
1 & 90506949 & 1 & FP-LYKJ 3U4HP PANEL \\ \hline
|
||||
2 & 3001012 & 2 & SCR M2.5*6 PAN PHL NI DIN7985 \\ \hline
|
||||
3 & 3010110 & 0.02 & WASHER PLN.M2.7 DIN125 (100X) \\ \hline
|
||||
4 & 3010124 & 0.1 & EMC GASKET FABRIC 3U (10PCS) \\ \hline
|
||||
5 & 3040012 & 1 & HANDLE 4HP GREY PLASTIC \\ \hline
|
||||
6 & 3040138 & 2 & PB HOLDER DIE-CAST \\ \hline
|
||||
7 & 3201099 & 0.01 & SCR M2.5*8 OVL PHL ST NI (100EA) \\ \hline
|
||||
8 & 3207075 & 0.01 & SCR M2.5*12 PAN 100 21101-221 \\ \hline
|
||||
9 & 3033098 & 0.02 & SCREW COLLAR M2.5X12.3 (100X) \\ \hline
|
||||
\end{tabular}
|
||||
\end{center}
|
||||
\end{multicols}
|
||||
|
||||
\section{Ordering Information}
|
||||
To order, please visit \url{https://m-labs.hk} and select the 5518 BNC-IDC/5528 SMA-IDC in the ARTIQ Sinara crate configuration tool.
|
||||
The card may also be ordered separately by writing to \url{mailto:sales@m-labs.hk}.
|
||||
|
||||
\section*{}
|
||||
\vspace*{\fill}
|
||||
|
||||
\input{footnote.tex}
|
||||
|
||||
\end{document}
|
||||
|
|
41
5568.tex
41
5568.tex
|
@ -1,4 +1,4 @@
|
|||
\include{preamble.tex}
|
||||
\input{preamble.tex}
|
||||
\graphicspath{{images/5568}{images}}
|
||||
|
||||
\title{5568 HD68-IDC}
|
||||
|
@ -13,9 +13,9 @@
|
|||
\section{Features}
|
||||
|
||||
\begin{itemize}
|
||||
\item{32 channels.}
|
||||
\item{Internal IDC connector.}
|
||||
\item{External HD68 connectors.}
|
||||
\item{32 channels}
|
||||
\item{Internal IDC connector}
|
||||
\item{External HD68 connectors}
|
||||
\end{itemize}
|
||||
|
||||
\section{Applications}
|
||||
|
@ -32,12 +32,9 @@
|
|||
\end{itemize}
|
||||
|
||||
\section{General Description}
|
||||
The 5568 HD68-IDC card is a 4hp EEM module part of the ARTIQ Sinara family.
|
||||
It is an adapter that converts IDC connection from/to HD68 connection.
|
||||
It connects to an external HD68 cable to 5518 BNC-IDC or 5528 SMA-IDC cards.
|
||||
The 5568 HD68-IDC card is a 4hp EEM module, part of the ARTIQ/Sinara family. It is an adapter card that converts IDC connections to or from HD68 connections. It can be connected via external HD68 cable to 5518 BNC-IDC or 5528 SMA-IDC cards.
|
||||
|
||||
Each card support 32 channels, with 1 HD68 connector and 4 IDC connectors.
|
||||
Each IDC connector supports 8 channels, while all 32 channels are accessible using an external HD68 cable.
|
||||
Each card supports 32 channels, with one HD68 connector and four IDC connectors. Each IDC connector supports 8 channels. All 32 channels can be accessed using an external HD68 cable.
|
||||
|
||||
% Switch to next column
|
||||
\vfill\break
|
||||
|
@ -71,34 +68,30 @@ Each IDC connector supports 8 channels, while all 32 channels are accessible usi
|
|||
|
||||
\begin{figure}[h]
|
||||
\centering
|
||||
\includegraphics[height=2.1in]{HD68_IDC_FP.pdf}
|
||||
\includegraphics[height=2.1in]{photo5568.jpg}
|
||||
\caption{HD68-IDC Card photo}
|
||||
\includegraphics[height=3.5in, angle=90]{photo5568.jpg}
|
||||
\includegraphics[height=3in, angle=90]{HD68_IDC_FP.pdf}
|
||||
\caption{Card and front panel}
|
||||
\end{figure}
|
||||
|
||||
% For wide tables, a single column layout is better. It can be switched
|
||||
% page-by-page.
|
||||
\onecolumn
|
||||
|
||||
\sourcesection{5568 HD68-IDC}{https://github.com/sinara-hw/IDC_HD68_Adapter}
|
||||
|
||||
\section{Cable Connection Diagram}
|
||||
The 5568 HD68-IDC card can convert signal from HD68 format to IDC format.
|
||||
In the Sinara family, analog output of 5432 DAC Zotino \& 5632 DAC Fastino cards are exported using HD68 connectors.
|
||||
To break out the analog signal in a different crate, connect 5568 HD68-IDC with the DAC card using an external SCSI cable.
|
||||
Then, plug in IDC cables to the appropriate IDC connectors to break out the signal to 5518 BNC-IDC or 5528 SMA-IDC cards.
|
||||
The 5568 HD68-IDC card can convert signals from HD68 format to IDC format. Within the Sinara family, the analog output of 5432 DAC Zotino \& 5632 DAC Fastino cards is exported using HD68 connectors. To break out the analog signal into a different crate, connect 5568 HD68-IDC with the DAC card using an external SCSI cable. Then plug in IDC cables to the appropriate IDC connectors to break out the signal to e.g. 5518 BNC-IDC, 5528 SMA-IDC, or 5538 MCX-IDC.
|
||||
|
||||
The cable connections for 5568 HD68-IDC can be seen in the diagram below.
|
||||
|
||||
\begin{figure}[h]
|
||||
\centering
|
||||
\includegraphics[height=5in]{hd68_idc_connection.pdf}
|
||||
\includegraphics[height=4in]{hd68_idc_connection.pdf}
|
||||
\caption{HD68-IDC connection diagram}
|
||||
\end{figure}
|
||||
|
||||
\section{Ordering Information}
|
||||
To order, please visit \url{https://m-labs.hk} and select the 5568 HD68-IDC in the ARTIQ Sinara crate configuration tool.
|
||||
The card may also be ordered separately by writing to \url{mailto:sales@m-labs.hk}.
|
||||
\ordersection{5568 HD68-IDC}
|
||||
|
||||
\section*{}
|
||||
\vspace*{\fill}
|
||||
|
||||
\input{footnote.tex}
|
||||
\finalfootnote
|
||||
|
||||
\end{document}
|
||||
|
|
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Reference in New Issue