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317d8970c0 remove footnote.tex 2024-12-12 16:30:19 +01:00
307553067c 5108: spellcheck, remove noise density graph 2024-12-12 16:17:28 +01:00
c3a87290ce 5432: spellcheck, style 2024-11-17 20:42:11 +01:00
9 changed files with 118 additions and 274 deletions

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5108.tex
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@ -1,4 +1,4 @@
\include{preamble.tex}
\input{preamble.tex}
\graphicspath{{images/5108}{images}}
\title{5108 ADC Sampler}
@ -13,34 +13,29 @@
\section{Features}
\begin{itemize}
\item{8-channel ADC.}
\item{16-bits resolution.}
\item{1.5 MSPS simultaneously on all channels.}
\item{Full scale input voltage $\pm$10mV to $\pm$10V.}
\item{BNC connector.}
\item{SMA breakout with 5528 SMA-IDC adapter.}
\item{8-channel ADC}
\item{16-bits resolution}
\item{1.5 MSPS simultaneously on all channels}
\item{Full scale input voltage, $\pm$10mV to $\pm$10V}
\item{BNC connector}
\item{SMA breakout with 5528 SMA-IDC adapter}
\end{itemize}
\section{Applications}
\begin{itemize}
\item{Sample intermediate-frequency (IF) waveform.}
\item{Monitor laser power with a photodiode.}
\item{Synchronize laser frequencies with a phase frequency detector.}
\item{Form a laser intensity servo with 4410 Urukul.}
\item{Sample intermediate-frequency (IF) waveform}
\item{Monitor laser power with a photodiode}
\item{Synchronize laser frequencies with a phase frequency detector}
\item{Form a laser intensity servo with 4410 Urukul}
\end{itemize}
\section{General Description}
The 5108 ADC Sampler is a 8hp EEM module part of the ARTIQ Sinara family.
It adds analog-digital converting capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
The 5108 ADC Sampler is a 8hp EEM module, part of the ARTIQ/Sinara family. It adds analog-digital converting capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
It provides 8 analog-to-digital channels, each exposed by a BNC connector.
Each channel supports input voltage ranges from \textpm 10mV to \textpm 10V.
All channels can be sampled simultaneously.
Channels can broken out to SMA by adding a 5528 SMA-IDC card.
It provides eight analog-to-digital channels, exposed by eight BNC connectors. Each channel supports input voltage ranges from \textpm 10mV to \textpm 10V. All channels can be sampled simultaneously. Channels can broken out to SMA by adding a 5528 SMA-IDC card.
5108 ADC Sampler provides a sample rate of 1.5 MSPS.
However, the sample rate in practice is typically limited by the use of ARTIQ-Python kernel code.
5108 ADC Sampler provides a sample rate of 1.5 MSPS. However, the sample rate in practice is typically limited by the use of ARTIQ-Python kernel code.
% Switch to next column
\vfill\break
@ -134,7 +129,7 @@ However, the sample rate in practice is typically limited by the use of ARTIQ-Py
\begin{scope}[xshift=1.2cm, yshift=1.925cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
\draw (0.4,0) to[short,-o](0.75,0);
\draw (0.78,0)-- +(30:0.46);
\draw (1.25,0)to[short,o-](1.6,0) ;
\draw (1.25,0)to[short,o-](1.6,0) ;
\end{scope}
% Dwar IDC Port (ADC IN)
@ -254,17 +249,19 @@ However, the sample rate in practice is typically limited by the use of ARTIQ-Py
\caption{Simplified Block Diagram}
\end{figure}
\begin{figure}[h]
\begin{figure}[hbt!]
\centering
\includegraphics[height=1.9in]{Sampler_FP.jpg}
\includegraphics[height=1.9in]{photo5108.jpg}
\caption{Sampler Card photo}
\includegraphics[height=2.3in]{photo5108.jpg}
\includegraphics[height=2.5in, angle=90]{Sampler_FP.jpg}
\caption{Sampler card and front panel}
\end{figure}
% For wide tables, a single column layout is better. It can be switched
% page-by-page.
\onecolumn
\sourcesection{5108 ADC Sampler}{https://github.com/sinara-hw/Sampler}
\section{Electrical Specifications}
\begin{table}[h]
@ -292,9 +289,9 @@ However, the sample rate in practice is typically limited by the use of ARTIQ-Py
\end{table}
The electrical characteristics are based on various test results\footnote{\label{sinara226}https://github.com/sinara-hw/sinara/issues/226}\textsuperscript{,}
\footnote{\label{sinara489}https://github.com/sinara-hw/sinara/issues/489}\textsuperscript{,}
\footnote{\label{sampler2}https://github.com/sinara-hw/Sampler/issues/2}.
The electrical characteristics are based on various test results\footnote{\label{sinara226}\url{https://github.com/sinara-hw/sinara/issues/226}}\textsuperscript{,}
\footnote{\label{sinara489}\url{https://github.com/sinara-hw/sinara/issues/489}}\textsuperscript{,}
\footnote{\label{sampler2}\url{https://github.com/sinara-hw/Sampler/issues/2}}.
\begin{table}[hbt!]
\centering
@ -322,6 +319,18 @@ The electrical characteristics are based on various test results\footnote{\label
& & 206.3 & & LSB RMS & Termination off \\
% \hline
DC cross-talk\repeatfootnote{sinara226} & & & -96 & dB & 1x gain\\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\begin{table}[h]
\begin{threeparttable}
\caption{Electrical Characteristics (cont.)}
\begin{tabularx}{\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions / Comments} \\
\hline
% AC cross-talk data on wiki is also outdated (when it was still novo)
% sinara-hw/sinara #489 is a better source of info
@ -331,49 +340,33 @@ The electrical characteristics are based on various test results\footnote{\label
& & -51 & & dBc & 0.1 V\textsubscript{pp} (-48dBFS), limited by ADC (-100dBFS) \\
& & -69 & & dBc & 1 V\textsubscript{pp} (-28dBFS) \\
& & -58.8 & & dBc & 10 V\textsubscript{pp} (-8dBFS) \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\newpage
\begin{table}[h]
\begin{threeparttable}
\caption{Electrical Characteristics (cont.)}
\begin{tabularx}{\textwidth}{l | c | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions / Comments} \\
\hline
Common-mode rejection ratio\repeatfootnote{sinara226} & CMRR & & & & & 2 V\textsubscript{pp} sine wave as CM input, termination on\\
\hspace{12mm} 1x gain & & & & -98 & dB & $f=0.01,0.1,1$ kHz \\
& & & -87 & & dB & $f=10$ kHz \\
& & & -55 & & dB & $f=100$ kHz \\
& & & -83 & & dB & $f=1$ MHz \\
& & & -85 & & dB & $f=10$ MHz \\
\cline{3-7}
\hspace{12mm} 100x gain & & & & -118 & dB & $f=0.01$ kHz \\
& & & -98 & & dB & $f=0.1$ kHz \\
& & & -88 & & dB & $f=1$ kHz \\
& & & -70 & & dB & $f=10$ kHz \\
& & & -50 & & dB & $f=100$ kHz \\
& & & -80 & & dB & $f=1$ MHz \\
& & & & -118 & dB & $f=10$ MHz \\
Common-mode rejection ratio\repeatfootnote{sinara226} & & & & & 2 V\textsubscript{pp} sine wave as CM input, termination on\\
\hspace{12mm} 1x gain & & & -98 & dB & $f=0.01,0.1,1$ kHz \\
& & -87 & & dB & $f=10$ kHz \\
& & -55 & & dB & $f=100$ kHz \\
& & -83 & & dB & $f=1$ MHz \\
& & -85 & & dB & $f=10$ MHz \\
\cline{2-6}
\hspace{12mm} 100x gain & & & -118 & dB & $f=0.01$ kHz \\
& & -98 & & dB & $f=0.1$ kHz \\
& & -88 & & dB & $f=1$ kHz \\
& & -70 & & dB & $f=10$ kHz \\
& & -50 & & dB & $f=100$ kHz \\
& & -80 & & dB & $f=1$ MHz \\
& & & -118 & dB & $f=10$ MHz \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\newpage
\subsection{Channel crosstalk}
Crosstalk between ADC channels of 5108 ADC Sampler is shown below\repeatfootnote{sinara489}.
A 10 V\textsubscript{pp} signal is the input.
The aggressor channel always has 1x gain.
All channels have 50 \textOmega~termination enabled.
A 10 V\textsubscript{pp} signal was used as the input. The aggressor channel always has 1x gain. All channels have 50 \textOmega~termination enabled.
Data is acquired by taking 512 samples at 80 kHz sampling rate 20 times to average out the FFT.
Data was acquired by taking 512 samples at 80 kHz sampling rate 20 times to average out the FFT.
\newcolumntype{Y}{>{\centering\arraybackslash}X}
@ -427,7 +420,7 @@ Data is acquired by taking 512 samples at 80 kHz sampling rate 20 times to avera
\end{threeparttable}
\end{table}
\newpage
\clearpage
% The plots are quite small given that it is 8-plots-in-1, but the numbers should give a better picture
\begin{figure}[hbt!]
@ -465,7 +458,7 @@ Data is acquired by taking 512 samples at 80 kHz sampling rate 20 times to avera
\end{threeparttable}
\end{table}
\newpage
\clearpage
\begin{figure}[hbt!]
\centering
@ -473,38 +466,14 @@ Data is acquired by taking 512 samples at 80 kHz sampling rate 20 times to avera
\caption{Crosstalk with 300 kHz input frequency, 1x gain on victim, channel 3 as the aggressor}
\end{figure}
Noise density is measured using the following configuration\repeatfootnote{sampler2}:
\begin{enumerate}
\item 1/12\textmu s sampling rate
\item 10k samples per measurement, averaging over 100 measurements
\item Measured at channels 6 \& 7. Channel 6 has the 50\textOmega~termination on, channel 7 has it off
\end{enumerate}
Noise density with respect to different gain settings with termination on/off are plotted below.
\subsection{Bandwidth}
\begin{multicols}{2}
\begin{figure}[H]
\includegraphics[width=3.3in]{sampler_noise_term.png}
\caption{Noise density with termination enabled}
\end{figure}
\columnbreak
\begin{figure}[H]
\includegraphics[width=3.3in]{sampler_noise_no_term.png}
\caption{Noise density with termination disabled}
\end{figure}
\end{multicols}
\newpage
Bandwidth of small signal and large signal input is shown below\repeatfootnote{sampler2}. The setup is as the following:
Bandwidth of small signal and large signal input is shown below\repeatfootnote{sampler2}. The setup is as follows:
\begin{enumerate}
\itemsep0em
\item 10k samples, sampled at 79.37 kHz
\item Driven by sinusoid from Keysight 33500B generator; Sampled using channel 7 without termination
\item Small signal measured using 2V\textsubscript{pp}/gain; Large signal measured using 15V\textsubscript{pp}/gain
\item Driven by sinusoid from Keysight 33500B generator; sampled using channel 7 without termination
\item Small signal measured using 2V\textsubscript{pp}/gain; large signal measured using 15V\textsubscript{pp}/gain
\end{enumerate}
\begin{multicols}{2}
@ -524,66 +493,13 @@ Bandwidth of small signal and large signal input is shown below\repeatfootnote{s
\newpage
\section{Front Panel Drawings}
\begin{multicols}{2}
\begin{center}
\centering
\includegraphics[height=2.7in]{sampler_drawings.pdf}
\captionof{figure}{5108 ADC Sampler front panel drawings}
\end{center}
\columnbreak
\begin{center}
\centering
\includegraphics[height=2.7in]{sampler_assembly.pdf}
\captionof{figure}{5108 ADC Sampler front panel assembly}
\end{center}
\end{multicols}
\begin{multicols}{2}
\begin{center}
\captionof{table}{Bill of Material (Standalone)}
\tiny
\begin{tabular}{|c|c|c|c|}
\hline
Index & Part No. & Qty & Description \\ \hline
1 & 90504202 & 1 & FP-FRONT PANEL, EXTRUDED, TYPE 2, STATIC, 3Ux8HP \\ \hline
2 & 3218843 & 2 & FP-ALIGNMENT PIN (LOCALIZATION) \\ \hline
3 & 3020716 & 0.04 & SLEEVE GREY PLAS.M2.5 (100PCS) \\ \hline
\end{tabular}
\end{center}
\columnbreak
\begin{center}
\captionof{table}{Bill of Material (Assembled)}
\tiny
\begin{tabular}{|c|c|c|c|}
\hline
Index & Part No. & Qty & Description \\ \hline
1 & 90504202 & 1 & FP-LYKJ 3U4HP PANEL \\ \hline
2 & 3033098 & 0.04 & SCREW COLLAR M2.5X12.3 (100X) \\ \hline
3 & 3040138 & 2 & PB HOLDER DIE-CAST \\ \hline
4 & 3001012 & 2 & SCR M2.5*6 PAN PHL NI DIN7985 \\ \hline
5 & 3010110 & 0.02 & WASHER PLN.M2.7 DIN125 (100X) \\ \hline
6 & 3201099 & 0.01 & SCR M2.5*8 OVL PHL ST NI 100EA \\ \hline
7 & 3040005 & 1 & HANDLE 8HP GREY PLASTIC \\ \hline
8 & 3207076 & 0.01 & SCR M2.5*12 PAN 100 21101-222 \\ \hline
9 & 3201130 & 0.01 & NUT M2.5 HEX ST NI KIT (100PCS) \\ \hline
10 & 3211232 & 1 & SCR M2.5*14 PAN PHL SS \\ \hline
\end{tabular}
\end{center}
\end{multicols}
\section{Configuring Termination}
\begin{multicols}{2}
The input termination can be configured by switches.
The per-channel termination switches are found at the middle left part of the card.
The input termination must be configured by setting physical switches on the board. The termination switches are found at the middle left part of the card are by-channel. Switching the termination switches on adds a 50\textOmega~termination between the differential input signals.
Switching on the termination switch adds a 50\textOmega~termination between the differential input signals.
Regardless of switch configurations, the differential input signals are separately terminated with 100k\textOmega~to the PCB ground.
Regardless of the switch configurations, the differential input signals are separately terminated with 100k\textOmega~to the PCB ground.
\vspace*{\fill}
\columnbreak
\begin{center}
\centering
@ -592,48 +508,41 @@ Regardless of the switch configurations, the differential input signals are sepa
\end{center}
\end{multicols}
\newpage
\section{Example ARTIQ code}
The sections below demonstrate simple usage scenarios of the 5108 ADC Sampler card with the ARTIQ control system.
They do not exhaustively demonstrate all the features of the ARTIQ system.
The full documentation for the ARTIQ software and gateware is available at \url{https://m-labs.hk}.
\codesection{5108 ADC Sampler}
\subsection{Get input voltage}
The following example initializes the Sampler card with 1x gain on all ADC channels.
Sample all ADC channels at the end.
The following example initializes the Sampler card with 1x gain on all ADC channels. At the end all ADC channels are sampled.
\inputcolorboxminted{firstline=9,lastline=21}{examples/sampler.py}
\subsection{Voltage-controlled DDS Amplitude (SU-Servo Only)}
The SU-Servo feature can be enabled by integrating the 5108 ADC Sampler with 4410 DDS Urukuls.
Amplitude of the DDS output can be controlled by the ADC input of the Sampler through PI control, characterised by the following transfer function.
\newpage
\subsection{Voltage-controlled DDS amplitude (SU-Servo only)}
SU-Servo configuration can be enabled by integrating the 5108 ADC Sampler with 4410 DDS Urukul. Amplitude of the DDS output can be controlled by the ADC input of the Sampler through PI control, characterised by the following transfer function:
\[H(s)=k_p+\frac{k_i}{s+\frac{k_i}{g}}\]
In the following example, the amplitude of DDS is proportional to the ADC input from Sampler.
First, initialize the RTIO, SU-Servo and its channel with 1x gain.
\inputcolorboxminted{firstline=10,lastline=17}{examples/suservo.py}
Next, setup the PI control as an IIR filter. It has -1 proportional gain $k_p$ and no integrator gain $k_i$.
Next, set up the PI control as an IIR filter. It has -1 proportional gain $k_p$ and no integrator gain $k_i$.
\inputcolorboxminted{firstline=18,lastline=25}{examples/suservo.py}
Then, configure the DDS frequency to 10 MHz with 3V input offset.
When input voltage $\geq$ offset voltage, the DDS output amplitude is 0.
Then, configure the DDS frequency to 10 MHz with 3V input offset. When input voltage $\geq$ offset voltage, the DDS output amplitude is 0.
\inputcolorboxminted{firstline=26,lastline=30}{examples/suservo.py}
SU-Servo encodes the ADC voltage in a linear scale [-1, 1].
Therefore, 3V is converted to 0.3.
Note that the ASF of all DDS channels are capped at 1.0, the amplitude clips when ADC input $\leq -7V$ with the above IIR filter.
SU-Servo encodes the ADC voltage in a linear scale [-1, 1]. Therefore, 3V is converted to 0.3. Note that the ASF of all DDS channels are capped at 1.0; the amplitude clips when ADC input $\leq -7V$ with the above IIR filter.
Finally, enable the SU-Servo channel with the IIR filter programmed beforehand.
Finally, enable the SU-Servo channel with the IIR filter programmed beforehand:
\inputcolorboxminted{firstline=32,lastline=33}{examples/suservo.py}
A 10 MHz DDS signal is generated from the example above, with amplitude controllable by ADC.
The RMS voltage of the DDS channel against the ADC voltage is plotted.
The DDS channel is terminated with 50\textOmega.
\newpage
A 10 MHz DDS signal is generated from the example above, with amplitude controllable by ADC. The RMS voltage of the DDS channel against the ADC voltage is plotted. The DDS channel is terminated with 50\textOmega.
\begin{center}
\begin{tikzpicture}[
@ -666,16 +575,10 @@ The DDS channel is terminated with 50\textOmega.
\end{tikzpicture}
\end{center}
DDS signal should be attenuated.
High output power affects the linearity due to the 1 dB compression point of the amplifier at 13 dBm output power.
15 dB attenuation at the digital attenuator was applied in this example.
DDS signal should be attenuated. High output power affects the linearity due to the 1 dB compression point of the amplifier at 13 dBm output power. 15 dB attenuation at the digital attenuator was applied in this example.
\section{Ordering Information}
To order, please visit \url{https://m-labs.hk} and select the 5108 ADC Sampler in the ARTIQ Sinara crate configuration tool. The card may also be ordered separately by writing to \url{mailto:sales@m-labs.hk}.
\ordersection{5108 ADC Sampler}
\section*{}
\vspace*{\fill}
\input{footnote.tex}
\finalfootnote
\end{document}

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5432.tex
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@ -1,4 +1,4 @@
\include{preamble.tex}
\input{preamble.tex}
\graphicspath{{images/5432}{images}}
\title{5432 DAC Zotino}
@ -13,30 +13,26 @@
\section{Features}
\begin{itemize}
\item{32-channel DAC.}
\item{16-bits resolution.}
\item{1 MSPS shared between all channels.}
\item{Output voltage $\pm$10V.}
\item{HD68 connector.}
\item{Can be broken out to BNC/SMA/MCX.}
\item{32-channel DAC}
\item{16-bits resolution}
\item{1 MSPS shared between all channels}
\item{Output voltage $\pm$10V}
\item{HD68 connector}
\item{Can be broken out to BNC/SMA/MCX}
\end{itemize}
\section{Applications}
\begin{itemize}
\item{Controlling setpoints of PID controllers for laser power stabilization.}
\item{Low-frequency arbitrary waveform generation.}
\item{Driving DC electrodes in ion traps.}
\item{Controlling setpoints of PID controllers for laser power stabilization}
\item{Low-frequency arbitrary waveform generation}
\item{Driving DC electrodes in ion traps}
\end{itemize}
\section{General Description}
The 5432 Zotino is a 4hp EEM module part of the ARTIQ Sinara family.
It adds digital-analog converting capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
The 5432 Zotino is a 4hp EEM module and part of the ARTIQ/Sinara family. It adds digital-analog conversion capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
It provides 4 groups of 8 analog channels each, exposed by 1 HD68 connector.
Each channel supports output voltage from -10 V to 10 V.
All channels can be updated simultaneously.
Channels can broken out to BNC, SMA or MCX by adding external 5518 BNC-IDC, 5528 SMA-IDC or 5538 MCX-IDC cards.
It provides four groups of eight analog channels each, exposed by one HD68 connector. Each channel supports output voltage from -10 V to 10 V. All channels can be updated simultaneously. Channels can broken out to BNC, SMA or MCX by adding external 5518 BNC-IDC, 5528 SMA-IDC or 5538 MCX-IDC cards.
% Switch to next column
\vfill\break
@ -102,7 +98,7 @@ Channels can broken out to BNC, SMA or MCX by adding external 5518 BNC-IDC, 5528
% Thermistor for TEC controller
\draw (6.6, 3.3) node[thermistorshape, scale=0.7, rotate=-90] (thermistor) {};
\draw [latexslim-] (7.85, 3.3) -- (6.75, 3.3);
% Connect the controller to the cooler
\draw [-latexslim] (7.85, 4.2) -- (4.6, 4.2) -- (tec_cooler.north);
@ -115,24 +111,33 @@ Channels can broken out to BNC, SMA or MCX by adding external 5518 BNC-IDC, 5528
\caption{Simplified Block Diagram}
\end{figure}
\begin{figure}[h]
\begin{figure}[hbt!]
\centering
\includegraphics[height=2in]{Zotino_FP.jpg}
\includegraphics[height=2in]{photo5432.jpg}
\caption{Zotino Card photo}
\caption{Zotino card photograph}
\end{figure}
\begin{figure}[hbt!]
\centering
\includegraphics[height=2.3in, angle=90]{Zotino_FP.jpg}
\caption{Zotino front panel}
\end{figure}
% For wide tables, a single column layout is better. It can be switched
% page-by-page.
\onecolumn
\sourcesection{5432 DAC Zotino}{https://github.com/sinara-hw/Zotino/}
\section{Electrical Specifications}
% \hypersetup{hidelinks}
% \urlstyle{same}
The specifications are based on the datasheet of the DAC IC
(AD5372BCPZ\footnote{\label{dac}https://www.analog.com/media/en/technical-documentation/data-sheets/AD5372\_5373.pdf}),
and various information from Sinara wiki\footnote{\label{zotino_wiki}https://github.com/sinara-hw/Zotino/wiki}.
These specifications are based on the datasheet of the DAC IC
(AD5372BCPZ\footnote{\label{dac}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/AD5372\_5373.pdf}}),
and various information from the Sinara wiki\footnote{\label{zotino_wiki}\url{https://github.com/sinara-hw/Zotino/wiki}}.
\begin{table}[h]
\centering
@ -157,9 +162,7 @@ and various information from Sinara wiki\footnote{\label{zotino_wiki}https://git
\end{threeparttable}
\end{table}
The following are cross-talk and transient behavior of Zotino\footnote{\label{zotino21}https://github.com/sinara-hw/Zotino/issues/21}.
In terms of output noise, it was measured after 15 cm IDC cable, IDC-SMA, 100 cm coax ($\sim$50 pF), and 500 k$\Omega$ $||$ 150 pF\footnote{\label{zotino27}https://github.com/sinara-hw/Zotino/issues/27}.
The DAC output during noise measurement is 3.5 V.
The following table records the cross-talk and transient behavior of Zotino\footnote{\label{zotino21}\url{https://github.com/sinara-hw/Zotino/issues/21}}. In terms of output noise, measurements were made after a 15-cm IDC cable, IDC-SMA, 100 cm coax ($\sim$50 pF), and 500 k$\Omega$ $||$ 150 pF\footnote{\label{zotino27}\url{https://github.com/sinara-hw/Zotino/issues/27}}. DAC output during noise measurement was 3.5 V.
\begin{table}[h]
\centering
@ -194,7 +197,7 @@ The DAC output during noise measurement is 3.5 V.
\newpage
Step response are found by setting the DAC register to 0x0000 (-10V) or 0xFFFF (10V) and observe the waveform\repeatfootnote{zotino21}.
Step response was found by setting the DAC register to 0x0000 (-10V) or 0xFFFF (10V) and observing the waveform\repeatfootnote{zotino21}.
\begin{figure}[hbt!]
\centering
@ -207,12 +210,12 @@ Step response are found by setting the DAC register to 0x0000 (-10V) or 0xFFFF (
\caption{Step response}%
\end{figure}
Far-end crosstalk is measured using the following setup\repeatfootnote{zotino21}.
Far-end crosstalk was measured using the following setup\repeatfootnote{zotino21}:
\begin{enumerate}
\item CH1 as aggressor, CH0 as victim
\item CH0, 2-7 terminated, CH 8-31 open
\item Aggressor signal from BNC passed through 15cm IDC26, 2m HD68-HD68 SCSI-3 shielded twisted pair, 15cm IDC26, converted back to BNC with adapters between all different cables \& connectors.
\item Aggressor signal from BNC passed through 15cm IDC26, 2m HD68-HD68 SCSI-3 shielded twisted pair, 15cm IDC26, converted back to BNC with adapters between all different cables and connectors.
\end{enumerate}
\begin{figure}[hbt!]
@ -223,83 +226,24 @@ Far-end crosstalk is measured using the following setup\repeatfootnote{zotino21}
\newpage
\section{Front Panel Drawings}
\begin{multicols}{2}
\codesection{5432 DAC Zotino}
\begin{center}
\centering
\includegraphics[height=3in]{zotino_drawings.pdf}
\captionof{figure}{5432 DAC Zotino front panel drawings}
\end{center}
\begin{center}
\captionof{table}{Bill of Material (Standalone)}
\tiny
\begin{tabular}{|c|c|c|c|}
\hline
Index & Part No. & Qty & Description \\ \hline
1 & 90503572 & 1 & FRONT PANEL 3U 4HP PIU TYPE2 \\ \hline
2 & 3020716 & 0.02 & SLEEVE GREY PLAS.M2.5 (100PCS) \\ \hline
3 & 3218843 & 2 & FP-ALIGNMENT PIN (LOCALIZATION) \\ \hline
\end{tabular}
\end{center}
\columnbreak
\begin{center}
\centering
\includegraphics[height=3in]{zotino_assembly.pdf}
\captionof{figure}{5432 DAC Zotino front panel assembly}
\end{center}
\begin{center}
\captionof{table}{Bill of Material (Assembled)}
\tiny
\begin{tabular}{|c|c|c|c|}
\hline
Index & Part No. & Qty & Description \\ \hline
1 & 90503572 & 1 & FP-LYKJ 3U4HP PANEL \\ \hline
2 & 3001012 & 2 & SCR M2.5*6 PAN PHL NI DIN7985 \\ \hline
3 & 3010110 & 0.02 & WASHER PLN.M2.7 DIN125 (100X) \\ \hline
4 & 3010124 & 0.1 & EMC GASKET FABRIC 3U (10PCS) \\ \hline
5 & 3033098 & 0.02 & SCREW COLLAR M2.5X12.3 (100X) \\ \hline
6 & 3040012 & 1 & HANDLE 4HP GREY PLASTIC \\ \hline
7 & 3040138 & 2 & PB HOLDER DIE-CAST \\ \hline
8 & 3207075 & 0.01 & SCR M2.5*12 PAN 100 21101-221 \\ \hline
9 & 3201099 & 0.01 & SCR M2.5*8 OVL PHL ST NI 100EA \\ \hline
\end{tabular}
\end{center}
\end{multicols}
\newpage
\section{Example ARTIQ code}
The sections below demonstrate simple usage scenarios of the 5432 DAC Zotino card with the ARTIQ control system.
They do not exhaustively demonstrate all the features of the ARTIQ system.
The full documentation for the ARTIQ software and gateware is available at \url{https://m-labs.hk}.
\subsection{Set output voltage}
The following example initializes the Zotino card, then emits 1.0 V, 2.0 V, 3.0 V and 4.0 V at channel 0, 1, 2, 3 respectively.
Voltages of all 4 channels are updated simultaneously with the use of \texttt{set\char`_dac()}.
\subsection{Setting output voltage}
The following example initializes the Zotino card, then emits 1.0 V, 2.0 V, 3.0 V and 4.0 V at channels 0, 1, 2, and 3 respectively. Voltages of all 4 channels are updated simultaneously with the use of \texttt{set\char`_dac()}.
\inputcolorboxminted{firstline=11,lastline=22}{examples/zotino.py}
\newpage
\subsection{Triangular Wave}
A triangular waveform at 10 Hz, 16 V peak-to-peak.
Timing accuracy of the RTIO system can be demonstrated by the precision of the frequency.
\subsection{Triangular wave}
Generates a triangular waveform at 10 Hz, 16 V peak-to-peak. Timing accuracy of the RTIO system can be demonstrated by the precision of the frequency.
Import \texttt{scipy.signal} and \texttt{numpy} modules to run this example.
\inputcolorboxminted{firstline=30,lastline=49}{examples/zotino.py}
\section{Ordering Information}
To order, please visit \url{https://m-labs.hk} and select the 5432 DAC Zotino in the ARTIQ Sinara crate configuration tool. The card may also be ordered separately by writing to \url{mailto:sales@m-labs.hk}.
\ordersection{5432 DAC Zotino}
\section*{}
\vspace*{\fill}
\input{footnote.tex}
\finalfootnote
\end{document}

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\begin{footnotesize}
Information furnished by M-Labs Limited is provided in good faith in the hope that it will be useful. However, no responsibility is assumed by M-Labs Limited for its use. Specifications may be subject to change without notice.
\end{footnotesize}

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