Compare commits

...

21 Commits

Author SHA1 Message Date
486687bb69 working 2025-03-30 22:37:36 +02:00
838997ae33 Makefile: add all cards at once 2025-03-30 13:22:52 +02:00
545a7f2250 gitignore: unused/reference examples 2025-03-30 13:22:52 +02:00
a7c1dee8b6 4410-4412/suservo: add clk_sel details 2025-03-29 17:17:21 +08:00
b0e763336e 4410-4412: add 'Model comparison', fix double EEM section 2025-03-29 17:17:21 +08:00
ffafafe617 5108: fix typo 2025-03-29 17:17:21 +08:00
136d113f28 4410-4412: fixes 2025-03-29 17:17:21 +08:00
7782184723 5108: bump revision number 2025-03-29 17:17:21 +08:00
19d0e4e421 4410-4412: bump revision number 2025-03-29 17:17:21 +08:00
2070147150 4410-4412: LED section 2025-03-29 17:17:21 +08:00
686b5aec03 5108: sysdesc section and SUServo 2025-03-29 17:17:21 +08:00
f8b3290d3e 4410-4412: sysdesc section and SUServo 2025-03-29 17:17:21 +08:00
f9d962db69 suservo: shared file 2025-03-29 17:17:21 +08:00
77d0001542 5108: formatting 2025-03-29 17:17:21 +08:00
42f55a2779 4410-4412: formatting 2025-03-29 17:17:21 +08:00
f3f97ea529 4456-4457: correct AD535x discrepancy 2025-03-29 17:15:02 +08:00
f422666af9 4456-4457: fixes 2025-03-29 17:15:02 +08:00
c9e5210757 4456-4457: add note on LEDs 2025-03-29 17:15:02 +08:00
1eb306e444 4456 -> 4456-4457: add almazny 2025-03-29 17:15:02 +08:00
89d7e84e3f 6302: fixes 2025-03-25 13:53:40 +01:00
511974f0ce 6302: init 2025-03-22 20:34:49 +01:00
49 changed files with 1557 additions and 548 deletions

1
.gitignore vendored
View File

@ -7,3 +7,4 @@ build
result
images/unsorted
examples/unsorted

View File

@ -3,8 +3,8 @@
\title{4410/4412 DDS Urukul}
\author{M-Labs Limited}
\date{January 2022}
\revision{Revision 2}
\date{January 2025}
\revision{Revision 3}
\companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
\begin{document}
@ -12,29 +12,29 @@
\section{Features}
\begin{itemize}
\item{4-channel 1GS/s DDS}
\item{Output frequency from \textless 1 to \textgreater 400 MHz}
\item{Sub-Hz frequency resolution}
\item{Controlled phase steps}
\item{Accurate output amplitude control}
\end{itemize}
\begin{itemize}
\item{4-channel 1GS/s DDS}
\item{Output frequency from \textless 1 to \textgreater 400 MHz}
\item{Sub-Hz frequency resolution}
\item{Controlled phase steps}
\item{Accurate output amplitude control}
\end{itemize}
\section{Applications}
\begin{itemize}
\item{Dynamic low-noise RF source}
\item{Driving RF electrodes in ion traps}
\item{Driving acousto-optic modulators}
\item{Form a laser intensity servo with 5108 Sampler}
\end{itemize}
\begin{itemize}
\item{Dynamic low-noise RF source}
\item{Driving RF electrodes in ion traps}
\item{Driving acousto-optic modulators}
\item{Form a laser intensity servo with 5108 Sampler}
\end{itemize}
\section{General Description}
The 4410/4412 DDS Urukul card is a 4hp EEM module, part of the ARTIQ/Sinara family. It adds frequency generation capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
The 4410/4412 DDS Urukul card is a 4hp EEM module, part of the ARTIQ/Sinara family. It adds frequency generation capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC. It can also be combined with 5018 ADC Sampler to form the ARTIQ SU-Servo configuration.
It provides 4 channels of DDS (direct digital synthesis) at 1GS/s. Output frequencies from \textless 1 to \textgreater 400 MHz are supported. The nominal maximum output power of each channel is 10dBm. Each channel can be attenuated from 0 to -31.5 dB by a digital attenuator. RF switches (1ns temporal resolution) on each channel provide 70 dB isolation.
It provides 4 channels of DDS (direct digital synthesis) at 1GS/s. Output frequencies from \textless 1 to \textgreater 400 MHz are supported. The nominal maximum output power of each channel is 10dBm. Each channel can be attenuated from 0 to -31.5 dB by a digital attenuator. RF switches (1ns temporal resolution) on each channel provide 70 dB isolation.
4410 DDS Urukul features AD9910 chips, while 4412 DDS Urukul features AD9912 chips. AD9912 is capable of higher frequency precision (~8 \textmu Hz) than the AD9910 (~0.25 Hz). The ARTIQ SU-Servo configuration is only available for AD9910.
4410 DDS Urukul features AD9910 chips, while 4412 DDS Urukul features AD9912 chips. These offer slightly different features and specifications. See below for a comparison between the two.
% Switch to next column
\vfill\break
@ -280,117 +280,167 @@ It provides 4 channels of DDS (direct digital synthesis) at 1GS/s. Output freque
\sourcesection{4410/4412 DDS Urukul}{https://github.com/sinara-hw/Urukul/}
\section{Model comparison}
4410 DDS Urukul uses AD9910\repeatfootnote{ad9910} chips, whereas 4412 DDS Urukul uses AD9912\repeatfootnote{ad9912} chips. In general, 4412/AD9912 is capable of much higher frequency resolution, at the cost of more detailed control features provided by 4410/AD9910, such as phase synchronization, digital ramp modulation or DRG, and digital amplitude control. See individual DDS IC datasheets for feature details, especially of AD9910, or ARTIQ code section below for examples of more complex experiments only possible with AD9910. The SUServo configuration is only available for AD9910.
\begin{table}[h]
\centering
\begin{threeparttable}
\caption{Specification Differences}
\begin{tabularx}{0.8\textwidth}{l | c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{AD9910} & \textbf{AD9912} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Resolution & & & & \\
\hspace{3mm} Frequency\repeatfootnote{ad9910}\textsuperscript{,}\repeatfootnote{urukul_wiki} & 0.25 & & Hz & \\
& & 8 & μHz & \\
\hspace{3mm} Phase offset\repeatfootnote{ad9910}\textsuperscript{,}\repeatfootnote{ad9912} & 16 & 14 & bits & \\
\hspace{3mm} DAC full scale current\repeatfootnote{ad9910}\textsuperscript{,}\repeatfootnote{ad9912} & 8 & 10 & bits & \\
\hspace{3mm} Digital amplitude\repeatfootnote{ad9910} & 14 & & bits & \\
\hline
Power consumption\repeatfootnote{urukul_wiki} & 7 & 6.5 & W & 4x 400 MHz, 10.5 dBm, 52°C \\
\hline
ARTIQ SUServo available & Yes & No & & \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\section{Electrical Specifications}
Specifications of parameters are based on the datasheets of the DDS IC
(AD9910\footnote{\label{ad9910}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/AD9910.pdf}},
AD9912\footnote{\label{ad9912}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/AD9912.pdf}}),
clock buffer IC (Si53312\footnote{\label{clock_buffer}\url{https://www.skyworksinc.com/-/media/SkyWorks/SL/documents/public/data-sheets/Si5331x_datasheet.pdf}}),
digital attenuator IC (HMC542BLP4E\footnote{\label{attenuator}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/hmc542b.pdf}}), Sinara project information\footnote{\label{urukul_wiki}\url{https://github.com/sinara-hw/Urukul/wiki\#details-specification-and-typical-performance-data}}
and corresponding test results\footnote{\label{sinara354}\url{https://github.com/sinara-hw/sinara/issues/354\#issuecomment-352859041}}.
\begin{table}[h]
\centering
\begin{threeparttable}
\caption{Recommended Operating Conditions}
\begin{tabularx}{0.9\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Clock input & & & & &\\
\hspace{3mm} Input frequency\repeatfootnote{ad9910}\textsuperscript{,}\repeatfootnote{ad9912} & 10 & & 1000 & MHz & PLL disabled \\
& 3.2 & & 60 & MHz & AD9910, PLL enabled, no clock division \\
& 12.8 & & 240 & MHz & AD9910, PLL enabled, 4x clock division \\
& 11 & & 200 & MHz & AD9912, PLL enabled, no clock division \\
& 44 & & 800 & MHz & AD9912, PLL enabled, 4x clock division \\
\hspace{3mm} Nominal input power\repeatfootnote{clock_buffer} & & 10 & & dBm & \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
Specifications of parameters are based on the datasheets of the DDS IC
(AD9910\footnote{\label{ad9910}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/AD9910.pdf}} ,
AD9912AD9912\footnote{\label{ad9912}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/AD9912.pdf}}),
clock buffer IC (Si53312\footnote{\label{clock_buffer}\url{https://www.skyworksinc.com/-/media/SkyWorks/SL/documents/public/data-sheets/Si5331x_datasheet.pdf}}), digital attenuator IC (HMC542BLP4E\footnote{\label{attenuator}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/hmc542b.pdf}}), Sinara project information\footnote{\label{urukul_wiki}\url{https://github.com/sinara-hw/Urukul/wiki\#details-specification-and-typical-performance-data}} and corresponding test results\footnote{\label{sinara354}\url{https://github.com/sinara-hw/sinara/issues/354\#issuecomment-352859041}}.
\begin{table}[h]
\centering
\begin{threeparttable}
\caption{RF Output Specifications}
\begin{tabularx}{0.9\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Low frequency power\repeatfootnote{sinara354} & & & -20 & dBm & 100 kHz output \\
& & & 10 & dBm & 1 MHz output \\
\hline
Frequency\repeatfootnote{urukul_wiki} & 1 & & 400 & MHz & \\
\hline
Digital attenuation\repeatfootnote{attenuator} & -31.5 & & 0 & dB & \\
\hline
Resolution & & & & & \\
\hspace{3mm} Frequency\repeatfootnote{ad9910}\textsuperscript{,}\repeatfootnote{urukul_wiki} & & 0.25 & & Hz & AD9910 \\
& & 8 & & $\mu$Hz & AD9912 \\
\hspace{3mm} Phase offset\repeatfootnote{ad9910}\textsuperscript{,}\repeatfootnote{ad9912} & & 16/14 & & bits & AD9910/AD9912 respectively \\
\hspace{3mm} Digital amplitude\repeatfootnote{ad9910} & & 14 & & bits & AD9910 \\
\hspace{3mm} DAC full scale current\repeatfootnote{ad9910}\textsuperscript{,}\repeatfootnote{ad9912} & & 8/10 & & bits & AD9910/AD9912 respectively \\
\hspace{3mm} Temporal (I/O Update)\repeatfootnote{urukul_wiki} & & 4 & & ns & \\
\hspace{3mm} Digital attenuation\repeatfootnote{attenuator} & & 0.5 & & dB & \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
The tabulated performance characteristics are produced using the following setup unless otherwise noted:
\begin{itemize}
\item 100 MHz input clock into SMA, 10 dBm
\item Input clock divided by 4
\item PLL with x40 multiplier
\item Output frequency at 80 MHz or 81 MHz
\end{itemize}
\begin{table}[h]
\begin{threeparttable}
\caption{Electrical Characteristics}
\begin{tabularx}{\textwidth}{l | c | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Digital attenuator glitch duration\repeatfootnote{sinara354} & $t_s$ & & 100 & & ns & \\
\hline
RF switch\repeatfootnote{sinara354} & & & & & &\\
\hspace{3mm} Rise to 90\% & $t_{on}$ & & 100 & & ns & \\
\hspace{3mm} Isolation & & & 70 & & dB & \\
\hspace{3mm} Turn-on chirp & $\gamma$ & & & 0.1 & deg/s & Excluding the first $\mu$s\\
\hline
Crosstalk\repeatfootnote{sinara354} & & & -84 & & dB & Victim RF switch opened \\
& & & -110 & & dB & Victim RF switch closed \\
\hline
Cross-channel-intermodulation\repeatfootnote{sinara354} & & & -90 & & dB & \\
\hline
Phase noise\repeatfootnote{sinara354} & $\mathcal{L}(f)$ & & -85 & & dBc/Hz & 0.1 Hz \\
& & & -95 & & dBc/Hz & 1 Hz \\
& & & -107 & & dBc/Hz & 10 Hz \\
& & & -116 & & dBc/Hz & 100 Hz \\
& & & -126 & & dBc/Hz & 1 kHz \\
& & & -133 & & dBc/Hz & 10 kHz \\
& & & -135 & & dBc/Hz & 100 kHz \\
& & & -128 & & dBc/Hz & 1 MHz \\
& & & -149 & & dBc/Hz & 10 MHz \\
\hline
Second-order harmonics\repeatfootnote{sinara354} & & & -40 & & dB & 6 dBm output \\
& & & -34 & & dB & 10.5 dBm output \\
\hline
Third-order harmonics\repeatfootnote{sinara354} & & & -54 & & dB & 6 dBm output \\
& & & -28 & & dB & 10.5 dBm output \\
\hline
Power consumption (AD9910)\repeatfootnote{urukul_wiki} & $P$ & & 7 & & W & 4x 400 MHz, 10.5 dBm, 52\degree C\\
Power consumption (AD9912)\repeatfootnote{urukul_wiki} & $P$ & & 6.5 & & W & 4x 400 MHz, 10.5 dBm, 52\degree C\\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\begin{table}[hbt!]
\centering
\begin{threeparttable}
\caption{Recommended Operating Conditions}
\begin{tabularx}{0.9\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Clock input & & & & & \\
\hspace{3mm} Input frequency\repeatfootnote{ad9910}\textsuperscript{,}\repeatfootnote{ad9912} & 10 & & 1000 & MHz & PLL disabled \\
& 3.2 & & 60 & MHz & AD9910, PLL enabled, no clock division \\
& 12.8 & & 240 & MHz & AD9910, PLL enabled, 4x clock division \\
& 11 & & 200 & MHz & AD9912, PLL enabled, no clock division \\
& 44 & & 800 & MHz & AD9912, PLL enabled, 4x clock division \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\newpage
\begin{table}[hbt!]
\centering
\begin{threeparttable}
\caption{Recommended Operating Conditions, cont.}
\begin{tabularx}{0.9\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
\hspace{3mm} Nominal input power\repeatfootnote{clock_buffer} & & 10 & & dBm & \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\begin{table}[hbt!]
\centering
\begin{threeparttable}
\caption{RF Output Specifications}
\begin{tabularx}{0.9\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Low frequency power\repeatfootnote{sinara354} & & & -20 & dBm & 100 kHz output \\
& & & 10 & dBm & 1 MHz output \\
\hline
Frequency\repeatfootnote{urukul_wiki} & 1 & & 400 & MHz & \\
\hline
Digital attenuation\repeatfootnote{attenuator} & -31.5 & & 0 & dB & \\
\hline
Resolution & & & & & \\
\hspace{3mm} Temporal (I/O Update)\repeatfootnote{urukul_wiki} & & 4 & & ns & \\
\hspace{3mm} Digital attenuation\repeatfootnote{attenuator} & & 0.5 & & dB & \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\begin{table}[hbt!]
\centering
\begin{threeparttable}
\caption{Electrical Characteristics}
\begin{tabularx}{0.9\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Digital attenuator glitch duration\repeatfootnote{sinara354} & & 100 & & ns & \\
\hline
RF switch\repeatfootnote{sinara354} & & & & &\\
\hspace{3mm} Rise to 90\% & & 100 & & ns & \\
\hspace{3mm} Isolation & & 70 & & dB & \\
\hspace{3mm} Turn-on chirp & & & 0.1 & deg/s & Excluding the first $\mu$s\\
\hline
Crosstalk\repeatfootnote{sinara354} & & -84 & & dB & Victim RF switch opened \\
& & -110 & & dB & Victim RF switch closed \\
\hline
Cross-channel-intermodulation\repeatfootnote{sinara354} & & -90 & & dB & \\
\hline
Phase noise\repeatfootnote{sinara354} & & -85 & & dBc/Hz & 0.1 Hz \\
& & -95 & & dBc/Hz & 1 Hz \\
& & -107 & & dBc/Hz & 10 Hz \\
& & -116 & & dBc/Hz & 100 Hz \\
& & -126 & & dBc/Hz & 1 kHz \\
& & -133 & & dBc/Hz & 10 kHz \\
& & -135 & & dBc/Hz & 100 kHz \\
& & -128 & & dBc/Hz & 1 MHz \\
& & -149 & & dBc/Hz & 10 MHz \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\newpage
\begin{table}[hbt!]
\centering
\begin{threeparttable}
\caption{Electrical Characteristics, cont.}
\begin{tabularx}{0.9\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Second-order harmonics\repeatfootnote{sinara354} & & -40 & & dB & 6 dBm output \\
& & -34 & & dB & 10.5 dBm output \\
\hline
Third-order harmonics\repeatfootnote{sinara354} & & -54 & & dB & 6 dBm output \\
& & -28 & & dB & 10.5 dBm output \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
The tabulated performance characteristics above were produced using the following setup unless otherwise noted:
\begin{itemize}
\item 100 MHz input clock into SMA, 10 dBm
\item Input clock divided by 4
\item PLL with x40 multiplier
\item Output frequency at 80 MHz or 81 MHz
\end{itemize}
Harmonic content of the DDS signals from 4410 DDS Urukul is tabulated below\footnote{\label{urukul29}\url{https://github.com/sinara-hw/Urukul/issues/29}}. An external 125 MHz clock signal was supplied.
\newcommand{\ts}{\textsuperscript}
@ -432,6 +482,8 @@ Harmonic content of the DDS signals from 4410 DDS Urukul is tabulated below\foot
\end{threeparttable}
\end{table}
\newpage
\begin{table}[hbt!]
\begin{threeparttable}
\caption{Harmonic content with 10.0 dB digital attenuation}
@ -468,9 +520,7 @@ Harmonic content of the DDS signals from 4410 DDS Urukul is tabulated below\foot
\end{threeparttable}
\end{table}
\newpage
\begin{table}[h]
\begin{table}[hbt!]
\begin{threeparttable}
\caption{Harmonic content with 20.0 dB digital attenuation}
\begin{tabularx}{\textwidth}{| c | Y | Y | Y | Y | Y | Y | Y | Y | Y |}
@ -506,6 +556,8 @@ Harmonic content of the DDS signals from 4410 DDS Urukul is tabulated below\foot
\end{threeparttable}
\end{table}
\newpage
\begin{table}[hbt!]
\begin{threeparttable}
\caption{Harmonic content with 31.5 dB digital attenuation}
@ -542,9 +594,7 @@ Harmonic content of the DDS signals from 4410 DDS Urukul is tabulated below\foot
\end{threeparttable}
\end{table}
\newpage
The RMS voltage of a 4410 DDS Urukul channel at different amplitude scale factors is measured below. The DDS channel is directly connected to an oscilloscope with a 50\textOmega~termination. The reported values are obtained from the oscilloscope.
The RMS voltage of a 4410 DDS Urukul channel at different amplitude scale factors is measured below. The DDS channel is directly connected to an oscilloscope with a 50\textOmega$\sim$termination. The reported values are obtained from the oscilloscope.
\begin{multicols}{2}
\begin{figure}[H]
@ -663,6 +713,8 @@ The RMS voltage of a 4410 DDS Urukul channel at different amplitude scale factor
\end{multicols}
\newpage
The ideal RMS voltage is described by the linear function $V_\mathrm{rms,ideal}(\mathrm{ASF})=\frac{V_\mathrm{rms}(0.1)}{0.1}*\mathrm{ASF}$.
The measured RMS voltage divided by the full scale ideal RMS voltage (i.e. $V_\mathrm{rms,ideal}(1)$) is shown below.
@ -796,91 +848,161 @@ The measured RMS voltage divided by the full scale ideal RMS voltage (i.e. $V_\m
\caption{Attenuator step from 31 to 32 digital\\(major carry glitch)\repeatfootnote{sinara354}}
\end{figure}
\section{Front panel LEDs}
4410/4412 Urukul features a number of indicator LEDs in the front panel. Each of four channel SMA connectors is accompanied by a green LED, used to indicate that RF output is enabled, and a red LED, which activates to indicate a DDS synchronization/PLL issue. Note that when bypassing PLL in ARTIQ (see below) LED may stay on.
Two additional LEDs indicate power good (green) and overtemperature (red).
\newpage
\section{Configuring Operation Mode}
Mode of operation is specified by a DIP switch. The DIP switch can be found at the top right corner of the card. The following table summarizes the required setting for each mode.
\ding{51} indicates ON, while \ding{53} indicates OFF.
\begin{multicols}{2}
Mode of operation is specified by a DIP switch. The DIP switch can be found at the top right corner of the card. The following table summarizes the required setting for each mode.
\ding{51} indicates ON, while \ding{53} indicates OFF.
\begin{center}
\captionof{table}{DIP switch configurations}
\begin{tabular}{|l|cccc|}
\hline
\multicolumn{1}{|c|}{\multirow{2}{*}{Mode}} & \multicolumn{4}{c|}{DIP Switch} \\ \cline{2-5}
\multicolumn{1}{|c|}{} & \multicolumn{1}{c|}{1} & \multicolumn{1}{c|}{2} & \multicolumn{1}{c|}{3} & 4 \\ \hline
Default & \multicolumn{1}{c|}{\ding{53}} & \multicolumn{1}{c|}{\ding{53}} & \multicolumn{1}{c|}{\ding{53}} & \ding{53} \\ \hline
SU-Servo & \multicolumn{1}{c|}{\ding{51}} & \multicolumn{1}{c|}{\ding{51}} & \multicolumn{1}{c|}{\ding{53}} & \ding{53} \\ \hline
\end{tabular}
\end{center}
\begin{multicols}{2}
\columnbreak
\begin{center}
\captionof{table}{DIP switch configurations}
\begin{tabular}{|l|cccc|}
\hline
\multicolumn{1}{|c|}{\multirow{2}{*}{Mode}} & \multicolumn{4}{c|}{DIP Switch} \\ \cline{2-5}
\multicolumn{1}{|c|}{} & \multicolumn{1}{c|}{1} & \multicolumn{1}{c|}{2} & \multicolumn{1}{c|}{3} & 4 \\ \hline
Default & \multicolumn{1}{c|}{\ding{53}} & \multicolumn{1}{c|}{\ding{53}} & \multicolumn{1}{c|}{\ding{53}} & \ding{53} \\ \hline
SU-Servo & \multicolumn{1}{c|}{\ding{51}} & \multicolumn{1}{c|}{\ding{51}} & \multicolumn{1}{c|}{\ding{53}} & \ding{53} \\ \hline
\end{tabular}
\end{center}
\begin{center}
\centering
\includegraphics[height=1.5in]{urukul_dip_switch.jpg}
\captionof{figure}{Position of DIP switch}
\end{center}
\columnbreak
\end{multicols}
\begin{center}
\centering
\includegraphics[height=1.5in]{urukul_dip_switch.jpg}
\captionof{figure}{Position of DIP switch}
\end{center}
\end{multicols}
\section{Urukul Single-/Double-EEM Modes}
4410/4412 DDS Urukul cards can operate with either a single or double EEM connections. When only EEM0 is connected, the card will act in single-EEM mode; when both EEM0 and EEM1 are connected, the card will act in double-EEM mode. 2-EEM mode when both EEM0 \& EEM1 are connected. Double-EEM mode provides these additional features in comparison to single-EEM mode:
\begin{itemize}
\item \textbf{1 ns temporal resolution RF switches} \\
Without EEM1, the only way to access the switches is through the CPLD, using SPI. \\
With EEM1, RF switches can be controlled as a TTL output through the LVDS transceiver. 1 ns temporal resolution can then be achieved using the ARTIQ RTIO system.
4410/4412 DDS Urukul cards can operate with either a single or double EEM connections. When only EEM0 is connected, the card will act in single-EEM mode; when both EEM0 and EEM1 are connected, the card will act in double-EEM mode.
\item \textbf{SU-Servo (4410 DDS Urukul feature)} \\
SU-Servo requires both EEM0 \& EEM1 to allow the control of multiple DDS channels simultaneously using the QSPI interface.
Double-EEM mode additionally provides 1 ns temporal resolution RF switches. Without EEM1, the only way to access the switches is through the CPLD, using SPI. With EEM1, RF switches can be controlled as a TTL output through the LVDS transceiver. 1 ns temporal resolution can then be achieved using the ARTIQ RTIO system. Double-EEM mode is also recommended for the SUServo configuration.
\end{itemize}
\sysdescsection
4410/4412 Urukul should be entered in the peripherals list of the corresponding core device in the following format:
\begin{tcolorbox}[colback=white]
\begin{minted}{json}
{
"type": "urukul",
"dds": "ad9910", // or "ad9912", as appropriate
"ports": [0, 1], // second port is optional
"synchronization": true, // or false, for AD9910 only
"clk_sel": 2, // select 0 to 2 for clock source
"pll_en": 0 // PLL bypass, for higher external frequencies
"refclk": 125e6, // for external clock signal
}
\end{minted}
\end{tcolorbox}
Replace 0 and 1 with the EEM port numbers used on the core device. Any ports can be used. For single-EEM mode, simply specify only one port. The \texttt{synchronization} field is boolean, false by default, and only applies to AD9910. In the \texttt{clk\_sel} field, \texttt{0} represents the internal 100 MHz oscillator, \texttt{1} represents SMA input, and \texttt{2} represents MMCX input. The \texttt{pll\_en} field may be specified \texttt{0} or \texttt{1} and is \texttt{1} by default.
Note that the SUServo configuration requires a different system description entry. See SUServo section below.
\newpage
\codesection{4410/4412 DDS Urukul}
\subsection{10 MHz sinusoidal wave}
Generates a 10MHz sinusoid from RF0 with full scale amplitude, attenuated by 6 dB. Both the CPLD and the DDS channels should be initialized. By default, AD9910 single-tone profiles are programmed to profile 7.
For details of AD9910 capabilities, operation modes, profiles, signals, etc., see also the corresponding datasheet, e.g. \url{https://www.analog.com/media/en/technical-documentation/data-sheets/AD9910.pdf}.
\inputcolorboxminted{firstline=11,lastline=18}{examples/dds.py}
\subsection{10 MHz sinusoidal wave}
If the synchronization feature of AD9910 is enabled, RF signal across different channels of the same Urukul can be synchronized. For example, phase-coherent RF signal can be produced on both channel 0 and channel 1 after configuring an appropriate phase mode.
Generates a 10MHz sinusoid from RF0 with full scale amplitude, attenuated by 6 dB. Both the CPLD and the DDS channels should be initialized. By default, AD9910 single-tone profiles are programmed to profile 7.
\inputcolorboxminted{firstline=28,lastline=43}{examples/dds.py}
\inputcolorboxminted{firstline=11,lastline=18}{examples/dds.py}
Note that the phase difference between the 2 channels might not be exactly 0.25 turns, but it is a constant. It can be negated by adjusting the \texttt{phase} parameter.
If the synchronization feature of AD9910 is enabled, RF signal across different channels of the same Urukul can be synchronized. For example, phase-coherent RF signal can be produced on both channel 0 and channel 1 after configuring an appropriate phase mode.
\inputcolorboxminted{firstline=28,lastline=43}{examples/dds.py}
Note that the phase difference between the 2 channels might not be exactly 0.25 turns, but it is a constant. It can be negated by adjusting the \texttt{phase} parameter.
\newpage
\subsection{Periodic RF pulse (AD9910 Only)}
This example demonstrates that the RF signal can be modulated by amplitude using the RAM modulation feature of the AD9910. By default, RAM profiles are programmed to profile 0.
\inputcolorboxminted{firstline=53,lastline=91}{examples/dds.py}
\subsection{Periodic RF pulse (AD9910 Only)}
The generated RF output of the above example consists of the following features in sequence:
\begin{enumerate}
\item A 5 MHz RF pulse for 2 microseconds.
\item No signal for 1 microseconds.
\item A 5 MHz RF pulse for 1 microseconds.
\item No signal for 3 microseconds.
\item Go back to item 1.
\end{enumerate}
The expected waveform is plotted on the following figure. Note that phase of the RF pulses may drift gradually.
Urukul was operated with a 50$\Omega$ termination to produce the waveform.
This example demonstrates that the RF signal can be modulated by amplitude using the RAM modulation feature of the AD9910. By default, RAM profiles are programmed to profile 0.
\begin{tikzpicture}[
declare function={
func(\x)= (\x<0) * (0) +
and(\x>=0, \x<2) * (0.42*cos(deg(10*pi*\x))) +
and(\x>=2, \x<3) * (0) +
and(\x>=3, \x<4) * (0.42*cos(deg(10*pi*\x))) +
and(\x>=4, \x<7) * (0) +
and(\x>=7, \x<7.5) * (0.42*cos(deg(10*pi*\x)));
}
]
\begin{axis}[
axis x line=middle, axis y line=middle,
\inputcolorboxminted{firstline=53,lastline=91}{examples/dds.py}
The generated RF output of the above example consists of the following features in sequence:
\begin{enumerate}
\item A 5 MHz RF pulse for 2 microseconds.
\item No signal for 1 microseconds.
\item A 5 MHz RF pulse for 1 microseconds.
\item No signal for 3 microseconds.
\item Go back to item 1.
\end{enumerate}
The expected waveform is plotted on the following figure. Note that phase of the RF pulses may drift gradually. Urukul was operated with 50$\Omega$ termination for this waveform.
\begin{tikzpicture}[
declare function={
func(\x)= (\x<0) * (0) +
and(\x>=0, \x<2) * (0.42*cos(deg(10*pi*\x))) +
and(\x>=2, \x<3) * (0) +
and(\x>=3, \x<4) * (0.42*cos(deg(10*pi*\x))) +
and(\x>=4, \x<7) * (0) +
and(\x>=7, \x<7.5) * (0.42*cos(deg(10*pi*\x)));
}
]
\begin{axis}[
axis x line=middle, axis y line=middle,
every axis x label/.style={
at={(ticklabel* cs:1.05)},
anchor=west,
},
every axis y label/.style={
at={(ticklabel* cs:1.05)},
anchor=south,
},
height=5cm,
width=16cm,
ymin=-0.5, ymax=0.5, ytick={-0.42,0.42}, ylabel=Voltage ($V$),
xmin=-0.5, xmax=7.5, xtick={0,...,7}, xlabel=Time ($\mu s$),
]
\addplot[blue, samples=1000, domain=-0.5:7.5]{func(x)};
\end{axis}
\end{tikzpicture}
\subsection{Simple amplitude ramp (AD9910 only)}
An amplitude ramp of an RF signal can be generated by modifying the \texttt{self.amp} array in the previous example.
\inputcolorboxminted{firstline=95,lastline=98}{examples/dds.py}
The generated RF output has an incrementing amplitude scale factor (ASF), increasing by 0.1 at every microsecond. Once the ASF reaches 1.0, it drops back to 0.0 at the next microsecond. The expected waveform over 1 cycle is plotted on the following figure. Note that phase of the RF pulses may drift gradually. Urukul was operated with 50$\Omega$ termination for this waveform.
\begin{tikzpicture}[
declare function={
func(\x)= and(\x>=0, \x<1) * (0) +
and(\x>=1, \x<2) * (0.05*cos(deg(10*pi*\x))) +
and(\x>=2, \x<3) * (0.1*cos(deg(10*pi*\x))) +
and(\x>=3, \x<4) * (0.15*cos(deg(10*pi*\x))) +
and(\x>=4, \x<5) * (0.2*cos(deg(10*pi*\x))) +
and(\x>=5, \x<6) * (0.25*cos(deg(10*pi*\x))) +
and(\x>=6, \x<7) * (0.3*cos(deg(10*pi*\x))) +
and(\x>=7, \x<8) * (0.35*cos(deg(10*pi*\x))) +
and(\x>=8, \x<9) * (0.4*cos(deg(10*pi*\x))) +
and(\x>=9, \x<10) * (0.45*cos(deg(10*pi*\x))) +
and(\x>=10, \x<11) * (0.5*cos(deg(10*pi*\x)));
}
]
\begin{axis}[
axis x line=middle, axis y line=middle,
every axis x label/.style={
at={(ticklabel* cs:1.05)},
anchor=west,
@ -889,132 +1011,33 @@ Urukul was operated with a 50$\Omega$ termination to produce the waveform.
at={(ticklabel* cs:1.05)},
anchor=south,
},
height=5cm,
width=16cm,
ymin=-0.5, ymax=0.5, ytick={-0.42,0.42}, ylabel=Voltage ($V$),
xmin=-0.5, xmax=7.5, xtick={0,...,7}, xlabel=Time ($\mu s$),
]
\addplot[blue, samples=1000, domain=-0.5:7.5]{func(x)};
\end{axis}
\end{tikzpicture}
\subsection{Simple amplitude ramp (AD9910 only)}
An amplitude ramp of an RF signal can be generated by modifying the \texttt{self.amp} array in the previous example.
\inputcolorboxminted{firstline=95,lastline=98}{examples/dds.py}
The generated RF output has an incrementing amplitude scale factor (ASF), increasing by 0.1 at every microsecond. Once the ASF reaches 1.0, it drops back to 0.0 at the next microsecond. The expected waveform over 1 cycle is plotted on the following figure. Note that phase of the RF pulses may drift gradually.
Urukul was operated with a 50$\Omega$ termination to produce the waveform.
\begin{tikzpicture}[
declare function={
func(\x)= and(\x>=0, \x<1) * (0) +
and(\x>=1, \x<2) * (0.05*cos(deg(10*pi*\x))) +
and(\x>=2, \x<3) * (0.1*cos(deg(10*pi*\x))) +
and(\x>=3, \x<4) * (0.15*cos(deg(10*pi*\x))) +
and(\x>=4, \x<5) * (0.2*cos(deg(10*pi*\x))) +
and(\x>=5, \x<6) * (0.25*cos(deg(10*pi*\x))) +
and(\x>=6, \x<7) * (0.3*cos(deg(10*pi*\x))) +
and(\x>=7, \x<8) * (0.35*cos(deg(10*pi*\x))) +
and(\x>=8, \x<9) * (0.4*cos(deg(10*pi*\x))) +
and(\x>=9, \x<10) * (0.45*cos(deg(10*pi*\x))) +
and(\x>=10, \x<11) * (0.5*cos(deg(10*pi*\x)));
}
]
\begin{axis}[
axis x line=middle, axis y line=middle,
every axis x label/.style={
at={(ticklabel* cs:1.05)},
anchor=west,
},
every axis y label/.style={
at={(ticklabel* cs:1.05)},
anchor=south,
},
minor tick num=4,
grid=both,
height=8cm,
width=16cm,
ymin=-0.7, ymax=0.7, ytick={-0.5,...,0,...,0.5}, ylabel=Voltage ($V$),
xmin=0, xmax=11.5, xtick={0,...,11}, xlabel=Time ($\mu s$),
]
\addplot[blue, samples=1500, domain=0:11]{func(x)};
\end{axis}
\end{tikzpicture}
minor tick num=4,
grid=both,
height=8cm,
width=16cm,
ymin=-0.7, ymax=0.7, ytick={-0.5,...,0,...,0.5}, ylabel=Voltage ($V$),
xmin=0, xmax=11.5, xtick={0,...,11}, xlabel=Time ($\mu s$),
]
\addplot[blue, samples=1500, domain=0:11]{func(x)};
\end{axis}
\end{tikzpicture}
\newpage
\subsection{RAM synchronization (AD9910 only)}
Multiple RAM channels can also be synchronized. Similar to the 10 MHz single-tone RF signals, specify \texttt{phase} when calling \texttt{dds.set()} in \texttt{configure\char`_ram\char`_mode}. For example, set phase to 0 for the channels (\texttt{phase=0.0}):
\subsection{RAM synchronization (AD9910 only)}
\inputcolorboxminted{firstline=116,lastline=116}{examples/dds.py}
Multiple RAM channels can also be synchronized. Similar to the 10 MHz single-tone RF signals, specify \texttt{phase} when calling \texttt{dds.set()} in \texttt{configure\char`_ram\char`_mode}. For example, set phase to 0 for the channels (\texttt{phase=0.0}):
Then, replace the \texttt{run()} function with the following:
\inputcolorboxminted{firstline=116,lastline=116}{examples/dds.py}
\inputcolorboxminted{firstline=122,lastline=134}{examples/dds.py}
Then, replace the \texttt{run()} function with the following:
Two phase-coherent RF signal with the same waveform as the previous figure (from either RAM examples) should be generated.
\inputcolorboxminted{firstline=122,lastline=134}{examples/dds.py}
\subsection{Voltage-controlled DDS amplitude (SU-Servo only)}
The SU-Servo feature can be enabled by integrating the 4410 DDS Urukul with a 5108 Sampler. Amplitude of the DDS output can be controlled by the ADC input of the Sampler through PI control, characterised by the following transfer function:
Two phase-coherent RF signals with the same waveform as the previous figure (from either RAM examples) should be generated.
\[H(s)=k_p+\frac{k_i}{s+\frac{k_i}{g}}\]
In the following example, the amplitude of DDS is proportional to the ADC input from Sampler. First, initialize the RTIO, SU-Servo and its channel. Note that the programmable gain of the Sampler is $10^0=1$ and the input range is [-10V, 10V].
\inputcolorboxminted{firstline=10,lastline=17}{examples/suservo.py}
Next, setup the PI control as an IIR filter. It has -1 proportional gain $k_p$ and no integrator gain $k_i$.
\inputcolorboxminted{firstline=18,lastline=25}{examples/suservo.py}
Then, configure the DDS frequency to 10 MHz with 3V input offset.
When input voltage $\geq$ offset voltage, the DDS output amplitude is 0.
\inputcolorboxminted{firstline=26,lastline=30}{examples/suservo.py}
SU-Servo encodes the ADC voltage in a linear scale [-1, 1]. Therefore, 3V is converted to 0.3. Note that the ASF of all DDS channels are capped at 1.0 and the amplitude clips when ADC input $\leq -7V$ with the above IIR filter.
Finally, enable the SU-Servo channel with the IIR filter programmed beforehand:
\inputcolorboxminted{firstline=32,lastline=33}{examples/suservo.py}
A 10 MHz DDS signal is generated from the example above, with amplitude controllable by ADC. The RMS voltage of the DDS channel against the ADC voltage is plotted. The DDS channel is terminated with 50\textOmega.
\begin{center}
\begin{tikzpicture}[
declare function={
func(\x)= and(\x>=-10, \x<-7) * (160) +
and(\x>=-7, \x<3) * (16*(3-x)) +
and(\x>=3, \x<10) * (0);
}
]
\begin{axis}[
axis x line=middle, axis y line=middle,
every axis x label/.style={
at={(axis description cs:0.5,-0.1)},
anchor=north,
},
every axis y label/.style={
at={(ticklabel* cs:1.05)},
anchor=south,
},
minor x tick num=3,
grid=both,
height=8cm,
width=12cm,
ymin=-5, ymax=180, ytick={0,16,...,160}, ylabel=DDS RMS Voltage ($mV_{rms}$),
xmin=-10, xmax=10, xtick={-10,-8,...,10}, xlabel=Sampler Voltage ($V$),
]
\addplot[very thick, blue, samples=21, domain=-10:10]{func(x)};
\end{axis}
\end{tikzpicture}
\end{center}
DDS signal should be attenuated. High output power affects the linearity due to the 1 dB compression point of the amplifier at 13 dBm output power. 15 dB attenuation at the digital attenuator was applied in this example.
% Direct input to avoid issues with minted
\input{shared/suservo.tex}
\ordersection{4410/4412 DDS Urukul}

View File

@ -1,10 +1,10 @@
\input{preamble.tex}
\graphicspath{{images/4456}{images}}
\graphicspath{{images/4456-4457}{images}}
\title{4456 Synthesizer Mirny}
\title{4456 Synthesizer Mirny / 4457 HF Synthesizer Mirny + Almazny}
\author{M-Labs Limited}
\date{January 2022}
\revision{Revision 1}
\date{January 2025}
\revision{Revision 2}
\companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
\begin{document}
@ -13,29 +13,27 @@
\section{Features}
\begin{itemize}
\item{4-channel VCO/PLL}
\item{Output frequency ranges from 53 MHz to \textgreater 4 GHz}
\item{Up to 13.6 GHz with Almazny mezzanine}
\item{Higher frequency resolution than Urukul}
\item{Lower jitter and phase noise}
\item{Large frequency changes take several milliseconds}
\item{4-channel wide-band PLL/VCO-based microwave frequency synthesiser}
\item{Output frequency ranges from 53 MHz to \textgreater 4 GHz for 4456 Mirny only}
\item{Up to 12 GHz with 4457 Almazny}
\item{Higher frequency resolution than 4410/4412 Urukul}
\item{Lower jitter, phase noise than 4410/4412 Urukul}
\end{itemize}
\section{Applications}
\begin{itemize}
\item{Low-noise microwave source}
\item{Quantum state control}
\item{Driving acousto/electro-optic modulators}
\item{Low-noise microwave source}
\item{Quantum state control}
\item{Driving acousto/electro-optic modulators}
\end{itemize}
\section{General Description}
The 4456 Synthesizer Mirny card is a 4hp EEM module, part of the ARTIQ/Sinara family. It adds microwave generation capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
The 4456 Synthesizer Mirny card is a 4hp EEM module; the 4457 HF Synthesizer Mirny + Almazny card, consisting of 4456 Mirny plus the 4-channel Almazny HF mezzanine, is a 8hp EEM module. Both Synthesizer cards add microwave generation capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
It provides 4 channels of PLL frequency synthesis. Output frequencies from 53 MHz to \textgreater 4 GHz are supported.The range can be expanded up to 13.6 GHz with the Almazny mezzanine (4467 HF Synthesizer).
Each channel can be attenuated from 0 to -31.5 dB by a digital attenuator. RF switches on each channel provides at least 50 dB isolation.
Both cards provide 4 channels of PLL frequency synthesis. 4456 Synthesizer Mirny supports output frequencies from 53 MHz to \textgreater 4GHz. As 4457 HF Synthesizer with Almazny mezzanine this range is expanded up to 12 GHz.
Each channel can be attenuated from 0 to -31.5 dB by a digital attenuator. RF switches on each channel provide at least 50 dB isolation.
% Switch to next column
\vfill\break
@ -275,158 +273,229 @@ Each channel can be attenuated from 0 to -31.5 dB by a digital attenuator. RF sw
\begin{figure}[hbt!]
\centering
\includegraphics[height=2in]{photo4456.jpg}
\includegraphics[height=3in, angle=90]{Mirny_FP.pdf}
\caption{Mirny card and front panel}
\includegraphics[height=2in]{photo4457.jpg}
\caption{Mirny + Almazny card}
\end{figure}
% For wide tables, a single column layout is better. It can be switched
% page-by-page.
\onecolumn
\sourcesection{4456 Synthesizer Mirny}{https://github.com/sinara-hw/mirny}
\begin{figure}[hbt!]
\subfloat[\centering Mirny and Almazny front panels]{{
\begin{minipage}[b]{0.5\linewidth}
\centering
\includegraphics[height=3in, angle=90]{fp4456.pdf} \\
\vspace{0.2in}
\includegraphics[height=3in, angle=90]{fp4457.pdf}
\vspace{0.25in}
\end{minipage}
}}
\subfloat[\centering Mirny, top-down view]{{
\includegraphics[height=2.5in]{photo4456.jpg}
}}
\end{figure}
\sourcesectiond{4456 Synthesizer Mirny}{the 4457 Almazny mezzanine}{https://github.com/sinara-hw/mirny}{https://github.com/sinara-hw/Almazny}
\section{Electrical Specifications}
Specifications of parameters are based on the datasheets of the PLL IC
(ADF5356\footnote{\label{adf5356}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/ADF5356.pdf}}),
clock buffer IC (Si53340-B-GM\footnote{\label{clock_buffer}\url{https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/si5334x-datasheet.pdf}}),
and digital attenuator IC (HMC542BLP4E\footnote{\label{attenuator}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/hmc542b.pdf}}).
Test results are from Krzysztof Belewicz's thesis. "Microwave synthesizer for driving ion traps in quantum computing"\footnote{\label{mirny_thesis}\url{https://m-labs.hk/Krzysztof\_Belewicz\_V1.1.pdf}}.
Specifications of parameters are based on the datasheets of the PLL IC
(ADF5356\footnote{\label{adf5356}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/ADF5356.pdf}}),
clock buffer IC (Si53340-B-GM\footnote{\label{clock_buffer}\url{https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/si5334x-datasheet.pdf}}),
and digital attenuator IC (HMC542BLP4E\footnote{\label{attenuator}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/hmc542b.pdf}}).
Test results are from Krzysztof Belewicz's thesis. "Microwave synthesizer for driving ion traps in quantum computing"\footnote{\label{mirny_thesis}\url{https://m-labs.hk/Krzysztof\_Belewicz\_V1.1.pdf}}.
\begin{table}[h]
\centering
\begin{threeparttable}
\caption{Recommended Operating Conditions}
\begin{tabularx}{0.9\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
% Note to future editors, the clk_div signal in gateware is not used.
% Input divider was removed (mirny#8)
Clock input & & & & & \\
\hspace{3mm}Frequency\repeatfootnote{adf5356}
& 10 & & 250 & MHz & Single-ended clock input (PLL config.) \\
& 10 & & 600 & MHz & Differential clock input (PLL config.) \\
\cline{2-6}
\hspace{3mm}Differential input swing\repeatfootnote{clock_buffer}
& 0.11 & & 1.55 & V\textsubscript{p-p} & \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\begin{table}[h]
\centering
\begin{threeparttable}
\caption{Recommended Operating Conditions}
\begin{tabularx}{0.9\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
% Note to future editors, the clk_div signal in gateware is not used.
% Input divider was removed (mirny#8)
Clock input & & & & & \\
\hspace{3mm}Frequency\repeatfootnote{adf5356}
& 10 & & 250 & MHz & Single-ended clock input (PLL config.) \\
& 10 & & 600 & MHz & Differential clock input (PLL config.) \\
\cline{2-6}
\hspace{3mm}Differential input swing\repeatfootnote{clock_buffer}
& 0.11 & & 1.55 & V\textsubscript{p-p} & \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\begin{table}[h]
\centering
\begin{threeparttable}
\caption{Output Specifications}
\begin{tabularx}{0.9\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Frequency & 53.125 & & 4000 & MHz & \\
\hline
Digital attenuation\repeatfootnote{attenuator} & -31.5 & & 0 & dB & \\
\hline
Resolution & \multicolumn{4}{c|}{} & \\
\hspace{3mm} Frequency\repeatfootnote{adf5356} & \multicolumn{4}{c|}{52 bits} & \\
\hspace{3mm} Phase offset\repeatfootnote{adf5356} & \multicolumn{4}{c|}{24 bits} & \\
\hspace{3mm} Digital attenuation\repeatfootnote{attenuator} & \multicolumn{4}{c|}{0.5 dB} & \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\begin{table}[h]
\centering
\begin{threeparttable}
\caption{Output Specifications}
\begin{tabularx}{0.9\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Frequency & 53.125 & & 4000 & MHz & 4456 Mirny only \\
& & & 12000 & MHz & With Almazny mezzanine \\
\hline
Digital attenuation\repeatfootnote{attenuator} & -31.5 & & 0 & dB & \\
\hline
\end{tabularx}
\end{threeparttable}
\end{table}
\newpage
Phase noise performance of Mirny was tested using the ADF4351 evaluation kit\repeatfootnote{mirny_thesis}. The SPI signal was driven by the evaluation kit, converted into LVDS signal by propagating through the DIO-tester card, finally arriving at the Mirny card. Mirny was then connected to the RSA5100A spectrum analyzer for measurement.
Noise response spike can be improved by inserting an additional common-mode choke between the power supply and Mirny; note that this common-mode choke is not present on the card itself. The following is a comparison between the two setups at 1 GHz output:
\begin{itemize}
\item Red: Before any modifications
\item Blue: CM choke added with an 100 \textmu F capacitor after the CM choke
\end{itemize}
\begin{figure}[H]
\begin{table}[h]
\centering
\includegraphics[height=3in]{mirny_phase_noise_cm_choke.png}
\caption{Phase noise measurement at 1 GHz}
\end{figure}
\begin{threeparttable}
\caption{Output Specifications, cont.}
\begin{tabularx}{0.9\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Lock time\repeatfootnote{adf5356} & & 1.7 & & ms & \\
\hline
Resolution & & & & \\
\hspace{3mm} Frequency\repeatfootnote{adf5356} & \multicolumn{3}{c|}{52} & bits & \\
\hspace{3mm} Phase offset\repeatfootnote{adf5356} & \multicolumn{3}{c|}{24} & bits & \\
\hspace{3mm} Digital attenuation\repeatfootnote{attenuator} & \multicolumn{3}{c|}{0.5} & dB & \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
Phase noise at different output frequencies is then measured:
Phase noise performance of 4456 Mirny was tested using the ADF4351 evaluation kit\repeatfootnote{mirny_thesis}. The SPI signal was driven by the evaluation kit, converted into LVDS signal by propagating through the DIO-tester card, finally arriving at the Mirny card. 4456 Mirny was then connected to the RSA5100A spectrum analyzer for measurement.
\newcolumntype{Y}{>{\centering\arraybackslash}X}
Noise response spike can be improved by inserting an additional common-mode choke between the power supply and Mirny; note that this common-mode choke is not present on the card itself. The following is a comparison between the two setups at 1 GHz output:
\begin{table}[hbt!]
\centering
\begin{threeparttable}
\caption{Phase noise performance}
\begin{tabularx}{0.8\textwidth}{| c | Y | Y | Y | Y | Y |}
\thickhline
\multirow{2}{*}{\textbf{Output frequency}} &
\multicolumn{5}{c|}{\textbf{Phase noise (dBc/Hz) at carrier offset}}\\
\cline{2-6} & 1 kHz & 10 kHz & 100 kHz & 1 MHz & 10 MHz \\
\hline
125 MHz & -114 & -116 & -115 & -132 & -133 \\
\hline
500 MHz & -107 & -129 & -111 & -130 & -132 \\
\hline
1 GHz & -102 & -106 & -107 & -125 & -133 \\
\hline
2 GHz & -102 & -98 & -104 & -123 & -124 \\
\hline
3.5 GHz & -96 & -101 & -103 & -127 & -128 \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\begin{figure}[H]
\centering
\includegraphics[height=3in]{mirny_phase_noise_cm_choke.png}
\caption{Phase noise measurement at 1 GHz}
\end{figure}
\begin{itemize}
\item Red: Before any modifications
\item Blue: CM choke added with an 100 \textmu F capacitor after the CM choke
\end{itemize}
\newpage
\begin{figure}[H]
Phase noise at different output frequencies is then measured:
\newcolumntype{Y}{>{\centering\arraybackslash}X}
\begin{table}[hbt!]
\centering
\includegraphics[height=3in]{mirny_phase_noise_frequency.png}
\caption{Phase noise measurement}
\end{figure}
\begin{threeparttable}
\caption{Phase noise performance}
\begin{tabularx}{0.8\textwidth}{| c | Y | Y | Y | Y | Y |}
\thickhline
\multirow{2}{*}{\textbf{Output frequency}} &
\multicolumn{5}{c|}{\textbf{Phase noise (dBc/Hz) at carrier offset}}\\
\cline{2-6} & 1 kHz & 10 kHz & 100 kHz & 1 MHz & 10 MHz \\
\hline
125 MHz & -114 & -116 & -115 & -132 & -133 \\
\hline
500 MHz & -107 & -129 & -111 & -130 & -132 \\
\hline
1 GHz & -102 & -106 & -107 & -125 & -133 \\
\hline
2 GHz & -102 & -98 & -104 & -123 & -124 \\
\hline
3.5 GHz & -96 & -101 & -103 & -127 & -128 \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\codesection{4456 Synthesizer Mirny}
\begin{figure}[H]
\centering
\includegraphics[height=3in]{mirny_phase_noise_frequency.png}
\caption{Phase noise measurement}
\end{figure}
\subsection{1 GHz sinusoidal wave}
Generates a 1 GHz sinusoid from RF0 with full scale amplitude, attenuated by 12 dB. Both the CPLD and the PLL channels should be initialized.
\section{Programmable LEDs}
\inputcolorboxminted{firstline=10,lastline=17}{examples/pll.py}
4456 Mirny features several status LEDs, including a two per output channel. One per channel displays RF switch status.
\subsection{ADF5356 power control}
Output power can be controlled be configuring the PLL channels individually in addition to the digital attenuators. After initialization of the PLL channel (ADF5356), the following line of code can change the output power level:
The 4457 Almazny mezzanine features an additional row of LEDs, one per output channel, without a fixed purpose. The associated ARTIQ module allows programming these directly through the channel \texttt{set} method.
\inputcolorboxminted{firstline=28,lastline=28}{examples/pll.py}
\newpage
\sysdescsection
The parameter corresponds to a specific change of output power according to the following table\repeatfootnote{adf5356}.
4456 Synthesizer Mirny must be entered in the \texttt{peripherals} list of the corresponding core device in the following format:
\begin{center}
\captionof{table}{Power changes from ADF5356}
\begin{tabular}{|c|c|}
\hline
Parameter & Power \\ \hline
0 & -4 dBm \\ \hline
1 & -1 dBm \\ \hline
2 & +2 dBm \\ \hline
3 & +5 dBm \\ \hline
\end{tabular}
\end{center}
\begin{tcolorbox}[colback=white]
\begin{minted}{json}
{
"type": "mirny",
"ports": 0,
"clk_sel": "mmcx", // optional
"refclk": 125e6 // optional
}
\end{minted}
\end{tcolorbox}
ADF5356 gives +5 dBm by default. The stored parameter in ADF5356 can be read using the following line"
Replace 0 with the EEM port number used on the core device. Any port can be used. The \texttt{clk\_sel} field is optional and may be specified as one of either \texttt{xo}, \texttt{mmcx}, or \texttt{sma}. The default is \texttt{xo}. The \texttt{refclk} field is optional and the default is \texttt{100e6}.
\inputcolorboxminted{firstline=29,lastline=29}{examples/pll.py}
For 4457 Mirny + Almazny, one field must be added:
\subsection{Periodic 100\textmu s pulses}
The output can be toggled on and off periodically using the RF switches. The following code emits a 100\textmu s pulse in every millisecond. A microwave signal should be programmed in prior (such as the 1 GHz wave example).
\begin{tcolorbox}[colback=white]
\begin{minted}{json}
{
"type": "mirny",
"almazny": true,
"ports": 0
}
\end{minted}
\end{tcolorbox}
\inputcolorboxminted{firstline=42,lastline=44}{examples/pll.py}
\codesection{4456 Synthesizer Mirny and 4457 Mirny + Almazny}
\ordersection{4456 Synthesizer Mirny}
\subsection{1 GHz sinusoidal wave}
Generates a 1 GHz sinusoid from RF0 with full scale amplitude, attenuated by 12 dB. Both the CPLD and the PLL channels should be initialized.
\inputcolorboxminted{firstline=10,lastline=17}{examples/pll.py}
\subsection{Almazny paired output}
Mirny and Almazny output channels are paired, and Almazny output channels output twice the frequency of the main Mirny outputs. To set Almazny HF outputs for 4457 HF Synthesizer, set the Mirny outputs to one-half the desired frequency. The above code, run with 4457 HF Synthesizer, will also output 2GHz from Almazny HF0.
\subsection{ADF5356 power control}
Output power can be controlled be configuring the PLL channels individually in addition to the digital attenuators. After initialization of the PLL channel (ADF5356), the following line of code can change the output power level:
\inputcolorboxminted{firstline=28,lastline=28}{examples/pll.py}
The parameter corresponds to a specific change of output power according to the following table\repeatfootnote{adf5356}.
\begin{center}
\captionof{table}{Power changes from ADF5356}
\begin{tabular}{|c|c|}
\hline
Parameter & Power \\ \hline
0 & -4 dBm \\ \hline
1 & -1 dBm \\ \hline
2 & +2 dBm \\ \hline
3 & +5 dBm \\ \hline
\end{tabular}
\end{center}
ADF5356 gives +5 dBm by default. The stored parameter in ADF5356 can be read using the following line"
\inputcolorboxminted{firstline=29,lastline=29}{examples/pll.py}
\subsection{Periodic 100\textmu s pulses}
The output can be toggled on and off periodically using the RF switches. The following code emits a 100\textmu s pulse in every millisecond. A microwave signal should be programmed in prior (such as the 1 GHz wave example).
\inputcolorboxminted{firstline=42,lastline=44}{examples/pll.py}
\ordersection{4456 Synthesizer Mirny or 4457 HF Synthesizer Mirny + Almazny}
\finalfootnote

68
4459.tex Normal file
View File

@ -0,0 +1,68 @@
\input{preamble.tex}
\graphicspath{{images/4459}, {images}}
\title{4459 PDH Lock Generator Pounder}
\author{M-Labs Limited}
\date{January 2025}
\revision{Revision 0}
\companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
\begin{document}
\maketitle
\section{Features}
\begin{itemize}
\item{features}
\end{itemize}
\section{Applications}
\begin{itemize}
\item{applications}
\end{itemize}
\section{General Description}
Stabilizer with Pounder daughter card.
2-channel Pound Drever Hall (PDH) lock generator.
AD9959 DDS (500MSPS, 10-bit).
% Switch to next column
\vfill\break
%\begin{figure}[h]
% \centering
% \scalebox{1.15}{
% \begin{circuitikz}[european, every label/.append style={align=center}]
% \begin{scope}[]
% % if applicable
% \end{scope}
% \end{circuitikz}
% }
% \caption{Simplified Block Diagram}
%\end{figure}
\begin{figure}[hbt!]
\centering
\includegraphics[height=2.5in]{photo4459.jpg}
\caption{Pounder + Stabilizer cards}
\includegraphics[height=3in, angle=90]{fp4459.pdf}
\caption{Pounder + Stabilizer front panel}
\end{figure}
% For wide tables, a single column layout is better. It can be switched
% page-by-page.
\onecolumn
\sourcesectiond{4459 PDH Lock Generator Pounder}{Stabilizer}{https://github.com/sinara-hw/Pounder}{https://github.com/sinara-hw/Stabilizer}
\section{Specifications}
\ordersection{4459 Pounder + Stabilizer}
\finalfootnote
\end{document}

132
4624.tex Normal file
View File

@ -0,0 +1,132 @@
\input{preamble.tex}
\graphicspath{{images}, {images/4624}}
\title{4624 AWG Phaser}
\author{M-Labs Limited}
\date{January 2025}
\revision{Revision 0}
\companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
\begin{document}
\maketitle
\section{Features}
\begin{itemize}
\item{4 channels of 1.25 GSPS 16-bit DAC}
\item{2 channels of 5 MSPS ADC}
\item{dual IQ mixer + 0.3 GHz to 4.8 GHz VCO + PLL}
\item{31.5 dB range DDS}
\item{Xilinx Artix-7 FPGA core}
\item{DDR3 SDRAM}
\end{itemize}
\section{Applications}
\begin{itemize}
\item{?? STFT pulse generator?}
\end{itemize}
\section{General Description}
4624 AWG Phaser is an 8hp EEM form factor module, part of the ARTIQ/Sinara family. It adds versatile arbitrary wave generation (AWG) capabilities to carrier cards such as Kasli 2.0 and Kasli-SoC, with quadrature modulation compensation and interpolation features. It is available in two variants: Upconverter, which includes integrated RF upconversion, and Baseband, without it.
Each card supplies four channels of digital-to-analog conversion (DAC) at 1.25 GSPS and two channels of analog-to-digital conversion (ADC) at 5 MSPS. Input channels can be terminated at 50 Ω, individually controllable using DIP switches. Output channels can be attenuated from 0 to -31.5 dB by a digital attenuator. The Upconverter variant features dual IQ (Quadrature) mixers with voltage-controlled oscillators for precise frequency generation and modulation.
Multiple gateware variants exist for 4624 AWG Phaser, including MIQRO, available separately from QUARTIQ, which is capable of generating up to 16 dynamic tones.
% Switch to next column
\vfill\break
%\begin{figure}[h]
% \centering
% \scalebox{1.15}{
% \begin{circuitikz}[european, every label/.append style={align=center}]
% \begin{scope}[]
% % if applicable
% \end{scope}
% \end{circuitikz}
% }
% \caption{Simplified Block Diagram}
%\end{figure}
\begin{figure}[hbt!]
\centering
\includegraphics[height=2.25in]{photo4624.jpg}
\caption{Phaser card}
\includegraphics[height=3in, angle=90]{fp4624.pdf}
\caption{Phaser front panel}
\end{figure}
% For wide tables, a single column layout is better. It can be switched
% page-by-page.
\onecolumn
\sourcesection{4624 AWG Phaser}{https://github.com/sinara-hw/Phaser/}
\section{Specifications}
% DAC: https://www.ti.com/lit/ds/symlink/dac34h84.pdf?ts=1743366540161&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FDAC34H84
% ADC: https://www.analog.com/media/en/technical-documentation/data-sheets/232316fc.pdf
% VCO: https://www.mouser.com/datasheet/2/368/si510-11-767375.pdf
% IQ mixer: https://www.ti.com/lit/gpn/trf372017
\begin{table}[hbt!]
\centering
\begin{threeparttable}
\caption{Electrical Specifications}
\begin{tabularx}{\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
\textdagger & & & & & \\
\hspace{3mm} Photocurrent range & 0 & & 3.0 & mA & \\
\hspace{3mm} Photocurrent resolution & & 0.8 & & μA & \\
\hspace{3mm} Bandwidth (-3 dB) & & 500 & & Hz & \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
2x 1.25 GS/s IQ upconverters.
dual IQ mixer + 0.3 GHz to 4.8 GHz VCO + PLL.
up to 16 dynamic tones using MIQRO gateware (available separately from QUARTIQ).
31.5 dB range digital step attenuator (similar to Urukul).
2 channels of 5 MS/s ADC (similar to Sampler).
Artix-7 FPGA.
Internal MMCX clock from Kasli/Clocker and external SMA.
The upconverter is optional, if you would like the baseband version please leave us a note.
\subsection{Phaser I/O}
front panel: two ADC with termination, two phaser channel outputs
additional dac outputs as mmcx. clock both front panel and back
\sysdescsection
4624 AWG Phaser should be entered in the \texttt{peripherals} list of the corresponding core device in the following format:
\begin{tcolorbox}[colback=white]
\begin{minted}{json}
{
"type": "phaser",
"ports": [0]
}
\end{minted}
\end{tcolorbox}
Replace 0 with the EEM port number used on the core device. % And which do we use on Phaser's side?
\codesection{4624 AWG Phaser}
\ordersection{4624 AWG Phaser}
\finalfootnote
\end{document}

149
5108.tex
View File

@ -3,8 +3,8 @@
\title{5108 ADC Sampler}
\author{M-Labs Limited}
\date{January 2022}
\revision{Revision 1}
\date{January 2025}
\revision{Revision 2}
\companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
\begin{document}
@ -12,30 +12,31 @@
\section{Features}
\begin{itemize}
\item{8-channel ADC}
\item{16-bits resolution}
\item{1.5 MSPS simultaneously on all channels}
\item{Full scale input voltage, $\pm$10mV to $\pm$10V}
\item{BNC connector}
\item{SMA breakout with 5528 SMA-IDC adapter}
\end{itemize}
\begin{itemize}
\item{8-channel ADC}
\item{16-bits resolution}
\item{1.5 MSPS simultaneously on all channels}
\item{Full scale input voltage, $\pm$10mV to $\pm$10V}
\item{BNC connector}
\item{SMA breakout with 5528 SMA-IDC adapter}
\end{itemize}
\section{Applications}
\begin{itemize}
\item{Sample intermediate-frequency (IF) waveform}
\item{Monitor laser power with a photodiode}
\item{Synchronize laser frequencies with a phase frequency detector}
\item{Form a laser intensity servo with 4410 Urukul}
\end{itemize}
\begin{itemize}
\item{Sample intermediate-frequency (IF) waveform}
\item{Monitor laser power with a photodiode}
\item{Synchronize laser frequencies with a phase frequency detector}
\item{Form a laser intensity servo with 4410 Urukul}
\end{itemize}
\section{General Description}
The 5108 ADC Sampler is a 8hp EEM module, part of the ARTIQ/Sinara family. It adds analog-digital converting capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
It provides eight analog-to-digital channels, exposed by eight BNC connectors. Each channel supports input voltage ranges from \textpm 10mV to \textpm 10V. All channels can be sampled simultaneously. Channels can broken out to SMA by adding a 5528 SMA-IDC card.
The 5108 ADC Sampler is an 8hp EEM module, part of the ARTIQ/Sinara family. It adds analog-digital converting capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC. It can also be combined with 4410 DDS Urukul to form the ARTIQ SU-Servo configuration.
5108 ADC Sampler provides a sample rate of 1.5 MSPS. However, the sample rate in practice is typically limited by the use of ARTIQ-Python kernel code.
It provides eight analog-to-digital channels, exposed by eight BNC connectors. Each channel supports input voltage ranges from \textpm 10mV to \textpm 10V. All channels can be sampled simultaneously. Channels can broken out to SMA by adding a 5528 SMA-IDC card.
5108 ADC Sampler provides a sample rate of 1.5 MSPS. However, the sample rate in practice is typically limited by the use of ARTIQ-Python kernel code.
% Switch to next column
\vfill\break
@ -493,89 +494,49 @@ Bandwidth of small signal and large signal input is shown below\repeatfootnote{s
\newpage
\begin{multicols}{2}
\section{Configuring Termination}
\begin{multicols}{2}
The input termination must be configured by setting physical switches on the board. The termination switches are found at the middle left part of the card are by-channel. Switching the termination switches on adds a 50\textOmega~termination between the differential input signals.
Regardless of switch configurations, the differential input signals are separately terminated with 100k\textOmega~to the PCB ground.
The input termination must be configured by setting physical switches on the board. The termination switches are found at the middle left part of the card and by-channel. Setting these switches to \texttt{on} adds a 50\textOmega~termination between the differential input signals.
\vspace*{\fill}
\columnbreak
\begin{center}
\centering
\includegraphics[height=1.7in]{sampler_switches.jpg}
\captionof{figure}{Position of switches}
\end{center}
\end{multicols}
Regardless of switch configurations, the differential input signals are separately terminated with 100k\textOmega~to the PCB ground.
\vspace*{\fill}
\columnbreak
\begin{center}
\centering
\includegraphics[height=1.7in]{sampler_switches.jpg}
\captionof{figure}{Position of switches}
\end{center}
\end{multicols}
\sysdescsection
5108 Sampler should be entered into the peripherals list of the corresponding core device in the following format:
\begin{tcolorbox}[colback=white]
\begin{minted}{json}
{
"type": "sampler",
"ports": [0, 1]
}
\end{minted}
\end{tcolorbox}
Replace 0 and 1 with the EEM port numbers used on the core device. Any ports can be used.
\newpage
\codesection{5108 ADC Sampler}
\subsection{Get input voltage}
The following example initializes the Sampler card with 1x gain on all ADC channels. At the end all ADC channels are sampled.
\subsection{Get input voltage}
The following example initializes the Sampler card with 1x gain on all ADC channels. At the end all ADC channels are sampled.
\inputcolorboxminted{firstline=9,lastline=21}{examples/sampler.py}
\inputcolorboxminted{firstline=9,lastline=21}{examples/sampler.py}
\newpage
\subsection{Voltage-controlled DDS amplitude (SU-Servo only)}
SU-Servo configuration can be enabled by integrating the 5108 ADC Sampler with 4410 DDS Urukul. Amplitude of the DDS output can be controlled by the ADC input of the Sampler through PI control, characterised by the following transfer function:
\[H(s)=k_p+\frac{k_i}{s+\frac{k_i}{g}}\]
In the following example, the amplitude of DDS is proportional to the ADC input from Sampler.
First, initialize the RTIO, SU-Servo and its channel with 1x gain.
\inputcolorboxminted{firstline=10,lastline=17}{examples/suservo.py}
Next, set up the PI control as an IIR filter. It has -1 proportional gain $k_p$ and no integrator gain $k_i$.
\inputcolorboxminted{firstline=18,lastline=25}{examples/suservo.py}
Then, configure the DDS frequency to 10 MHz with 3V input offset. When input voltage $\geq$ offset voltage, the DDS output amplitude is 0.
\inputcolorboxminted{firstline=26,lastline=30}{examples/suservo.py}
SU-Servo encodes the ADC voltage in a linear scale [-1, 1]. Therefore, 3V is converted to 0.3. Note that the ASF of all DDS channels are capped at 1.0; the amplitude clips when ADC input $\leq -7V$ with the above IIR filter.
Finally, enable the SU-Servo channel with the IIR filter programmed beforehand:
\inputcolorboxminted{firstline=32,lastline=33}{examples/suservo.py}
\newpage
A 10 MHz DDS signal is generated from the example above, with amplitude controllable by ADC. The RMS voltage of the DDS channel against the ADC voltage is plotted. The DDS channel is terminated with 50\textOmega.
\begin{center}
\begin{tikzpicture}[
declare function={
func(\x)= and(\x>=-10, \x<-7) * (160) +
and(\x>=-7, \x<3) * (16*(3-x)) +
and(\x>=3, \x<10) * (0);
}
]
\begin{axis}[
axis x line=middle, axis y line=middle,
every axis x label/.style={
at={(axis description cs:0.5,-0.1)},
anchor=north,
},
every axis y label/.style={
at={(ticklabel* cs:1.05)},
anchor=south,
},
minor x tick num=3,
grid=both,
height=8cm,
width=12cm,
ymin=-5, ymax=180, ytick={0,16,...,160}, ylabel=DDS RMS Voltage ($mV_{rms}$),
xmin=-10, xmax=10, xtick={-10,-8,...,10}, xlabel=Sampler Voltage ($V$),
]
\addplot[very thick, blue, samples=21, domain=-10:10]{func(x)};
\end{axis}
\end{tikzpicture}
\end{center}
DDS signal should be attenuated. High output power affects the linearity due to the 1 dB compression point of the amplifier at 13 dBm output power. 15 dB attenuation at the digital attenuator was applied in this example.
% Direct input to avoid issues with minted
\input{shared/suservo.tex}
\ordersection{5108 ADC Sampler}

View File

@ -31,7 +31,7 @@
\end{itemize}
\section{General Description}
The 5518 BNC-IDC card is a 8hp EEM module; the 5528 SMA-IDC card is a 4hp EEM module. Both adapter cards break out analog signals from IDC connectors to BNC (5518) or SMA (5528). IDC connectors can be found on 5108 Sampler, 5432 DAC Zotino, 5632 DAC Fastino and 5568 HD68-IDC.
The 5518 BNC-IDC card is an 8hp EEM module; the 5528 SMA-IDC card is a 4hp EEM module. Both adapter cards break out analog signals from IDC connectors to BNC (5518) or SMA (5528). IDC connectors can be found on 5108 Sampler, 5432 DAC Zotino, 5632 DAC Fastino and 5568 HD68-IDC.
Each card provides 8 channels, with respectively BNC or SMA connectors. Breaking out all 32 channels of 5432 DAC Zotino, 5632 DAC Fastino or 5568 HD68-IDC requires four BNC/SMA-IDC cards. Breaking out all 8 ADC channels of 5108 Sampler requires only one BNC/SMA-IDC card.

89
5538.tex Normal file
View File

@ -0,0 +1,89 @@
\input{preamble.tex}
\graphicspath{{images/5538}{images}}
\title{5538 MCX-TTL}
\author{M-Labs Limited}
\date{January 2025}
\revision{Revision 0}
\companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
\begin{document}
\maketitle
\section{Features}
\begin{itemize}
\item{32 channels}
\item{Internal IDC connector}
\item{External MCX connectors}
\end{itemize}
\section{Applications}
\begin{itemize}
\item{Break out analog signals}
\item{MCX adapter for: \begin{itemize}
\item{5432 DAC Zotino}
\item{5632 DAC Fastino}
\end{itemize}}
\item{Convert from/to HD68 with 5568 HD68-IDC}
\end{itemize}
\section{General Description}
The 5538 MCX-IDC card is an 8hp EEM Module, part of the ARTIQ/Sinara family. It is capable of breaking out analog signals from IDC connectors to MCX connectors. IDC connectors can be found on 5432 DAC Zotino, 5632 DAC Fastino and 5568 HD68-IDC.
One card provides 32 channels, enough to break out all channels of 5432 DAC Zotino, 5632 DAC Fastino or 5568 HD68-IDC.
% Switch to next column
\vfill\break
%\begin{figure}[h]
% \centering
% \scalebox{1.15}{
% \begin{circuitikz}[european, every label/.append style={align=center}]
% \begin{scope}[]
% % if applicable
% \end{scope}
% \end{circuitikz}
% }
% \caption{Simplified Block Diagram}
%\end{figure}
\begin{figure}[hbt!]
\centering
%\includegraphics[height=2.5in]{photo5538.jpg}
\caption{MCX-IDC card}
%\includegraphics[height=2.5in, angle=90]{fp5538.pdf}
\caption{MCX-IDC front panel}
\end{figure}
% For wide tables, a single column layout is better. It can be switched
% page-by-page.
\onecolumn
\sourcesection{5538 MCX-IDC}{https://github.com/sinara-hw/IDC_MCX_Adapter}
\section{Electrical Specifications}
\begin{table}[h]
\centering
\begin{threeparttable}
\caption{Electrical Specifications}
\begin{tabularx}{0.65\textwidth}{l | c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Max. Value} & \textbf{Unit} & \textbf{Conditions} \\
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
\section{Channel Mapping}
% ?
\ordersection{5538 MCX-IDC}
\finalfootnote
\end{document}

120
6302.tex Normal file
View File

@ -0,0 +1,120 @@
\input{preamble.tex}
\graphicspath{{images/6302}, {images}}
\title{6302 Grabber}
\author{M-Labs Limited}
\date{January 2025}
\revision{Revision 0}
\companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
\begin{document}
\maketitle
\section{Features}
\begin{itemize}
\item{CameraLink input interface for ARTIQ}
\item{Support for several EMCCD cameras}
\item{Low-latency image processing on-FPGA}
\item{Stack retrieves data sum over rectangular ROIs}
\end{itemize}
\section{Applications}
\begin{itemize}
\item{Ion fluorescence detection}
\item{Cold atom fluorescence detection}
\end{itemize}
\section{General Description}
The 6302 Grabber card is a 4hp EEM module, part of the ARTIQ/Sinara family. It adds frame grabber capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC. 6302 Grabber targets (EM)CCD scientific cameras using the CameraLink protocol standard. Using ARTIQ gateware, incoming camera signal is immediately transferred to the carrier card, where it can be processed with low latency on-FPGA .
The Sinara/ARTIQ stack supports defining rectangular ROIs (regions of interest); pixel value sums over these ROIs are reported to and can be used directly by ARTIQ kernels.
% Switch to next column
\vfill\break
%\begin{figure}[h]
% \centering
% \scalebox{1.15}{
% \begin{circuitikz}[european, every label/.append style={align=center}]
% \begin{scope}[]
% % if applicable
% \end{scope}
% \end{circuitikz}
% }
% \caption{Simplified Block Diagram}
%\end{figure}
\begin{figure}[hbt!]
\centering
\includegraphics[height=4in]{photo6302.jpg}
\caption{Grabber card}
\includegraphics[height=3in, angle=90]{fp6302.pdf}
\caption{Grabber front panel}
\end{figure}
% For wide tables, a single column layout is better. It can be switched
% page-by-page.
\onecolumn
\sourcesection{6302 Grabber}{https://github.com/sinara-hw/Grabber}
\section{Grabber I/O}
6302 Grabber features two front-panel 26-pin MDR connectors, commonly used by CameraLink connections. Properly shielded and twisted cables intended for CameraLink should be used. For Base CameraLink, only one MDR connection (and one EEM) is necessary; higher-speed Medium CameraLink requires two.
Power over CameraLink (PoCL) is not supported.
\subsection{Grabber Single-/Double-/Triple-EEM Modes}
6302 Grabber can operate with either a single, double, or triple EEM connection to a core device. The following table specifies the connections to use and the highest CameraLink configuration supported.
\begin{table}[h]
\centering
\begin{threeparttable}
\begin{tabularx}{0.4\textwidth}{|l|c|c| X}
\hline
\textbf{EEMs} & \textbf{Ports} & \textbf{CameraLink} \\
\thickhline
1 & \texttt{0} & Base CameraLink\\
2 & \texttt{0, 1} & Medium CameraLink \\
3 & \texttt{0, 1, 2} & Full CameraLink \\
\thickhline
\end{tabularx}
\captionof{table}{Grabber EEM modes}
\end{threeparttable}
\end{table}
Note that current ARTIQ gateware only supports Base Cameralink.
\sysdescsection
6302 Grabber should be entered in the \texttt{peripherals} list of the corresponding core device in the following format:
\begin{tcolorbox}[colback=white]
\begin{minted}{json}
{
"type": "grabber",
"ports": [0, 1]
}
\end{minted}
\end{tcolorbox}
Replace 0 and 1 with the EEM port numbers used on the core device. Any port numbers can be used. Specifying a second port is optional. If using Grabber in single-EEM mode, specify only \texttt{[0]}.
\newpage
\codesectionshort{6302 Grabber card}
The following code specifies two ROIs (Regions of Interest), enables both, retrieves their accumulated data for a single frame, and disables the ROI engines.
\inputcolorboxminted{firstline=9,lastline=31}{examples/grabber.py}
\ordersection{6302 Grabber}
\finalfootnote
\end{document}

116
8451-8453.tex Normal file
View File

@ -0,0 +1,116 @@
\input{preamble.tex}
\input{shared/thermostat.tex}
\graphicspath{{images/8451-8453}, {images}}
\title{8451 Thermostat/ 8453 Thermostat EEM}
\author{M-Labs Limited}
\date{January 2025}
\revision{Revision 0}
\companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
\begin{document}
\maketitle
\section{Features}
\begin{itemize}
\item{2 or 4 thermoelectric control (TEC) channels}
\item{Up to 8 W (+/-2 A with 4 V compliance) TEC drive}
\item{Up to 16W (+/-4 A with 4 V compliance) with MAX1969 drivers (EEM only)}
\item{100Base-T Ethernet with PoE}
\item{Compatibility with a wide range of external sensors}
\end{itemize}
\section{Applications}
\begin{itemize}
\item{8541 Thermostat only \begin{itemize}
\item{Temperature stabilizer for external devices containing TEC/thermistor}
\item{Compatible with Sinara 5432 Zotino or 5632 Fastino}\end{itemize}}
\item{8543 Thermostat EEM only\begin{itemize}
\item{?}
\end{itemize}}
\end{itemize}
\section{General Description}
The 8451 Thermostat and 8453 Thermostat EEM are multichannel temperature controllers, part of the Sinara open hardware family. 8453 Thermostat EEM is a 4hp form factor EEM module featuring four thermoelectric control (TEC) channels, whereas 8451 is housed in a standalone enclosure (Hammond 1455C1202\footnote{\url{https://www.hammfg.com/part/1455C1202}}) and features two TEC channels.
% Switch to next column
\vfill\break
%\begin{figure}[h]
% \centering
% \scalebox{1.15}{
% \begin{circuitikz}[european, every label/.append style={align=center}]
% \begin{scope}[]
% % if applicable
% \end{scope}
% \end{circuitikz}
% }
% \caption{Simplified Block Diagram}
%\end{figure}
\begin{figure}[hbt!]
\centering
\includegraphics[height=2in]{photo8451.jpg}
\caption{Thermostat}
\includegraphics[height=2in]{photo8453.jpg}
\caption{Thermostat EEM}
\includegraphics[angle=90, height=0.6in]{fp8453.pdf}
\caption{Thermostat EEM front panel}%
\label{fig:example}%
\end{figure}
% For wide tables, a single column layout is better. It can be switched
% page-by-page.
\onecolumn
\sourcesectiond{8451 Thermostat}{8453 Thermostat EEM}{https://github.com/sinara-hw/Thermostat}{https://github.com/sinara-hw/Thermostat_EEM}
\section{Specifications}
ADC datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/AD7172-2.pdf
TEC module: https://www.analog.com/media/en/technical-documentation/data-sheets/MAX1968-MAX1969.pdf
\begin{table}[h]
\begin{threeparttable}
\caption{Electrical Characteristics}
\begin{tabularx}{\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
TEC drive (MAX1968) & & & 8 & W & \\
\hspace{3mm} Current & -2 & & 2 & A & \\
\hspace{3mm} Compliance & & 4 & & V & \\
\hline
TEC drive (MAX1969) & & & 16 & W & 8453 EEM only. \\
\hspace{3mm} Current & -4 & & 4 & A & \\
\hspace{3mm} Compliance & & 4 & & V & \\
Thermistor
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
Input power should be 12V DC, maximum 4A. Both 8451 Thermostat and 8453 Thermostat EEM support Power-over-Ethernet (though TEC driver maximum sum power capability on 8453 Thermostat EEM cannot be achieved with PoE supply alone). Alternatively, power may be supplied via internal 100mils pin-header. 8453 Thermostat EEM can also be powered via Molex connector at back of board.
\section{Thermostat IO}
\subsection{8451 Thermostat}
8451 Thermostat accepts
2 TEC channels.
Parallel output 10 pin IDC 2.54mm and 5 pin 3.81mm connectors per channel.
Up to 8W (+/-2A with 4V compliance) heater/TEC drive from MAX1968 drivers.
100Base-T Ethernet with PoE.
Can stabilize temperature of Sinara 5432 DAC or external devices containing TEC and thermistor.
\ordersection{8451 Thermostat or 8453 Thermostat EEM}
\finalfootnote
\end{document}

115
8451.tex Normal file
View File

@ -0,0 +1,115 @@
\input{preamble.tex}
\input{shared/thermostat.tex}
\graphicspath{{images/8451}, {images}}
\title{8453 Thermostat EEM}
\author{M-Labs Limited}
\date{January 2025}
\revision{Revision 0}
\companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
\begin{document}
\maketitle
\section{Features}
\begin{itemize}
\item{2 thermoelectric control (TEC) channels}
\item{Up to 8 W (+/-2 A with 4 V compliance) TEC drive}
\item{10kΩ NTC thermosistors}
\item{100Base-T Ethernet with PoE}
\item{Standalone enclosure }
\end{itemize}
\section{Applications}
\begin{itemize}
\item{?}
\end{itemize}
\section{General Description}
The 8451 Thermostat is a multichannel temperature controller, part of the Sinara open hardware family. It is housed in a standalone enclosure (Hammond 1455C1202\footnote{\url{https://www.hammfg.com/part/1455C1202}}) and features two TEC channels. 8451 Thermostat is closely related to Sinara 8453 Thermostat EEM, a four-channel temperature controller with which it shares internal hardware; 8453 Thermostat EEM has a different form factor, different firmware, and is designed for use with cards
It is closely related to Sinara 8432 Thermostat EEM, which is in
and 8453 Thermostat EEM are multichannel temperature controllers, part of the Sinara open hardware family. 8453 Thermostat EEM is a 4hp form factor EEM module featuring four thermoelectric control (TEC) channels, whereas 8451 is housed in a standalone enclosure (Hammond 1455C1202\footnote{\url{https://www.hammfg.com/part/1455C1202}}) and features two TEC channels.
% Switch to next column
\vfill\break
%\begin{figure}[h]
% \centering
% \scalebox{1.15}{
% \begin{circuitikz}[european, every label/.append style={align=center}]
% \begin{scope}[]
% % if applicable
% \end{scope}
% \end{circuitikz}
% }
% \caption{Simplified Block Diagram}
%\end{figure}
\begin{figure}[hbt!]
\centering
\includegraphics[height=2in]{photo8451.jpg}
\caption{Thermostat}
\includegraphics[height=2in]{photo8453.jpg}
\caption{Thermostat EEM}
\includegraphics[angle=90, height=0.6in]{fp8453.pdf}
\caption{Thermostat EEM front panel}%
\label{fig:example}%
\end{figure}
% For wide tables, a single column layout is better. It can be switched
% page-by-page.
\onecolumn
\sourcesectiond{8451 Thermostat}{8453 Thermostat EEM}{https://github.com/sinara-hw/Thermostat}{https://github.com/sinara-hw/Thermostat_EEM}
\section{Specifications}
ADC datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/AD7172-2.pdf
TEC module: https://www.analog.com/media/en/technical-documentation/data-sheets/MAX1968-MAX1969.pdf
\begin{table}[h]
\begin{threeparttable}
\caption{Electrical Characteristics}
\begin{tabularx}{\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
TEC drive (MAX1968) & & & 8 & W & \\
\hspace{3mm} Current & -2 & & 2 & A & \\
\hspace{3mm} Compliance & & 4 & & V & \\
\hline
TEC drive (MAX1969) & & & 16 & W & 8453 EEM only. \\
\hspace{3mm} Current & -4 & & 4 & A & \\
\hspace{3mm} Compliance & & 4 & & V & \\
Thermistor
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
Input power should be 12V DC, maximum 4A. Both 8451 Thermostat and 8453 Thermostat EEM support Power-over-Ethernet (though TEC driver maximum sum power capability on 8453 Thermostat EEM cannot be achieved with PoE supply alone). Alternatively, power may be supplied via internal 100mils pin-header. 8453 Thermostat EEM can also be powered via Molex connector at back of board.
\section{Thermostat IO}
\subsection{8451 Thermostat}
8451 Thermostat accepts
2 TEC channels.
Parallel output 10 pin IDC 2.54mm and 5 pin 3.81mm connectors per channel.
Up to 8W (+/-2A with 4V compliance) heater/TEC drive from MAX1968 drivers.
100Base-T Ethernet with PoE.
Can stabilize temperature of Sinara 5432 DAC or external devices containing TEC and thermistor.
\ordersection{8451 Thermostat or 8453 Thermostat EEM}
\finalfootnote
\end{document}

81
8452-8462.tex Normal file
View File

@ -0,0 +1,81 @@
\input{preamble.tex}
\graphicspath{{images/8452-8462}, {images}}
\title{8452 DSP Stabilizer / 8462 DSP Fast Servo}
\author{M-Labs Limited}
\date{January 2025}
\revision{Revision 0}
\companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
\begin{document}
\maketitle
\section{Features}
\begin{itemize}
\item{features}
\end{itemize}
\section{Applications}
\begin{itemize}
\item{applications}
\end{itemize}
\section{General Description}
CPU-based dual-channel fast servo.
400MHz STM32H743ZIT6.
Dual 16bit ADC with x2, x5, x10 PGA (2MS/s).
16bit AD5542A DAC (1us settling time).
100Base-T Ethernet.
Can be controlled by Kasli or work stand-alone with PoE supply.
High-speed, low-latency servo (Stabilizer-compatible) module.
Trenz TE0715-04 SoC module (XC7Z015).
2 channel 125MHz 16bit ADC (LTC2195).
2 channel 125MHz 14bit DAC (AD9117).
100Base-T Ethernet.
Can work stand-alone with PoE or DC supply.
% Switch to next column
\vfill\break
%\begin{figure}[h]
% \centering
% \scalebox{1.15}{
% \begin{circuitikz}[european, every label/.append style={align=center}]
% \begin{scope}[]
% % if applicable
% \end{scope}
% \end{circuitikz}
% }
% \caption{Simplified Block Diagram}
%\end{figure}
\begin{figure}[hbt!]
\centering
\includegraphics[height=2in]{photo8452.jpg}
\caption{Stabilizer card, top view}
\includegraphics[height=2in]{photo8462.jpg}
\caption{Fast Servo card, side view}
\includegraphics[height=3in, angle=90]{fp8452.pdf}
\includegraphics[height=3in, angle=90]{fp8462.pdf}
\caption{Stabilizer and Fast Servo front panels}
\end{figure}
% For wide tables, a single column layout is better. It can be switched
% page-by-page.
\onecolumn
\sourcesectiond{8452 DSP Stabilizer}{8462 DSP Fast Servo}{https://github.com/sinara-hw/Stabilizer}{https://github.com/sinara-hw/Fast_Servo}
\section{Specifications}
\ordersection{8452 DSP Stabilizer or 8462 DSP Fast Servo}
\finalfootnote
\end{document}

116
8453.tex Normal file
View File

@ -0,0 +1,116 @@
\input{preamble.tex}
\input{shared/thermostat.tex}
\graphicspath{{images/8453}, {images}}
\title{8453 Thermostat EEM}
\author{M-Labs Limited}
\date{January 2025}
\revision{Revision 0}
\companylogo{\includegraphics[height=0.73in]{artiq_sinara.pdf}}
\begin{document}
\maketitle
\section{Features}
\begin{itemize}
\item{2 or 4 thermoelectric control (TEC) channels}
\item{Up to 8 W (+/-2 A with 4 V compliance) TEC drive}
\item{Up to 16W (+/-4 A with 4 V compliance) with MAX1969 drivers (EEM only)}
\item{100Base-T Ethernet with PoE}
\item{Compatibility with a wide range of external sensors}
\end{itemize}
\section{Applications}
\begin{itemize}
\item{8541 Thermostat only \begin{itemize}
\item{Temperature stabilizer for external devices containing TEC/thermistor}
\item{Compatible with Sinara 5432 Zotino or 5632 Fastino}\end{itemize}}
\item{8543 Thermostat EEM only\begin{itemize}
\item{?}
\end{itemize}}
\end{itemize}
\section{General Description}
The 8451 Thermostat and 8453 Thermostat EEM are multichannel temperature controllers, part of the Sinara open hardware family. 8453 Thermostat EEM is a 4hp form factor EEM module featuring four thermoelectric control (TEC) channels, whereas 8451 is housed in a standalone enclosure (Hammond 1455C1202\footnote{\url{https://www.hammfg.com/part/1455C1202}}) and features two TEC channels.
% Switch to next column
\vfill\break
%\begin{figure}[h]
% \centering
% \scalebox{1.15}{
% \begin{circuitikz}[european, every label/.append style={align=center}]
% \begin{scope}[]
% % if applicable
% \end{scope}
% \end{circuitikz}
% }
% \caption{Simplified Block Diagram}
%\end{figure}
\begin{figure}[hbt!]
\centering
\includegraphics[height=2in]{photo8451.jpg}
\caption{Thermostat}
\includegraphics[height=2in]{photo8453.jpg}
\caption{Thermostat EEM}
\includegraphics[angle=90, height=0.6in]{fp8453.pdf}
\caption{Thermostat EEM front panel}%
\label{fig:example}%
\end{figure}
% For wide tables, a single column layout is better. It can be switched
% page-by-page.
\onecolumn
\sourcesectiond{8451 Thermostat}{8453 Thermostat EEM}{https://github.com/sinara-hw/Thermostat}{https://github.com/sinara-hw/Thermostat_EEM}
\section{Specifications}
ADC datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/AD7172-2.pdf
TEC module: https://www.analog.com/media/en/technical-documentation/data-sheets/MAX1968-MAX1969.pdf
\begin{table}[h]
\begin{threeparttable}
\caption{Electrical Characteristics}
\begin{tabularx}{\textwidth}{l | c c c | c | X}
\thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
TEC drive (MAX1968) & & & 8 & W & \\
\hspace{3mm} Current & -2 & & 2 & A & \\
\hspace{3mm} Compliance & & 4 & & V & \\
\hline
TEC drive (MAX1969) & & & 16 & W & 8453 EEM only. \\
\hspace{3mm} Current & -4 & & 4 & A & \\
\hspace{3mm} Compliance & & 4 & & V & \\
Thermistor
\thickhline
\end{tabularx}
\end{threeparttable}
\end{table}
Input power should be 12V DC, maximum 4A. Both 8451 Thermostat and 8453 Thermostat EEM support Power-over-Ethernet (though TEC driver maximum sum power capability on 8453 Thermostat EEM cannot be achieved with PoE supply alone). Alternatively, power may be supplied via internal 100mils pin-header. 8453 Thermostat EEM can also be powered via Molex connector at back of board.
\section{Thermostat IO}
\subsection{8451 Thermostat}
8451 Thermostat accepts
2 TEC channels.
Parallel output 10 pin IDC 2.54mm and 5 pin 3.81mm connectors per channel.
Up to 8W (+/-2A with 4V compliance) heater/TEC drive from MAX1968 drivers.
100Base-T Ethernet with PoE.
Can stabilize temperature of Sinara 5432 DAC or external devices containing TEC and thermistor.
\ordersection{8451 Thermostat or 8453 Thermostat EEM}
\finalfootnote
\end{document}

View File

@ -1,4 +1,4 @@
inputs = 1124 1125 2118-2128 2238 2245 4410-4412 4456 5108 5432 5518-5528 5568 7210
inputs = 1008 1106 1124 1550 2118-2128 2238 2245 4410-4412 4456-4457 4459 4624 5108 5432 5632 5633 5518-5528 5538 5568 6302 7210 8451 8453 8452-8462
dir = build
all: $(inputs)

27
examples/grabber.py Normal file
View File

@ -0,0 +1,27 @@
from artiq.experiment import *
class Grabber(EnvExperiment):
def build(self):
self.setattr_device("core")
self.grabber = self.get_device("grabber")
@kernel
def run(self):
self.core.break_realtime()
delay(100*us)
# setup ROI boundaries
grabber.setup_roi(0, 0, 0, 2, 2)
grabber.setup_roi(1, 0, 0, 2048, 2048)
# enable through bitwise mask
mask = 0b11
grabber.gate_roi(mask)
# trigger the camera
# retrieves data from enabled ROIs
n = [0] * 2
grabber.input_mu(n)
# disable ROIs
self.core.break_realtime()
grabber.gate_roi(0)

BIN
images/1124/fp1124.pdf Normal file

Binary file not shown.

BIN
images/1125/fp1125.pdf Normal file

Binary file not shown.

BIN
images/4456-4457/fp4457.pdf Normal file

Binary file not shown.

View File

Before

Width:  |  Height:  |  Size: 62 KiB

After

Width:  |  Height:  |  Size: 62 KiB

View File

Before

Width:  |  Height:  |  Size: 98 KiB

After

Width:  |  Height:  |  Size: 98 KiB

View File

Before

Width:  |  Height:  |  Size: 140 KiB

After

Width:  |  Height:  |  Size: 140 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 179 KiB

BIN
images/4459/fp4459.pdf Normal file

Binary file not shown.

BIN
images/4459/photo4459.jpg Normal file

Binary file not shown.

After

Width:  |  Height:  |  Size: 570 KiB

BIN
images/4624/fp4624.pdf Normal file

Binary file not shown.

BIN
images/4624/photo4624.jpg Normal file

Binary file not shown.

After

Width:  |  Height:  |  Size: 416 KiB

BIN
images/5538/mcx_fp.jpg Normal file

Binary file not shown.

After

Width:  |  Height:  |  Size: 3.0 MiB

BIN
images/5568/fp5568.pdf Normal file

Binary file not shown.

BIN
images/6302/fp6302.pdf Normal file

Binary file not shown.

BIN
images/6302/photo6302.jpg Normal file

Binary file not shown.

After

Width:  |  Height:  |  Size: 228 KiB

BIN
images/7210/clocker_top.jpg Normal file

Binary file not shown.

After

Width:  |  Height:  |  Size: 5.8 MiB

BIN
images/7210/fp7210.jpg Normal file

Binary file not shown.

After

Width:  |  Height:  |  Size: 61 KiB

BIN
images/7210/mirny_fp.jpg Normal file

Binary file not shown.

After

Width:  |  Height:  |  Size: 2.7 MiB

BIN
images/8451/fp8451.pdf Normal file

Binary file not shown.

BIN
images/8451/photo8451.jpg Normal file

Binary file not shown.

After

Width:  |  Height:  |  Size: 192 KiB

BIN
images/8452-8462/fp8452.pdf Normal file

Binary file not shown.

BIN
images/8452-8462/fp8462.pdf Normal file

Binary file not shown.

Binary file not shown.

After

Width:  |  Height:  |  Size: 322 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 466 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 32 KiB

BIN
images/8453/fp8453.pdf Normal file

Binary file not shown.

BIN
images/8453/photo8453.jpg Normal file

Binary file not shown.

After

Width:  |  Height:  |  Size: 545 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 40 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 45 KiB

View File

@ -58,6 +58,14 @@ The sections below demonstrate simple usage scenarios of extensions on the ARTIQ
The full documentation for ARTIQ software and gateware, including guides for their use, is available at \url{https://m-labs.hk/artiq/manual/}. Please consult the manual for details and reference material of the functions and structures used here.
}
\newcommand{\codesectionshort}[1]{
\section{Example ARTIQ Code}
The code below demonstrates a simple usage scenario of extensions on the ARTIQ control system. These extensions make use of the resources of the #1. Not all features of the ARTIQ system are shown.
The full documentation for ARTIQ software and gateware, including guides for their use, is available at \url{https://m-labs.hk/artiq/manual/}. Please consult the manual for details and reference material of the functions and structures used here.
}
\newcommand*{\ordersection}[1]{
\section{Ordering Information}
To order, please visit \url{https://m-labs.hk} and choose #1 in the ARTIQ/Sinara hardware selection tool. Cards can be ordered as part of a fully-featured ARTIQ/Sinara crate or standalone through the 'Spare cards' option. Otherwise, orders can also be made by writing directly to \url{mailto:sales@m-labs.hk}.

87
shared/suservo.tex Normal file
View File

@ -0,0 +1,87 @@
\section{ARTIQ SU-Servo}
ARTIQ also allows for the joint configuration of one or two 4410 DDS Urukul cards and a 5108 Sampler as an integrated servo for laser intensity stabilization and similar purposes. SU-Servo also supports other additional features, such as preconfigured profiles per channel and automatic integrator hold. Urukuls must be 4410 AD9910 variants (not 4412 AD9912) and set to SU-Servo mode by DIP switch.
\subsection{SU-Servo System Description Entry}
SU-Servo should be entered in the peripherals list of the corresponding core device in a single entry in the following format:
\begin{tcolorbox}[colback=white]
\begin{minted}{json}
{
"type": "suservo",
"sampler_ports": [0, 1],
"urukul0_ports": [2, 3],
"urukul1_ports": [4, 5], // optional
"clk_sel": 2 // select 0 to 2
}
\end{minted}
\end{tcolorbox}
Enter the actual EEM port numbers used on the core device. Any ports can be used. If using only one Urukul (and half of the available Sampler channels), the \texttt{urukul1\_ports} field may be left out entirely.
For the \texttt{clk\_sel} field, \texttt{0} represents the internal 100 MHz oscillator, \texttt{1} represents SMA input, and \texttt{2} represents MMCX input.
% miraculously, this newpage is good for both Sampler and Urukul datasheets!
% will probably break if any sections are added though
\newpage
\section{Example SU-Servo Code}
In SU-Servo configuration, amplitude of the Urukul DDS output can be controlled with the Sampler ADC input through PI control, characterised by the following transfer function:
\[H(s)=k_p+\frac{k_i}{s+\frac{k_i}{g}}\]
In the following example, the DDS amplitude is set proportionally to the ADC input from Sampler. We initialize SU-Servo and all channels first. Note that the programmable gain of the Sampler is $10^0=1$ and the input range is [-10V, 10V].
\inputcolorboxminted{firstline=10,lastline=17}{examples/suservo.py}
Next, we set up the PI control as an IIR filter. It has -1 proportional gain $k_p$ and no integrator gain $k_i$.
\inputcolorboxminted{firstline=18,lastline=25}{examples/suservo.py}
Then, configure the DDS frequency to 10 MHz with 3V input offset. When input voltage $\geq$ offset voltage, the DDS output amplitude is 0.
\inputcolorboxminted{firstline=26,lastline=30}{examples/suservo.py}
SU-Servo encodes the ADC voltage on a linear scale [-1, 1]. Therefore, 3V is converted to 0.3. Note that the ASF of all DDS channels ss capped at 1.0 and the amplitude clips when ADC input $\leq -7V$ with the above IIR filter.
Finally, enable the SU-Servo channel with the IIR filter programmed beforehand:
\inputcolorboxminted{firstline=32,lastline=33}{examples/suservo.py}
A 10 MHz DDS signal is generated from the example above, with amplitude controllable by ADC. The RMS voltage of the DDS channel against the ADC voltage is plotted. The DDS channel is terminated with 50\textOmega.
\begin{center}
\begin{tikzpicture}[
declare function={
func(\x)= and(\x>=-10, \x<-7) * (160) +
and(\x>=-7, \x<3) * (16*(3-x)) +
and(\x>=3, \x<10) * (0);
}
]
\begin{axis}[
axis x line=middle, axis y line=middle,
every axis x label/.style={
at={(axis description cs:0.5,-0.1)},
anchor=north,
},
every axis y label/.style={
at={(ticklabel* cs:1.05)},
anchor=south,
},
minor x tick num=3,
grid=both,
height=8cm,
width=12cm,
ymin=-5, ymax=180, ytick={0,16,...,160}, ylabel=DDS RMS Voltage ($mV_{rms}$),
xmin=-10, xmax=10, xtick={-10,-8,...,10}, xlabel=Sampler Voltage ($V$),
]
\addplot[very thick, blue, samples=21, domain=-10:10]{func(x)};
\end{axis}
\end{tikzpicture}
\end{center}
DDS signal should be attenuated. High output power affects the linearity due to the 1 dB compression point of the amplifier at 13 dBm output power. 15 dB attenuation at the digital attenuator was applied in this example.

0
shared/thermostat.tex Normal file
View File

View File

@ -1,4 +1,4 @@
\include{preamble.tex}
\input{preamble.tex}
\graphicspath{{images}}
\title{BOARD NAME}
@ -12,15 +12,15 @@
\section{Features}
\begin{itemize}
\item{features}
\end{itemize}
\begin{itemize}
\item{features}
\end{itemize}
\section{Applications}
\begin{itemize}
\item{applications}
\end{itemize}
\begin{itemize}
\item{applications}
\end{itemize}
\section{General Description}
@ -52,12 +52,8 @@
\section{Specifications}
\newpage
\section{Example ARTIQ code}
\section*{}
\vspace*{\fill}
\input{footnote.tex}
\finalfootnote
\end{document}