1125: correct POR reset section

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architeuthis 2024-12-27 13:25:35 +01:00 committed by sb10q
parent c16ce247c6
commit f514e1558c

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@ -108,12 +108,12 @@
\begin{figure}[hbt!]
\centering
\includegraphics[height=3in]{kasli-soc_dip_switches.jpg}
\caption{Position of DIP switches, SD card, and POR pins}
\caption{Position of DIP switches, SD card, and reset pins}
\end{figure}
\subsection{POR jumpers and POR reset}
A known Xilinx hardware bug prevents repeatedly booting over JTAG without a POR reset. If necessary, repeated boots can be made possible by physically setting a jumper on the POR pins (marked above) and triggering a reset over JTAG, see also the M-Labs POR reset script.\footnote{\url{https://git.m-labs.hk/M-Labs/zynq-rs/src/branch/master/kasli_soc_por.py}}
A known Xilinx hardware bug prevents repeatedly booting over JTAG without a POR reset. If necessary, repeated boots can be made possible by physically setting jumpers on both the \texttt{PS\_POR\_B} and \texttt{PS\_SRST\_B} pins (marked in figure above) and triggering a reset over JTAG, see also the M-Labs POR reset script.\footnote{\url{https://git.m-labs.hk/M-Labs/zynq-rs/src/branch/master/kasli_soc_por.py}}
\section{User LEDs}