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2118-2128: spellcheck, style
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2118-2128.tex
293
2118-2128.tex
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@ -1,5 +1,5 @@
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\include{preamble.tex}
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\graphicspath{{images}}
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\input{preamble.tex}
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\graphicspath{{images/2118-2128}{images}}
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\title{2118 BNC-TTL / 2128 SMA-TTL}
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\author{M-Labs Limited}
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@ -13,31 +13,30 @@
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\section{Features}
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\begin{itemize}
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\item{8 channels.}
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\item{Input and output capable.}
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\item{Galvanically isolated.}
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\item{3ns minimum pulse width.}
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\item{BNC or SMA connectors.}
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\item{8 TTL channels}
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\item{Input- and output-capable}
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\item{Galvanically isolated}
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\item{3ns minimum pulse width}
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\item{BNC or SMA connectors}
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\end{itemize}
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\section{Applications}
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\begin{itemize}
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\item{Photon counting.}
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\item{External equipment trigger.}
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\item{Optical shutter control.}
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\item{Photon counting}
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\item{External equipment trigger}
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\item{Optical shutter control}
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\end{itemize}
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\section{General Description}
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The 2118 BNC-TTL card is a 8hp EEM module, while the 2128 SMA-TTL card is a 4hp EEM module.
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Both TTL cards add general-purpose digital I/O capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
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Each card provides two banks of four digital channels each, with BNC (2118) or SMA (2128) connectors.
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Each bank has individual ground isolation.
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The direction (input or output) of each bank can be selected using DIP switches.
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Each channel supports 50\textOmega~terminations individually controllable using DIP switches.
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Outputs tolerate short circuits indefinitely.
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The card support a minimum pulse width of 3ns.
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The 2118 BNC-TTL card is an 8hp EEM module; the 2128 SMA-TTL is a 4hp EEM module. Both TTL cards add general-purpose digital I/O capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
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Each cards provides two banks of four digital channels for a total of eight digital channels, with corresponding connectors, respectively either BNC (2118) or SMA (2128). Each bank possesses individual ground isolation. The direction (input or output) of each bank can be selected using DIP switches, and applies to all four channels of the bank.
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Each channel supports 50\textOmega~terminations individually controllable using DIP switches. Outputs tolerate short circuits indefinitely.
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Both cards are capable of a minimum pulse width of 3ns.
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% Switch to next column
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\vfill\break
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@ -89,8 +88,6 @@ The card support a minimum pulse width of 3ns.
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\draw (0,0) circle(0.8);
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\end{scope}
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\draw (1.6,-1.05) node[twoportshape,t={IO Bus Transceiver}, circuitikz/bipoles/twoport/width=2.5, scale=0.7, rotate=-90 ] (bus1) {};
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\draw (3.05,-0) node[twoportshape,t={Isolator}, circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso1) {};
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@ -113,22 +110,22 @@ The card support a minimum pulse width of 3ns.
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\begin{scope}[xshift=0.9cm, yshift=-2.66cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\draw (1.25,0)to[short,o-](1.6,0);
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\end{scope}
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\begin{scope}[xshift=1cm, yshift=-2.66cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\draw (1.25,0)to[short,o-](1.6,0);
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\end{scope}
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\begin{scope}[xshift=1.1cm, yshift=-2.66cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\draw (1.25,0)to[short,o-](1.6,0);
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\end{scope}
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\begin{scope}[xshift=1.2cm, yshift=-2.66cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\draw (1.25,0)to[short,o-](1.6,0);
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\end{scope}
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\end{scope}
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@ -137,12 +134,12 @@ The card support a minimum pulse width of 3ns.
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\begin{scope}[xshift=1.2cm, yshift=-1.98cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\draw (1.25,0)to[short,o-](1.6,0);
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\end{scope}
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\begin{scope}[xshift=1.32cm, yshift=-1.98cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\draw (1.25,0)to[short,o-](1.6,0);
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\end{scope}
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\draw (0.8,-3.05) node[twoportshape,t=\fourcm{High-Z/50\textOmega}{Switch \phantom{ssssss} }, circuitikz/bipoles/twoport/width=2, scale=0.4] (termswitch2) {};
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@ -151,22 +148,22 @@ The card support a minimum pulse width of 3ns.
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\begin{scope}[xshift=0.9cm, yshift=-3.02cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\draw (1.25,0)to[short,o-](1.6,0);
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\end{scope}
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\begin{scope}[xshift=1cm, yshift=-3.02cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\draw (1.25,0)to[short,o-](1.6,0);
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\end{scope}
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\begin{scope}[xshift=1.1cm, yshift=-3.02cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\draw (1.25,0)to[short,o-](1.6,0);
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\end{scope}
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\begin{scope}[xshift=1.2cm, yshift=-3.02cm, scale=0.12, every node/.style={scale=0.1}, rotate=-90 ]
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\draw (0.4,0) to[short,-o](0.75,0);
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\draw (0.78,0)-- +(30:0.46);
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\draw (1.25,0)to[short,o-](1.6,0) ;
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\draw (1.25,0)to[short,o-](1.6,0);
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\end{scope}
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% channel 5,6,7,8
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@ -297,47 +294,41 @@ The card support a minimum pulse width of 3ns.
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\begin{figure}[hbt!]
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\centering
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\subfloat[\centering BNC-TTL]{{
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\includegraphics[height=1.8in]{2118-2128/DIO_BNC_FP.jpg}
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\includegraphics[height=1.8in]{2118-2128/photo2118.jpg}
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}}%
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\subfloat[\centering SMA-TTL]{{
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\includegraphics[height=1.8in]{2118-2128/DIO_SMA_FP.jpg}
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\includegraphics[height=1.8in]{2118-2128/photo2128.jpg}
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}}%
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\caption{BNC-TTL/SMA-TTL Card photos}%
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\includegraphics[height=1.8in]{photo2118-2128.jpg }
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\caption{BNC-TTL and SMA-TTL cards}%
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\includegraphics[angle=90, height=0.7in]{DIO_BNC_FP.jpg}
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\includegraphics[angle=90, height=0.4in]{DIO_SMA_FP.jpg}
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\caption{BNC-TTL and SMA-TTL front panels}%
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\label{fig:example}%
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\end{figure}
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% For wide tables, a single column layout is better. It can be switched
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% page-by-page.
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\onecolumn
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\sourcesectiond{2118 BNC-TTL}{2128 SMA-TTL}{https://github.com/sinara-hw/DIO_BNC}{https://github.com/sinara-hw/DIO_SMA}
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\section{Electrical Specifications}
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All specifications are in $0\degree C \leq T_A \leq 70\degree C$ unless otherwise noted.
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Specifications are based on the bus transceivers IC (SN74BCT25245DW\footnote{\label{transceiver}https://www.ti.com/lit/ds/symlink/sn74bct25245.pdf})
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and the isolator IC (SI8651BB-B-IS1\footnote{\label{isolator}https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/si865x-datasheet.pdf}).
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The typical value of minimum pulse width is based on test results\footnote{\label{sinara187}https://github.com/sinara-hw/sinara/issues/187}.
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Specifications were derived based on the datasheets of the bus transceiver IC (SN74BCT25245DW\footnote{\label{transceiver}\url{https://www.ti.com/lit/ds/symlink/sn74bct25245.pdf}}) and the isolator IC (SI8651BB-B-IS1\footnote{\label{isolator}\url{https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/si865x-datasheet.pdf}}). The typical value of minimum pulse width is based on test results\footnote{\label{sinara187}\url{https://github.com/sinara-hw/sinara/issues/187}}.
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\begin{table}[h]
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\begin{threeparttable}
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\caption{Recommended Operating Conditions}
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\begin{tabularx}{\textwidth}{l | c | c c c | c | X}
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\begin{tabularx}{\textwidth}{l | c c c | c | X}
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\thickhline
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\textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
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\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
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\textbf{Unit} & \textbf{Conditions} \\
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\hline
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High-level input voltage\repeatfootnote{transceiver} & $V_{IH}$ & 2 & & 5.5* & V & \\
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High-level input voltage\repeatfootnote{transceiver} & 2 & & 5.5* & V & \\
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\hline
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Low-level input voltage\repeatfootnote{transceiver} & $V_{IL}$ & -0.5 & & 0.8 & V & \\
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Low-level input voltage\repeatfootnote{transceiver} & -0.5 & & 0.8 & V & \\
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\hline
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Input clamp current\repeatfootnote{transceiver} & $I_{OH}$ & & & -18 & mA & termination disabled \\
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Input clamp current\repeatfootnote{transceiver} & & & -18 & mA & termination disabled \\
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\hline
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High-level output current\repeatfootnote{transceiver} & $I_{OH}$ & & & -160 & mA & \\
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High-level output current\repeatfootnote{transceiver} & & & -160 & mA & \\
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\hline
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Low-level output current\repeatfootnote{transceiver} & $I_{OL}$ & & & 376 & mA & \\
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Low-level output current\repeatfootnote{transceiver} & & & 376 & mA & \\
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\thickhline
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\multicolumn{7}{l}{*With the 50\textOmega~termination enabled, the input voltage should not exceed 5V.}
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\multicolumn{6}{l}{*With the 50\textOmega~termination enabled, the input voltage should not exceed 5V.}
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\end{tabularx}
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\end{threeparttable}
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\end{table}
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@ -345,185 +336,70 @@ The typical value of minimum pulse width is based on test results\footnote{\labe
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\begin{table}[h]
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\begin{threeparttable}
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\caption{Electrical Characteristics}
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\begin{tabularx}{\textwidth}{l | c | c c c | c | X}
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\begin{tabularx}{\textwidth}{l | c c c | c | X}
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\thickhline
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\textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
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\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
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\textbf{Unit} & \textbf{Conditions} \\
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\hline
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High-level output voltage\repeatfootnote{transceiver} & $V_{OH}$ & 2 & & & V & $I_{OH}$=-160mA \\
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& & 2.7 & & & V & $I_{OH}$=-6mA \\
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High-level output voltage\repeatfootnote{transceiver} & 2 & & & V & $I_{OH}$=-160mA \\
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& 2.7 & & & V & $I_{OH}$=-6mA \\
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\hline
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Low-level output voltage\repeatfootnote{transceiver} & $V_{OL}$ & & 0.42 & 0.55 & V & $I_{OL}$=188mA \\
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& & & & 0.7 & V & $I_{OL}$=376mA \\
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Low-level output voltage\repeatfootnote{transceiver} & & 0.42 & 0.55 & V & $I_{OL}$=188mA \\
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& & & 0.7 & V & $I_{OL}$=376mA \\
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\hline
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Minimum pulse width\repeatfootnote{isolator}\textsuperscript{,}\repeatfootnote{sinara187} & & & 3 & 5 & ns & \\
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Minimum pulse width\repeatfootnote{isolator}\textsuperscript{,}\repeatfootnote{sinara187} & & 3 & 5 & ns & \\
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\hline
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Pulse width distortion\repeatfootnote{isolator} & $PWD$ & & 0.2 & 4.5 & ns & \\
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Pulse width distortion\repeatfootnote{isolator} & & 0.2 & 4.5 & ns & \\
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\hline
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Peak jitter\repeatfootnote{isolator} & $T_{JIT(PK)}$ & & 350 & & ps & \\
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Peak jitter\repeatfootnote{isolator} & & 350 & & ps & \\
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\hline
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Data rate\repeatfootnote{isolator} & & 0 & & 150 & Mbps & \\
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Data rate\repeatfootnote{isolator} & 0 & & 150 & Mbps & \\
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\thickhline
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\end{tabularx}
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\end{threeparttable}
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\end{table}
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\newpage
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Minimum pulse width was measured by generating pulses of progressively longer duration through a DDS generator and using them as input for a BNC-TTL card. The input BNC-TTL card was connected to another BNC-TTL card as output. The output signal is measured and shown in Figure \ref{fig:pulsewidth}.
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Minimum pulse width was measured\repeatfootnote{sinara187}.
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Pulses were generated from a DDS generator as an input of a BNC-TTL card.
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The input BNC-TTL card is connected to another BNC-TTL card as an output.
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The output signal is measured and shown.
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\begin{figure}[h]
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\begin{figure}[ht]
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\centering
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\includegraphics[height=3in]{2118-2128/bnc_ttl_min_pulse_width.png}
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\includegraphics[height=3in]{bnc_ttl_min_pulse_width.png}
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\caption{Minimum pulse width required for BNC-TTL card}
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\label{fig:pulsewidth}
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\end{figure}
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The red trace refers to the input pulses from the DDS generator, while the blue trace is the measured signal from the output BNC-TTL card.
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Note that the first input (red) pulse could not propagate through the signal chain.
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The first output (blue) pulse is the result of the second input (red, 3ns width) pulse.
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\newpage
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\section{Front Panel Drawings}
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\begin{multicols}{2}
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\begin{center}
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\centering
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\includegraphics[height=2.8in]{2118-2128/bnc_ttl_drawings.pdf}
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\captionof{figure}{2118 BNC-TTL front panel drawings}
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\end{center}
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\columnbreak
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\begin{center}
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\centering
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\includegraphics[height=2.8in]{2118-2128/bnc_ttl_assembly.pdf}
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\captionof{figure}{2118 BNC-TTL front panel assembly}
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\end{center}
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\end{multicols}
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\begin{multicols}{2}
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\begin{center}
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\captionof{table}{Bill of Material (2118 Standalone)}
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\tiny
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\begin{tabular}{|c|c|c|c|}
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\hline
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Index & Part No. & Qty & Description \\ \hline
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1 & 90560220 & 1 & FP-FRONT PANEL, EXTRUDED, TYPE 2, STATIC, 3Ux8HP \\ \hline
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2 & 3218843 & 2 & FP-ALIGNMENT PIN (LOCALIZATION) \\ \hline
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3 & 3020716 & 0.04 & SLEEVE GREY PLAS.M2.5 (100PCS) \\ \hline
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\end{tabular}
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\end{center}
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\columnbreak
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\begin{center}
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\captionof{table}{Bill of Material (2118 Standalone)}
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\tiny
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\begin{tabular}{|c|c|c|c|}
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\hline
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Index & Part No. & Qty & Description \\ \hline
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1 & 90457987 & 4 & CSCR M2.5*12.3 PAN PHL SS \\ \hline
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2 & 3040138 & 2 & PB HOLDER DIE-CAST \\ \hline
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3 & 3001012 & 2 & SCR M2.5*6 PAN PHL NI DIN7985 \\ \hline
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4 & 3010110 & 0.02 & WASHER PLN.M2.7 DIN125 (100X) \\ \hline
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5 & 3201099 & 0.01 & SCR M2.5*8 OVL PHL ST NI 100EA \\ \hline
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6 & 3040005 & 1 & HANDLE 8HP GREY PLASTIC \\ \hline
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7 & 3207076 & 0.01 & SCR M2.5*16 PAN 100 21101-222 \\ \hline
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8 & 3207075 & 0.01 & SCR M2.5*12 PAN 100 21101-221 \\ \hline
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9 & 3010124 & 0.1 & EMC GASKET FABRIC 3U (10PCS) \\ \hline
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10 & 3201130 & 0.01 & NUT M2.5 HEX ST NI KIT(100PCS) \\ \hline
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11 & 90560220 & 1 & FP-LYKJ 3U8HP PANEL \\ \hline
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\end{tabular}
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\end{center}
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\end{multicols}
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\begin{multicols}{2}
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\begin{center}
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\centering
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\includegraphics[height=3in]{2118-2128/sma_ttl_drawings.pdf}
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\captionof{figure}{2128 SMA-TTL front panel drawings}
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\end{center}
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\columnbreak
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\begin{center}
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\centering
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\includegraphics[height=3in]{2118-2128/sma_ttl_assembly.pdf}
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\captionof{figure}{2128 SMA-TTL front panel assembly}
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\end{center}
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\end{multicols}
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\begin{multicols}{2}
|
||||
\begin{center}
|
||||
\captionof{table}{Bill of Material (2128 Standalone)}
|
||||
\tiny
|
||||
\begin{tabular}{|c|c|c|c|}
|
||||
\hline
|
||||
Index & Part No. & Qty & Description \\ \hline
|
||||
1 & 90531967 & 1 & FRONT PANEL 3U 4HP PIU TYPE2 \\ \hline
|
||||
2 & 3020716 & 0.02 & SLEEVE GREY PLAS.M2.5 (100PCS) \\ \hline
|
||||
3 & 3218843 & 2 & FP-ALIGNMENT PIN (LOCALIZATION) \\ \hline
|
||||
\end{tabular}
|
||||
\end{center}
|
||||
|
||||
\columnbreak
|
||||
|
||||
\begin{center}
|
||||
\captionof{table}{Bill of Material (2128 Assembled)}
|
||||
\tiny
|
||||
\begin{tabular}{|c|c|c|c|}
|
||||
\hline
|
||||
Index & Part No. & Qty & Description \\ \hline
|
||||
1 & 90531967 & 1 & FP-LYKJ 3U4HP PANEL \\ \hline
|
||||
2 & 3001012 & 2 & SCR M2.5*6 PAN PHL NI DIN7985 \\ \hline
|
||||
3 & 3010110 & 0.02 & WASHER PLN.M2.7 DIN125 (100X) \\ \hline
|
||||
4 & 3010124 & 0.1 & EMC GASKET FABRIC 3U (10PCS) \\ \hline
|
||||
5 & 3001012 & 1 & HANDLE 4HP GREY PLASTIC \\ \hline
|
||||
6 & 3040138 & 2 & PB HOLDER DIE-CAST \\ \hline
|
||||
7 & 3207075 & 0.01 & SCR M2.5*12 PAN 100 21101-221 \\ \hline
|
||||
8 & 3033098 & 0.02 & SCREW COLLAR M2.5X12.3 (100X) \\ \hline
|
||||
9 & 3201099 & 0.01 & SCR M2.5*8 OVL PHL ST NI 100EA \\ \hline
|
||||
\end{tabular}
|
||||
\end{center}
|
||||
\end{multicols}
|
||||
The red trace shows the DDS generator input pulses. The blue trace shows the measured signal from the output BNC-TTL. Note that the first red pulse failed to reach the 2.1V threshold required by TTL and was not propagated. The first blue (output) pulse is the result of the second red (input) pulse, of 3ns width, which propagated correctly.
|
||||
|
||||
\section{Configuring IO Direction \& Termination}
|
||||
The termination and IO direction can be configured by switches.
|
||||
The per-channel termination and per-bank IO direction switches are found at the middle-left and middle-right of both cards respectively.
|
||||
|
||||
Termination switches selects the termination of each channel, between high impedence (OFF) and 50\textOmega~(ON).
|
||||
IO direction and termination must be configured by setting physical switches on the board. The termination switches are found on the middle-left and the IO direction switches on the middle-right of both cards. Termination switches select between high impedance (\texttt{OFF}) and 50\textOmega~(\texttt{ON}). Note that termination switches are by-channel but IO direction switches are by-bank.
|
||||
|
||||
IO direction switches partly decides the IO direction of each bank.
|
||||
\begin{itemize}
|
||||
\itemsep0em
|
||||
\item Closed switch (ON) \\
|
||||
Fix the corresponding bank to output. The direction cannot be changed by I\textsuperscript{2}C.
|
||||
\item Opened switch (OFF) \\
|
||||
Switch to input mode. The direction is input by default. Configurable by I\textsuperscript{2}C.
|
||||
\item IO direction switch closed (\texttt{ON}) \\
|
||||
Fixes the corresponding bank to output. The IO direction cannot be changed by I\textsuperscript{2}C.
|
||||
\item IO direction switch open (OFF) \\
|
||||
The corresponding bank is set to input by default. IO direction \textit{can} be changed by I\textsuperscript{2}C.
|
||||
\end{itemize}
|
||||
|
||||
\begin{figure}[hbt!]
|
||||
\centering
|
||||
\subfloat[\centering BNC-TTL]{{
|
||||
\includegraphics[height=1.5in]{2118-2128/bnc_ttl_switches.jpg}
|
||||
\includegraphics[height=1.5in]{bnc_ttl_switches.jpg}
|
||||
}}%
|
||||
\subfloat[\centering SMA-TTL]{{
|
||||
\includegraphics[height=1.5in]{2118-2128/sma_ttl_switches.jpg}
|
||||
\includegraphics[height=1.5in]{sma_ttl_switches.jpg}
|
||||
}}%
|
||||
\caption{Position of switches}%
|
||||
\end{figure}
|
||||
|
||||
\newpage
|
||||
\section{Example ARTIQ code}
|
||||
The sections below demonstrate simple usage scenarios of the 2118 BNC-TTL/2128 SMA-TTL card with the ARTIQ control system.
|
||||
They do not exhaustively demonstrate all the features of the ARTIQ system.
|
||||
The full documentation for the ARTIQ software and gateware is available at \url{https://m-labs.hk}.
|
||||
\codesection{2118 BNC-TTL/2128 SMA-TTL cards}
|
||||
|
||||
Timing accuracy in the examples below is well under 1 nanosecond thanks to the ARTIQ RTIO system.
|
||||
Timing accuracy in these examples is well under 1 nanosecond thanks to ARTIQ RTIO infrastructure.
|
||||
|
||||
\subsection{One pulse per second}
|
||||
The channel should be configured as output in both the gateware and hardware.
|
||||
|
|
@ -535,15 +411,13 @@ This example demonstrates some basic algorithmic features of the ARTIQ-Python la
|
|||
|
||||
\newpage
|
||||
\subsection{Sub-coarse-RTIO-cycle pulse}
|
||||
With the use of the ARTIQ RTIO, only 1 event can be enqueued per coarse RTIO cycle, which is typically 8ns.
|
||||
Therefore, to emit a pulse that is less than 8ns, additional delay is needed such that the \texttt{ttl.on()} \& \texttt{ttl.off()} event are submitted at different coarse RTIO cycles.
|
||||
The TTL pulse must satisfy the minimum pulse width stated in the electircal specifications.
|
||||
With the use of ARTIQ RTIO, only one event can be enqueued per \textit{coarse RTIO cycle}, which typically corresponds to 8ns. To emit pulses of less than 8ns, careful timing is needed to ensure that the \texttt{ttl.on()} \& \texttt{ttl.off()} event are submitted during different coarse RTIO cycles.
|
||||
|
||||
\inputcolorboxminted{firstline=60,lastline=64}{examples/ttl.py}
|
||||
|
||||
\subsection{Edge counting in a 1ms window}
|
||||
The \texttt{TTLInOut} class implements \texttt{gate\char`_rising()}, \texttt{gate\char`_falling()} \& \texttt{gate\char`_both()} for rising edge, falling edge, both rising edge \& falling edge detection respectively.
|
||||
The channel should be configured as input in both the gateware and hardware. Invoke one of the 3 methods to start edge detection.
|
||||
The channel should be configured as input in both gateware and hardware. Invoke one of the 3 methods to start edge detection.
|
||||
\inputcolorboxminted{firstline=14,lastline=15}{examples/ttl_in.py}
|
||||
Input signal can generated from another TTL channel or from other sources. Manipulate the timeline cursor to generate TTL pulses using the same kernel.
|
||||
\inputcolorboxminted{firstline=10,lastline=22}{examples/ttl_in.py}
|
||||
|
|
@ -551,41 +425,34 @@ The detected edges are registered to the RTIO input FIFO. By default, the FIFO c
|
|||
Once the threshold is exceeded, an \texttt{RTIOOverflow} exception will be triggered when the input events are read by the kernel CPU.
|
||||
Finally, invoke \texttt{count()} to retrieve the edge count from the input gate.
|
||||
|
||||
The RTIO system can report at most 1 edge detection event for every coarse RTIO cycle.
|
||||
For example, to guarantee all rising edges are counted (with \texttt{gate\char`_rising()} invoked), the theoretical minimum separation between rising edges is 1 coarse RTIO cycle (typically 8 ns) with consideration of the RTIO specification alone.
|
||||
However, both the electircal specifications and the possibility of triggering \texttt{RTIOOverflow} should be considered.
|
||||
The RTIO system can report at most one edge detection event for every coarse RTIO cycle. In principle, to guarantee all rising edges are counted (with \texttt{gate\char`_rising()} invoked), the theoretical minimum separation between rising edges is one coarse RTIO cycle (typically 8 ns). However, both the electrical specifications and the possibility of triggering \texttt{RTIOOverflow} exceptions should also be considered.
|
||||
|
||||
\newpage
|
||||
\subsection{Edge counting using \texttt{EdgeCounter}}
|
||||
This example code uses the gateware counter to substitute the software counter, which has a maximum count rate of approximately 1 million events per second.
|
||||
If the gateware counter is enabled on the TTL channel, it can typically count up to 125 million events per second:
|
||||
This example code uses a gateware counter to substitute the software counter, which has a maximum count rate of approximately 1 million events per second. If a gateware counter is enabled on the TTL channel, it can typically count up to 125 million events per second:
|
||||
\inputcolorboxminted{firstline=31,lastline=36}{examples/ttl_in.py}
|
||||
Edges are detected by comparing the current input state and that of the previous coarse RTIO cycle.
|
||||
Therefore, the theoretical minimum separation between 2 opposite edges is 1 coarse RTIO cycle (typically 8 ns).
|
||||
Edges are detected by comparing the current input state and that of the previous coarse RTIO cycle. Therefore, the theoretical minimum separation between 2 opposite edges is 1 coarse RTIO cycle (typically 8 ns).
|
||||
|
||||
\subsection{Responding to an external trigger}
|
||||
One channel needs to be configured as input, and the other as output.
|
||||
\inputcolorboxminted{firstline=45,lastline=51}{examples/ttl_in.py}
|
||||
|
||||
\subsection{62.5 MHz clock signal generation}
|
||||
A TTL channel can be configured as a \texttt{ClockGen} channel, which generates a periodic clock signal.
|
||||
Each channel has a phase accumulator operating on the RTIO clock, where it is incremented by the frequency tuning word at each coarse RTIO cycle.
|
||||
Therefore, jitter should be expected when the desired frequency cannot be obtained by dividing the coarse RTIO clock frequency with a power of 2. \\
|
||||
A TTL channel can be configured as a \texttt{ClockGen} channel, which generates a periodic clock signal. Each channel has a phase accumulator operating on the RTIO clock, where it is incremented by the frequency tuning word at each coarse RTIO cycle. Therefore, jitter should be expected when the desired frequency cannot be obtained by dividing the coarse RTIO clock frequency with a power of 2.
|
||||
|
||||
Typically, with the coarse RTIO clock at 125 MHz, a \texttt{ClockGen} channel can generate up to 62.5 MHz.
|
||||
|
||||
\inputcolorboxminted{firstline=72,lastline=75}{examples/ttl.py}
|
||||
|
||||
\newpage
|
||||
\subsection{Minimum Sustained Event Separation}
|
||||
The minimum sustained event separation is the least amount of time separation between input gated events, in which all gated edges can be continuously \& reliabily timestamped by the RTIO system without causing \texttt{RTIOOverflow} exceptions.
|
||||
The following \texttt{run()} function finds the separation by approximating the time of running \texttt{timestamp\char`_mu()} as a constant. Import the \texttt{time} library to use \texttt{time.sleep()}.
|
||||
\subsection{Minimum sustained event separation}
|
||||
The minimum sustained event separation is the least time separation between input gated events for which all gated edges can be continuously \& reliabily timestamped by the RTIO system without causing \texttt{RTIOOverflow} exceptions. The following \texttt{run()} function finds the separation by approximating the time of running \texttt{timestamp\char`_mu()} as a constant. Import the \texttt{time} library to use \texttt{time.sleep()}.
|
||||
|
||||
\inputcolorboxminted{firstline=63,lastline=98}{examples/ttl_in.py}
|
||||
|
||||
\begin{center}
|
||||
\begin{table}[H]
|
||||
\captionof{table}{Minimum sustained event separation of different carrier}
|
||||
\captionof{table}{Minimum sustained event separation of different carriers}
|
||||
\centering
|
||||
\begin{tabular}{|c|c|c|}
|
||||
\hline
|
||||
|
|
@ -595,12 +462,8 @@ The following \texttt{run()} function finds the separation by approximating the
|
|||
\end{table}
|
||||
\end{center}
|
||||
|
||||
\section{Ordering Information}
|
||||
To order, please visit \url{https://m-labs.hk} and select the 2118 BNC-TTL/2128 SMA-TTL in the ARTIQ Sinara crate configuration tool. The card may also be ordered separately by writing to \url{mailto:sales@m-labs.hk}.
|
||||
\ordersection{2118 BNC-TTL/2128 SMA-TTL}
|
||||
|
||||
\section*{}
|
||||
\vspace*{\fill}
|
||||
|
||||
\input{footnote.tex}
|
||||
\finalfootnote
|
||||
|
||||
\end{document}
|
||||
|
|
|
|||
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Reference in New Issue