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ttls: formatting
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@ -295,11 +295,11 @@ Note that isolated TTL cards are less suited to low-noise applications as the is
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\begin{figure}[hbt!]
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\centering
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\includegraphics[height=1.8in]{photo2118-2128.jpg }
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\caption{BNC-TTL and SMA-TTL cards}%
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\includegraphics[angle=90, height=0.7in]{DIO_BNC_FP.jpg}
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\includegraphics[angle=90, height=0.4in]{DIO_SMA_FP.jpg}
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\caption{BNC-TTL and SMA-TTL front panels}%
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\label{fig:example}%
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\caption{BNC-TTL and SMA-TTL cards}
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\includegraphics[angle=90, height=0.7in]{fp2118.jpg}
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\includegraphics[angle=90, height=0.4in]{fp2128.jpg}
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\caption{BNC-TTL and SMA-TTL front panels}
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\label{fig:example}
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\end{figure}
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\onecolumn
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@ -396,6 +396,7 @@ IO direction and termination must be configured by setting physical switches on
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\end{figure}
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\newpage
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\codesection{2118 BNC-TTL/2128 SMA-TTL cards}
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Timing accuracy in these examples is well under 1 nanosecond thanks to ARTIQ RTIO infrastructure.
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@ -409,6 +410,7 @@ This example demonstrates some basic algorithmic features of the ARTIQ-Python la
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\inputcolorboxminted{firstline=22,lastline=39}{examples/ttl.py}
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\newpage
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\subsection{Sub-coarse-RTIO-cycle pulse}
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With the use of ARTIQ RTIO, only one event can be enqueued per \textit{coarse RTIO cycle}, which typically corresponds to 8ns. To emit pulses of less than 8ns, careful timing is needed to ensure that the \texttt{ttl.on()} \& \texttt{ttl.off()} event are submitted during different coarse RTIO cycles.
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@ -419,6 +421,7 @@ The \texttt{TTLInOut} class implements \texttt{gate\char`_rising()}, \texttt{gat
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The channel should be configured as input in both gateware and hardware. Invoke one of the 3 methods to start edge detection.
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\inputcolorboxminted{firstline=14,lastline=15}{examples/ttl_in.py}
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Input signal can generated from another TTL channel or from other sources. Manipulate the timeline cursor to generate TTL pulses using the same kernel.
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\inputcolorboxminted{firstline=10,lastline=22}{examples/ttl_in.py}
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The detected edges are registered to the RTIO input FIFO. By default, the FIFO can hold 64 events. The FIFO depth is defined by the \texttt{ififo\char`_depth} parameter for \texttt{Channel} class in \texttt{rtio/channel.py}.
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Once the threshold is exceeded, an \texttt{RTIOOverflow} exception will be triggered when the input events are read by the kernel CPU.
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@ -427,6 +430,7 @@ Finally, invoke \texttt{count()} to retrieve the edge count from the input gate.
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The RTIO system can report at most one edge detection event for every coarse RTIO cycle. In principle, to guarantee all rising edges are counted (with \texttt{gate\char`_rising()} invoked), the theoretical minimum separation between rising edges is one coarse RTIO cycle (typically 8 ns). However, both the electrical specifications and the possibility of triggering \texttt{RTIOOverflow} exceptions should also be considered.
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\newpage
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\subsection{Edge counting using \texttt{EdgeCounter}}
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This example code uses a gateware counter to substitute the software counter, which has a maximum count rate of approximately 1 million events per second. If a gateware counter is enabled on the TTL channel, it can typically count up to 125 million events per second:
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\inputcolorboxminted{firstline=31,lastline=36}{examples/ttl_in.py}
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@ -444,6 +448,7 @@ Typically, with the coarse RTIO clock at 125 MHz, a \texttt{ClockGen} channel ca
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\inputcolorboxminted{firstline=72,lastline=75}{examples/ttl.py}
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\newpage
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\subsection{Minimum sustained event separation}
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The minimum sustained event separation is the least time separation between input gated events for which all gated edges can be continuously \& reliabily timestamped by the RTIO system without causing \texttt{RTIOOverflow} exceptions. The following \texttt{run()} function finds the separation by approximating the time of running \texttt{timestamp\char`_mu()} as a constant. Import the \texttt{time} library to use \texttt{time.sleep()}.
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2238.tex
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2238.tex
@ -439,7 +439,7 @@ Each channel supports 50\textOmega~terminations individually controllable using
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\centering
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\includegraphics[height=2in]{photo2238.jpg}
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\caption{MCX-TTL card}
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\includegraphics[angle=90, height=0.6in]{DIO_MCX_FP.pdf}
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\includegraphics[angle=90, height=0.6in]{fp2238.pdf}
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\caption{MCX-TTL front panel}
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\end{figure}
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@ -505,8 +505,11 @@ All specifications are in $-40\degree C \leq T_A \leq 85\degree C$ unless otherw
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\newpage
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\section{Configuring IO Direction \& Termination}
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IO direction and termination must be configured by switches. The termination switches are found at the top and the IO direction switches at the middle of the card respectively.
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\begin{multicols}{2}
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Termination switches between high impedence (OFF) and 50\textOmega~(ON). Note that termination switches are by-channel but IO direction switches are by-bank.
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\begin{itemize}
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@ -516,15 +519,19 @@ Termination switches between high impedence (OFF) and 50\textOmega~(ON). Note th
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\item IO direction switch open (OFF) \\
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The corresponding bank is set to input by default. IO direction \textit{can} be changed by I\textsuperscript{2}C.
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\end{itemize}
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\columnbreak
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\begin{center}
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\centering
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\includegraphics[height=1.7in]{mcx_ttl_switches.jpg}
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\captionof{figure}{Position of switches}
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\end{center}
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\end{multicols}
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\newpage
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\codesection{2238 MCX-TTL card}
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Timing accuracy in these examples is well under 1 nanosecond thanks to ARTIQ RTIO infrastructure.
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@ -538,6 +545,7 @@ This example demonstrates some basic algorithmic features of the ARTIQ-Python la
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\inputcolorboxminted{firstline=22,lastline=39}{examples/ttl.py}
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\newpage
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\subsection{Edge counting in an 1ms window}
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The channel should be configured as input in both gateware and hardware.
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\inputcolorboxminted{firstline=47,lastline=52}{examples/ttl.py}
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2245.tex
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2245.tex
@ -297,7 +297,7 @@ Outputs are intended to drive 100\textOmega~loads and inputs are 100\textOmega~t
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\begin{figure}[hbt!]
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\centering
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\includegraphics[angle=90, height=1.7in]{photo2245.jpg}
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\includegraphics[angle=90, height=0.4in]{DIO_RJ45_FP.pdf}
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\includegraphics[angle=90, height=0.4in]{fp2245.pdf}
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\caption{LVDS-TTL card and front panel}
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\end{figure}
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@ -389,7 +389,9 @@ All typical values of AC specifications are at $T_A = 25\degree C$, $V_{ID} = 30
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\newpage
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\section{Configuring IO Direction \& Termination}
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\begin{multicols}{2}
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The IO direction of each channel can be configured by DIP switches, which are found at the top of the card.
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\begin{itemize}
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\itemsep0em
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@ -400,11 +402,13 @@ The IO direction of each channel can be configured by DIP switches, which are fo
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\end{itemize}
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\vspace*{\fill}\columnbreak
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\begin{center}
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\centering
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\includegraphics[height=1.5in]{lvds_ttl_switches.jpg}
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\captionof{figure}{Position of switches}
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\end{center}
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\end{multicols}
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\newpage
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@ -448,6 +452,7 @@ One channel needs to be configured as input, and the other as output.
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\egroup}
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\newpage
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\subsection{SPI Master Device}
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If one of the two card EEM ports is configured as \texttt{dio\char`_spi} instead of \texttt{dio}, its associated TTL channels can be configured as SPI master devices. Invocation of an SPI transfer follows this pattern:
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\begin{enumerate}
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@ -552,6 +557,7 @@ The direction switches on the LVDS-TTL card should be set to the correct IO dire
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\end{center}
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\newpage
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\subsubsection{SPI Configuration}
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The following examples will assume the SPI communication has the following properties:
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\begin{itemize}
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@ -591,6 +597,7 @@ Typically, an SPI write operation involves sending an instruction and data to th
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\end{center}
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\newpage
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Suppose the instruction is \texttt{0x13}, while the data is \texttt{0xDEADBEEF}. In addition, both slave 1 \& 2 are selected. This SPI transaction can be performed with the following code:
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\inputcolorboxminted{firstline=18,lastline=27}{examples/spi.py}
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@ -620,6 +627,7 @@ Suppose the instruction is \texttt{0x81}, where only slave 0 is selected. This S
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\inputcolorboxminted{firstline=35,lastline=49}{examples/spi.py}
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\newpage
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\ordersection{2245 LVDS-TTL}
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\finalfootnote
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