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2118-2128.tex
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@ -13,30 +13,30 @@
\section{Features} \section{Features}
\begin{itemize} \begin{itemize}
\item{8 TTL channels} \item{8 TTL channels}
\item{Input- and output-capable} \item{Input- and output-capable}
\item{Galvanically isolated} \item{Galvanically isolated}
\item{3ns minimum pulse width} \item{3ns minimum pulse width}
\item{BNC or SMA connectors} \item{BNC or SMA connectors}
\end{itemize} \end{itemize}
\section{Applications} \section{Applications}
\begin{itemize} \begin{itemize}
\item{Photon counting} \item{Photon counting}
\item{External equipment trigger} \item{External equipment trigger}
\item{Optical shutter control} \item{Optical shutter control}
\end{itemize} \end{itemize}
\section{General Description} \section{General Description}
The 2118 BNC-TTL card is an 8hp EEM module; the 2128 SMA-TTL is a 4hp EEM module. Both TTL cards add general-purpose digital I/O capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC. The 2118 BNC-TTL card is an 8hp EEM module; the 2128 SMA-TTL is a 4hp EEM module. Both TTL cards add general-purpose digital I/O capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
Each card provides two banks of four digital channels, for a total of eight digital channels, with respectively either BNC (2118) or SMA (2128) connectors. Each bank possesses individual ground isolation. The direction (input or output) of each bank can be selected using DIP switches, and applies to all four channels of the bank. Each card provides two banks of four digital channels, for a total of eight digital channels, with respectively either BNC (2118) or SMA (2128) connectors. Each bank possesses individual ground isolation. The direction (input or output) of each bank can be selected using DIP switches, and applies to all four channels of the bank.
Each channel supports 50\textOmega~terminations, individually controllable using DIP switches. Outputs tolerate short circuits indefinitely. Both cards are capable of a minimum pulse width of 3ns. Each channel supports 50\textOmega~terminations, individually controllable using DIP switches. Outputs tolerate short circuits indefinitely. Both cards are capable of a minimum pulse width of 3ns.
Note that isolated TTL cards are less suited to low-noise applications as the isolator itself injects noise between primary and secondary sides. Cable shields may also radiate EMI from the isolated grounds. For low-noise applications, use non-isolated cards such as 2238 MCX-TTL or 2245 LVDS-TTL. Note that isolated TTL cards are less suited to low-noise applications as the isolator itself injects noise between primary and secondary sides. Cable shields may also radiate EMI from the isolated grounds. For low-noise applications, use non-isolated cards such as 2238 MCX-TTL or 2245 LVDS-TTL.
% Switch to next column % Switch to next column
\vfill\break \vfill\break
@ -295,11 +295,11 @@ Note that isolated TTL cards are less suited to low-noise applications as the is
\begin{figure}[hbt!] \begin{figure}[hbt!]
\centering \centering
\includegraphics[height=1.8in]{photo2118-2128.jpg } \includegraphics[height=1.8in]{photo2118-2128.jpg }
\caption{BNC-TTL and SMA-TTL cards}% \caption{BNC-TTL and SMA-TTL cards}
\includegraphics[angle=90, height=0.7in]{DIO_BNC_FP.jpg} \includegraphics[angle=90, height=0.7in]{fp2118.jpg}
\includegraphics[angle=90, height=0.4in]{DIO_SMA_FP.jpg} \includegraphics[angle=90, height=0.4in]{fp2128.jpg}
\caption{BNC-TTL and SMA-TTL front panels}% \caption{BNC-TTL and SMA-TTL front panels}
\label{fig:example}% \label{fig:example}
\end{figure} \end{figure}
\onecolumn \onecolumn
@ -307,13 +307,13 @@ Note that isolated TTL cards are less suited to low-noise applications as the is
\sourcesectiond{2118 BNC-TTL}{2128 SMA-TTL}{https://github.com/sinara-hw/DIO_BNC}{https://github.com/sinara-hw/DIO_SMA} \sourcesectiond{2118 BNC-TTL}{2128 SMA-TTL}{https://github.com/sinara-hw/DIO_BNC}{https://github.com/sinara-hw/DIO_SMA}
\section{Electrical Specifications} \section{Electrical Specifications}
All specifications are in $0\degree C \leq T_A \leq 70\degree C$ unless otherwise noted. All specifications are in $0\degree C \leq T_A \leq 70\degree C$ unless otherwise noted.
Specifications were derived based on the datasheets of the bus transceiver IC (SN74BCT25245DW\footnote{\label{transceiver}\url{https://www.ti.com/lit/ds/symlink/sn74bct25245.pdf}}) and the isolator IC (SI8651BB-B-IS1\footnote{\label{isolator}\url{https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/si865x-datasheet.pdf}}). The typical value of minimum pulse width is based on test results\footnote{\label{sinara187}\url{https://github.com/sinara-hw/sinara/issues/187}}. Specifications were derived based on the datasheets of the bus transceiver IC (SN74BCT25245DW\footnote{\label{transceiver}\url{https://www.ti.com/lit/ds/symlink/sn74bct25245.pdf}}) and the isolator IC (SI8651BB-B-IS1\footnote{\label{isolator}\url{https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/si865x-datasheet.pdf}}). The typical value of minimum pulse width is based on test results\footnote{\label{sinara187}\url{https://github.com/sinara-hw/sinara/issues/187}}.
\begin{table}[h] \begin{table}[h]
\begin{threeparttable} \begin{threeparttable}
\caption{Recommended Operating Conditions} \caption{Recommended Operating Conditions}
\begin{tabularx}{\textwidth}{l | c c c | c | X} \begin{tabularx}{\textwidth}{l | c c c | c | X}
\thickhline \thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} & \textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\ \textbf{Unit} & \textbf{Conditions} \\
@ -329,14 +329,14 @@ Specifications were derived based on the datasheets of the bus transceiver IC (S
Low-level output current\repeatfootnote{transceiver} & & & 376 & mA & \\ Low-level output current\repeatfootnote{transceiver} & & & 376 & mA & \\
\thickhline \thickhline
\multicolumn{6}{l}{*With the 50\textOmega~termination enabled, the input voltage should not exceed 5V.} \multicolumn{6}{l}{*With the 50\textOmega~termination enabled, the input voltage should not exceed 5V.}
\end{tabularx} \end{tabularx}
\end{threeparttable} \end{threeparttable}
\end{table} \end{table}
\begin{table}[h] \begin{table}[h]
\begin{threeparttable} \begin{threeparttable}
\caption{Electrical Characteristics} \caption{Electrical Characteristics}
\begin{tabularx}{\textwidth}{l | c c c | c | X} \begin{tabularx}{\textwidth}{l | c c c | c | X}
\thickhline \thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} & \textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\ \textbf{Unit} & \textbf{Conditions} \\
@ -355,36 +355,36 @@ Specifications were derived based on the datasheets of the bus transceiver IC (S
\hline \hline
Data rate\repeatfootnote{isolator} & 0 & & 150 & Mbps & \\ Data rate\repeatfootnote{isolator} & 0 & & 150 & Mbps & \\
\thickhline \thickhline
\end{tabularx} \end{tabularx}
\end{threeparttable} \end{threeparttable}
\end{table} \end{table}
Minimum pulse width was measured by generating pulses of progressively longer duration through a DDS generator and using them as input for a BNC-TTL card. The input BNC-TTL card was connected to another BNC-TTL card as output. The output signal is measured and shown in Figure \ref{fig:pulsewidth}. Minimum pulse width was measured by generating pulses of progressively longer duration through a DDS generator and using them as input for a BNC-TTL card. The input BNC-TTL card was connected to another BNC-TTL card as output. The output signal is measured and shown in Figure \ref{fig:pulsewidth}.
\begin{figure}[ht] \begin{figure}[ht]
\centering \centering
\includegraphics[height=3in]{bnc_ttl_min_pulse_width.png} \includegraphics[height=3in]{bnc_ttl_min_pulse_width.png}
\caption{Minimum pulse width required for BNC-TTL card} \caption{Minimum pulse width required for BNC-TTL card}
\label{fig:pulsewidth} \label{fig:pulsewidth}
\end{figure} \end{figure}
\newpage \newpage
The red trace shows the DDS generator input pulses. The blue trace shows the measured signal from the output BNC-TTL. Note that the first red pulse failed to reach the 2.1V threshold required by TTL and was not propagated. The first blue (output) pulse is the result of the second red (input) pulse, of 3ns width, which propagated correctly. The red trace shows the DDS generator input pulses. The blue trace shows the measured signal from the output BNC-TTL. Note that the first red pulse failed to reach the 2.1V threshold required by TTL and was not propagated. The first blue (output) pulse is the result of the second red (input) pulse, of 3ns width, which propagated correctly.
\section{Configuring IO Direction \& Termination} \section{Configuring IO Direction \& Termination}
IO direction and termination must be configured by setting physical switches on the board. The termination switches are found on the middle-left and the IO direction switches on the middle-right of both cards. Termination switches select between high impedance (\texttt{OFF}) and 50\textOmega~(\texttt{ON}). Note that termination switches are by-channel but IO direction switches are by-bank. IO direction and termination must be configured by setting physical switches on the board. The termination switches are found on the middle-left and the IO direction switches on the middle-right of both cards. Termination switches select between high impedance (\texttt{OFF}) and 50\textOmega~(\texttt{ON}). Note that termination switches are by-channel but IO direction switches are by-bank.
\begin{itemize} \begin{itemize}
\itemsep0em \itemsep0em
\item IO direction switch closed (\texttt{ON}) \\ \item IO direction switch closed (\texttt{ON}) \\
Fixes the corresponding bank to output. The IO direction cannot be changed by I\textsuperscript{2}C. Fixes the corresponding bank to output. The IO direction cannot be changed by I\textsuperscript{2}C.
\item IO direction switch open (OFF) \\ \item IO direction switch open (OFF) \\
The corresponding bank is set to input by default. IO direction \textit{can} be changed by I\textsuperscript{2}C. The corresponding bank is set to input by default. IO direction \textit{can} be changed by I\textsuperscript{2}C.
\end{itemize} \end{itemize}
\begin{figure}[hbt!] \begin{figure}[hbt!]
\centering \centering
\subfloat[\centering BNC-TTL]{{ \subfloat[\centering BNC-TTL]{{
\includegraphics[height=1.5in]{bnc_ttl_switches.jpg} \includegraphics[height=1.5in]{bnc_ttl_switches.jpg}
@ -393,64 +393,69 @@ IO direction and termination must be configured by setting physical switches on
\includegraphics[height=1.5in]{sma_ttl_switches.jpg} \includegraphics[height=1.5in]{sma_ttl_switches.jpg}
}}% }}%
\caption{Position of switches}% \caption{Position of switches}%
\end{figure} \end{figure}
\newpage \newpage
\codesection{2118 BNC-TTL/2128 SMA-TTL cards} \codesection{2118 BNC-TTL/2128 SMA-TTL cards}
Timing accuracy in these examples is well under 1 nanosecond thanks to ARTIQ RTIO infrastructure. Timing accuracy in these examples is well under 1 nanosecond thanks to ARTIQ RTIO infrastructure.
\subsection{One pulse per second} \subsection{One pulse per second}
The channel should be configured as output in both the gateware and hardware. The channel should be configured as output in both the gateware and hardware.
\inputcolorboxminted{firstline=9,lastline=14}{examples/ttl.py} \inputcolorboxminted{firstline=9,lastline=14}{examples/ttl.py}
\subsection{Morse code} \subsection{Morse code}
This example demonstrates some basic algorithmic features of the ARTIQ-Python language. This example demonstrates some basic algorithmic features of the ARTIQ-Python language.
\inputcolorboxminted{firstline=22,lastline=39}{examples/ttl.py} \inputcolorboxminted{firstline=22,lastline=39}{examples/ttl.py}
\newpage \newpage
\subsection{Sub-coarse-RTIO-cycle pulse}
With the use of ARTIQ RTIO, only one event can be enqueued per \textit{coarse RTIO cycle}, which typically corresponds to 8ns. To emit pulses of less than 8ns, careful timing is needed to ensure that the \texttt{ttl.on()} \& \texttt{ttl.off()} event are submitted during different coarse RTIO cycles.
\inputcolorboxminted{firstline=60,lastline=64}{examples/ttl.py} \subsection{Sub-coarse-RTIO-cycle pulse}
With the use of ARTIQ RTIO, only one event can be enqueued per \textit{coarse RTIO cycle}, which typically corresponds to 8ns. To emit pulses of less than 8ns, careful timing is needed to ensure that the \texttt{ttl.on()} \& \texttt{ttl.off()} event are submitted during different coarse RTIO cycles.
\subsection{Edge counting in a 1ms window} \inputcolorboxminted{firstline=60,lastline=64}{examples/ttl.py}
The \texttt{TTLInOut} class implements \texttt{gate\char`_rising()}, \texttt{gate\char`_falling()} \& \texttt{gate\char`_both()} for rising edge, falling edge, both rising edge \& falling edge detection respectively.
The channel should be configured as input in both gateware and hardware. Invoke one of the 3 methods to start edge detection.
\inputcolorboxminted{firstline=14,lastline=15}{examples/ttl_in.py}
Input signal can generated from another TTL channel or from other sources. Manipulate the timeline cursor to generate TTL pulses using the same kernel.
\inputcolorboxminted{firstline=10,lastline=22}{examples/ttl_in.py}
The detected edges are registered to the RTIO input FIFO. By default, the FIFO can hold 64 events. The FIFO depth is defined by the \texttt{ififo\char`_depth} parameter for \texttt{Channel} class in \texttt{rtio/channel.py}.
Once the threshold is exceeded, an \texttt{RTIOOverflow} exception will be triggered when the input events are read by the kernel CPU.
Finally, invoke \texttt{count()} to retrieve the edge count from the input gate.
The RTIO system can report at most one edge detection event for every coarse RTIO cycle. In principle, to guarantee all rising edges are counted (with \texttt{gate\char`_rising()} invoked), the theoretical minimum separation between rising edges is one coarse RTIO cycle (typically 8 ns). However, both the electrical specifications and the possibility of triggering \texttt{RTIOOverflow} exceptions should also be considered. \subsection{Edge counting in a 1ms window}
The \texttt{TTLInOut} class implements \texttt{gate\char`_rising()}, \texttt{gate\char`_falling()} \& \texttt{gate\char`_both()} for rising edge, falling edge, both rising edge \& falling edge detection respectively.
The channel should be configured as input in both gateware and hardware. Invoke one of the 3 methods to start edge detection.
\inputcolorboxminted{firstline=14,lastline=15}{examples/ttl_in.py}
Input signal can generated from another TTL channel or from other sources. Manipulate the timeline cursor to generate TTL pulses using the same kernel.
\inputcolorboxminted{firstline=10,lastline=22}{examples/ttl_in.py}
The detected edges are registered to the RTIO input FIFO. By default, the FIFO can hold 64 events. The FIFO depth is defined by the \texttt{ififo\char`_depth} parameter for \texttt{Channel} class in \texttt{rtio/channel.py}.
Once the threshold is exceeded, an \texttt{RTIOOverflow} exception will be triggered when the input events are read by the kernel CPU.
Finally, invoke \texttt{count()} to retrieve the edge count from the input gate.
The RTIO system can report at most one edge detection event for every coarse RTIO cycle. In principle, to guarantee all rising edges are counted (with \texttt{gate\char`_rising()} invoked), the theoretical minimum separation between rising edges is one coarse RTIO cycle (typically 8 ns). However, both the electrical specifications and the possibility of triggering \texttt{RTIOOverflow} exceptions should also be considered.
\newpage \newpage
\subsection{Edge counting using \texttt{EdgeCounter}}
This example code uses a gateware counter to substitute the software counter, which has a maximum count rate of approximately 1 million events per second. If a gateware counter is enabled on the TTL channel, it can typically count up to 125 million events per second:
\inputcolorboxminted{firstline=31,lastline=36}{examples/ttl_in.py}
Edges are detected by comparing the current input state and that of the previous coarse RTIO cycle. Therefore, the theoretical minimum separation between 2 opposite edges is 1 coarse RTIO cycle (typically 8 ns).
\subsection{Responding to an external trigger} \subsection{Edge counting using \texttt{EdgeCounter}}
One channel needs to be configured as input, and the other as output. This example code uses a gateware counter to substitute the software counter, which has a maximum count rate of approximately 1 million events per second. If a gateware counter is enabled on the TTL channel, it can typically count up to 125 million events per second:
\inputcolorboxminted{firstline=45,lastline=51}{examples/ttl_in.py} \inputcolorboxminted{firstline=31,lastline=36}{examples/ttl_in.py}
Edges are detected by comparing the current input state and that of the previous coarse RTIO cycle. Therefore, the theoretical minimum separation between 2 opposite edges is 1 coarse RTIO cycle (typically 8 ns).
\subsection{62.5 MHz clock signal generation} \subsection{Responding to an external trigger}
A TTL channel can be configured as a \texttt{ClockGen} channel, which generates a periodic clock signal. Each channel has a phase accumulator operating on the RTIO clock, where it is incremented by the frequency tuning word at each coarse RTIO cycle. Therefore, jitter should be expected when the desired frequency cannot be obtained by dividing the coarse RTIO clock frequency with a power of 2. One channel needs to be configured as input, and the other as output.
\inputcolorboxminted{firstline=45,lastline=51}{examples/ttl_in.py}
Typically, with the coarse RTIO clock at 125 MHz, a \texttt{ClockGen} channel can generate up to 62.5 MHz. \subsection{62.5 MHz clock signal generation}
A TTL channel can be configured as a \texttt{ClockGen} channel, which generates a periodic clock signal. Each channel has a phase accumulator operating on the RTIO clock, where it is incremented by the frequency tuning word at each coarse RTIO cycle. Therefore, jitter should be expected when the desired frequency cannot be obtained by dividing the coarse RTIO clock frequency with a power of 2.
\inputcolorboxminted{firstline=72,lastline=75}{examples/ttl.py} Typically, with the coarse RTIO clock at 125 MHz, a \texttt{ClockGen} channel can generate up to 62.5 MHz.
\inputcolorboxminted{firstline=72,lastline=75}{examples/ttl.py}
\newpage \newpage
\subsection{Minimum sustained event separation}
The minimum sustained event separation is the least time separation between input gated events for which all gated edges can be continuously \& reliabily timestamped by the RTIO system without causing \texttt{RTIOOverflow} exceptions. The following \texttt{run()} function finds the separation by approximating the time of running \texttt{timestamp\char`_mu()} as a constant. Import the \texttt{time} library to use \texttt{time.sleep()}.
\inputcolorboxminted{firstline=63,lastline=98}{examples/ttl_in.py} \subsection{Minimum sustained event separation}
The minimum sustained event separation is the least time separation between input gated events for which all gated edges can be continuously \& reliabily timestamped by the RTIO system without causing \texttt{RTIOOverflow} exceptions. The following \texttt{run()} function finds the separation by approximating the time of running \texttt{timestamp\char`_mu()} as a constant. Import the \texttt{time} library to use \texttt{time.sleep()}.
\begin{center} \inputcolorboxminted{firstline=63,lastline=98}{examples/ttl_in.py}
\begin{table}[H]
\begin{center}
\begin{table}[H]
\captionof{table}{Minimum sustained event separation of different carriers} \captionof{table}{Minimum sustained event separation of different carriers}
\centering \centering
\begin{tabular}{|c|c|c|} \begin{tabular}{|c|c|c|}
@ -459,7 +464,7 @@ The minimum sustained event separation is the least time separation between inpu
Duration & 650 ns & 600 ns \\ \hline Duration & 650 ns & 600 ns \\ \hline
\end{tabular} \end{tabular}
\end{table} \end{table}
\end{center} \end{center}
\ordersection{2118 BNC-TTL/2128 SMA-TTL} \ordersection{2118 BNC-TTL/2128 SMA-TTL}

112
2238.tex
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@ -13,28 +13,28 @@
\section{Features} \section{Features}
\begin{itemize} \begin{itemize}
\item{16 MCX-TTL channels} \item{16 MCX-TTL channels}
\item{Input and output capable} \item{Input and output capable}
\item{No galvanic isolation} \item{No galvanic isolation}
\item{High speed and low jitter} \item{High speed and low jitter}
\item{MCX connectors} \item{MCX connectors}
\end{itemize} \end{itemize}
\section{Applications} \section{Applications}
\begin{itemize} \begin{itemize}
\item{Photon counting} \item{Photon counting}
\item{External equipment trigger} \item{External equipment trigger}
\item{Optical shutter control} \item{Optical shutter control}
\end{itemize} \end{itemize}
\section{General Description} \section{General Description}
The 2238 MCX-TTL card is a 4hp EEM module. It adds general-purpose digital I/O capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC. The 2238 MCX-TTL card is a 4hp EEM module. It adds general-purpose digital I/O capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
Each card provides four banks of four digital channels each for a total of sixteen digital channels, with MCX connectors in the front panel, controlled through two EEM connectors. Each individual EEM connector controls two banks independently. Single EEM operation is possible. The direction (input or output) of each bank can be selected using DIP switches, and applies to all four channels of the bank. Each card provides four banks of four digital channels each for a total of sixteen digital channels, with MCX connectors in the front panel, controlled through two EEM connectors. Each individual EEM connector controls two banks independently. Single EEM operation is possible. The direction (input or output) of each bank can be selected using DIP switches, and applies to all four channels of the bank.
Each channel supports 50\textOmega~terminations individually controllable using DIP switches. This card can achieve higher speed and lower jitter than the isolated 2118/2128 BNC/SMA-TTL cards. Each channel supports 50\textOmega~terminations individually controllable using DIP switches. This card can achieve higher speed and lower jitter than the isolated 2118/2128 BNC/SMA-TTL cards.
% Switch to next column % Switch to next column
\vfill\break \vfill\break
@ -439,7 +439,7 @@ Each channel supports 50\textOmega~terminations individually controllable using
\centering \centering
\includegraphics[height=2in]{photo2238.jpg} \includegraphics[height=2in]{photo2238.jpg}
\caption{MCX-TTL card} \caption{MCX-TTL card}
\includegraphics[angle=90, height=0.6in]{DIO_MCX_FP.pdf} \includegraphics[angle=90, height=0.6in]{fp2238.pdf}
\caption{MCX-TTL front panel} \caption{MCX-TTL front panel}
\end{figure} \end{figure}
@ -451,12 +451,12 @@ Each channel supports 50\textOmega~terminations individually controllable using
\section{Electrical Specifications} \section{Electrical Specifications}
All specifications are in $-40\degree C \leq T_A \leq 85\degree C$ unless otherwise noted. Information in this section is based on the datasheet of the bus transceiver IC (74LVT162245MTD\footnote{\label{transceiver}\url{https://www.onsemi.com/pdf/datasheet/74lvt162245-d.pdf}}). All specifications are in $-40\degree C \leq T_A \leq 85\degree C$ unless otherwise noted. Information in this section is based on the datasheet of the bus transceiver IC (74LVT162245MTD\footnote{\label{transceiver}\url{https://www.onsemi.com/pdf/datasheet/74lvt162245-d.pdf}}).
\begin{table}[h] \begin{table}[h]
\begin{threeparttable} \begin{threeparttable}
\caption{Recommended Operating Conditions} \caption{Recommended Operating Conditions}
\begin{tabularx}{\textwidth}{l | c c c | c | X} \begin{tabularx}{\textwidth}{l | c c c | c | X}
\thickhline \thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} & \textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\ \textbf{Unit} & \textbf{Conditions} \\
@ -470,14 +470,14 @@ All specifications are in $-40\degree C \leq T_A \leq 85\degree C$ unless otherw
Input edge rate & & & 10 & ns/V & $0.8V \leq V_I \leq 2.0V$ \\ Input edge rate & & & 10 & ns/V & $0.8V \leq V_I \leq 2.0V$ \\
\thickhline \thickhline
\multicolumn{6}{l}{*With the 50\textOmega~termination enabled, the input voltage should not exceed 5V.} \multicolumn{6}{l}{*With the 50\textOmega~termination enabled, the input voltage should not exceed 5V.}
\end{tabularx} \end{tabularx}
\end{threeparttable} \end{threeparttable}
\end{table} \end{table}
\begin{table}[h] \begin{table}[h]
\begin{threeparttable} \begin{threeparttable}
\caption{Electrical Characteristics} \caption{Electrical Characteristics}
\begin{tabularx}{\textwidth}{l | c c c | c | X} \begin{tabularx}{\textwidth}{l | c c c | c | X}
\thickhline \thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} & \textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\ \textbf{Unit} & \textbf{Conditions} \\
@ -498,57 +498,65 @@ All specifications are in $-40\degree C \leq T_A \leq 85\degree C$ unless otherw
& & & 2 & \textmu A & $V_I=3.3V$ \\ & & & 2 & \textmu A & $V_I=3.3V$ \\
& & & -10 & \textmu A & $V_I=0V$ \\ & & & -10 & \textmu A & $V_I=0V$ \\
\thickhline \thickhline
\end{tabularx} \end{tabularx}
\end{threeparttable} \end{threeparttable}
\end{table} \end{table}
\newpage \newpage
\section{Configuring IO Direction \& Termination} \section{Configuring IO Direction \& Termination}
IO direction and termination must be configured by switches. The termination switches are found at the top and the IO direction switches at the middle of the card respectively.
\begin{multicols}{2}
Termination switches between high impedence (OFF) and 50\textOmega~(ON). Note that termination switches are by-channel but IO direction switches are by-bank.
\begin{itemize} IO direction and termination must be configured by switches. The termination switches are found at the top and the IO direction switches at the middle of the card respectively.
\begin{multicols}{2}
Termination switches between high impedence (OFF) and 50\textOmega~(ON). Note that termination switches are by-channel but IO direction switches are by-bank.
\begin{itemize}
\itemsep0em \itemsep0em
\item IO direction switch closed (\texttt{ON}) \\ \item IO direction switch closed (\texttt{ON}) \\
Fixes the corresponding bank to output. The IO direction cannot be changed by I\textsuperscript{2}C. Fixes the corresponding bank to output. The IO direction cannot be changed by I\textsuperscript{2}C.
\item IO direction switch open (OFF) \\ \item IO direction switch open (OFF) \\
The corresponding bank is set to input by default. IO direction \textit{can} be changed by I\textsuperscript{2}C. The corresponding bank is set to input by default. IO direction \textit{can} be changed by I\textsuperscript{2}C.
\end{itemize} \end{itemize}
\columnbreak
\begin{center} \columnbreak
\begin{center}
\centering \centering
\includegraphics[height=1.7in]{mcx_ttl_switches.jpg} \includegraphics[height=1.7in]{mcx_ttl_switches.jpg}
\captionof{figure}{Position of switches} \captionof{figure}{Position of switches}
\end{center} \end{center}
\end{multicols}
\end{multicols}
\newpage \newpage
\codesection{2238 MCX-TTL card} \codesection{2238 MCX-TTL card}
Timing accuracy in these examples is well under 1 nanosecond thanks to ARTIQ RTIO infrastructure. Timing accuracy in these examples is well under 1 nanosecond thanks to ARTIQ RTIO infrastructure.
\subsection{One pulse per second} \subsection{One pulse per second}
The channel should be configured as output in both the gateware and hardware. The channel should be configured as output in both the gateware and hardware.
\inputcolorboxminted{firstline=9,lastline=14}{examples/ttl.py} \inputcolorboxminted{firstline=9,lastline=14}{examples/ttl.py}
\subsection{Morse code} \subsection{Morse code}
This example demonstrates some basic algorithmic features of the ARTIQ-Python language. This example demonstrates some basic algorithmic features of the ARTIQ-Python language.
\inputcolorboxminted{firstline=22,lastline=39}{examples/ttl.py} \inputcolorboxminted{firstline=22,lastline=39}{examples/ttl.py}
\newpage \newpage
\subsection{Edge counting in an 1ms window}
The channel should be configured as input in both gateware and hardware.
\inputcolorboxminted{firstline=47,lastline=52}{examples/ttl.py}
This example code uses the software counter, which has a maximum count rate of approximately 1 million events per second. \subsection{Edge counting in an 1ms window}
If the gateware counter is enabled on the TTL channel, it can typically count up to 125 million events per second: The channel should be configured as input in both gateware and hardware.
\inputcolorboxminted{firstline=60,lastline=65}{examples/ttl.py} \inputcolorboxminted{firstline=47,lastline=52}{examples/ttl.py}
\subsection{Responding to an external trigger} This example code uses the software counter, which has a maximum count rate of approximately 1 million events per second.
One channel needs to be configured as input, and the other as output. If the gateware counter is enabled on the TTL channel, it can typically count up to 125 million events per second:
\inputcolorboxminted{firstline=74,lastline=80}{examples/ttl.py} \inputcolorboxminted{firstline=60,lastline=65}{examples/ttl.py}
\subsection{Responding to an external trigger}
One channel needs to be configured as input, and the other as output.
\inputcolorboxminted{firstline=74,lastline=80}{examples/ttl.py}
\ordersection{2238 MCX-TTL} \ordersection{2238 MCX-TTL}

212
2245.tex
View File

@ -16,28 +16,28 @@
\section{Features} \section{Features}
\begin{itemize} \begin{itemize}
\item{16 LVDS-TTL channels.} \item{16 LVDS-TTL channels.}
\item{Input- and output-capable} \item{Input- and output-capable}
\item{No galvanic isolation} \item{No galvanic isolation}
\item{High speed and low jitter} \item{High speed and low jitter}
\item{RJ45 connectors} \item{RJ45 connectors}
\end{itemize} \end{itemize}
\section{Applications} \section{Applications}
\begin{itemize} \begin{itemize}
\item{Photon counting} \item{Photon counting}
\item{External equipment trigger} \item{External equipment trigger}
\item{Optical shutter control} \item{Optical shutter control}
\item{Serial communication with remote devices} \item{Serial communication with remote devices}
\end{itemize} \end{itemize}
\section{General Description} \section{General Description}
The 2245 LVDS-TTL card is a 4hp EEM module. It adds general-purpose digital I/O capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC. The 2245 LVDS-TTL card is a 4hp EEM module. It adds general-purpose digital I/O capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
Each card provides sixteen total digital channels, with four RJ45 connectors in the front panel, controlled through 2 EEM connectors. Each RJ45 connector exposes four LVDS digital channels. Each individual EEM connector controls eight channels independently. Single EEM operation is possible. The direction (input or output) of each channel can be selected individually using DIP switches. Each card provides sixteen total digital channels, with four RJ45 connectors in the front panel, controlled through 2 EEM connectors. Each RJ45 connector exposes four LVDS digital channels. Each individual EEM connector controls eight channels independently. Single EEM operation is possible. The direction (input or output) of each channel can be selected individually using DIP switches.
Outputs are intended to drive 100\textOmega~loads and inputs are 100\textOmega~terminated. This card can achieve higher speed and lower jitter than the isolated 2118/2128 BNC/SMA-TTL cards. Only shielded Ethernet Cat-6 cables should be connected. Outputs are intended to drive 100\textOmega~loads and inputs are 100\textOmega~terminated. This card can achieve higher speed and lower jitter than the isolated 2118/2128 BNC/SMA-TTL cards. Only shielded Ethernet Cat-6 cables should be connected.
% Switch to next column % Switch to next column
\vfill\break \vfill\break
@ -297,7 +297,7 @@ Outputs are intended to drive 100\textOmega~loads and inputs are 100\textOmega~t
\begin{figure}[hbt!] \begin{figure}[hbt!]
\centering \centering
\includegraphics[angle=90, height=1.7in]{photo2245.jpg} \includegraphics[angle=90, height=1.7in]{photo2245.jpg}
\includegraphics[angle=90, height=0.4in]{DIO_RJ45_FP.pdf} \includegraphics[angle=90, height=0.4in]{fp2245.pdf}
\caption{LVDS-TTL card and front panel} \caption{LVDS-TTL card and front panel}
\end{figure} \end{figure}
@ -310,12 +310,12 @@ Outputs are intended to drive 100\textOmega~loads and inputs are 100\textOmega~t
\section{Electrical Specifications} \section{Electrical Specifications}
All specifications are in $-40\degree C \leq T_A \leq 85\degree C$ unless otherwise noted. Information in this section is based on the datasheet of the repeater IC (FIN1101K8X\footnote{\label{repeaters}\url{https://www.onsemi.com/pdf/datasheet/fin1101-d.pdf}}). All specifications are in $-40\degree C \leq T_A \leq 85\degree C$ unless otherwise noted. Information in this section is based on the datasheet of the repeater IC (FIN1101K8X\footnote{\label{repeaters}\url{https://www.onsemi.com/pdf/datasheet/fin1101-d.pdf}}).
\begin{table}[h] \begin{table}[h]
\begin{threeparttable} \begin{threeparttable}
\caption{Recommended Input Voltage} \caption{Recommended Input Voltage}
\begin{tabularx}{\textwidth}{l | c | c c c | c | X} \begin{tabularx}{\textwidth}{l | c | c c c | c | X}
\thickhline \thickhline
\textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} & \textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\ \textbf{Unit} & \textbf{Conditions} \\
@ -328,16 +328,16 @@ All specifications are in $-40\degree C \leq T_A \leq 85\degree C$ unless otherw
\hline \hline
Differential input threshold LOW & $V_{TL}$ & -100 & & & mV & \\ Differential input threshold LOW & $V_{TL}$ & -100 & & & mV & \\
\thickhline \thickhline
\end{tabularx} \end{tabularx}
\end{threeparttable} \end{threeparttable}
\end{table} \end{table}
All typical values of DC specifications are at $T_A = 25\degree C$. All typical values of DC specifications are at $T_A = 25\degree C$.
\begin{table}[h] \begin{table}[h]
\begin{threeparttable} \begin{threeparttable}
\caption{DC Specifications} \caption{DC Specifications}
\begin{tabularx}{\textwidth}{l | c | c c c | c | X} \begin{tabularx}{\textwidth}{l | c | c c c | c | X}
\thickhline \thickhline
\textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} & \textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\ \textbf{Unit} & \textbf{Conditions} \\
@ -354,16 +354,16 @@ All typical values of DC specifications are at $T_A = 25\degree C$.
\hline \hline
Input current & $I_{IN}$ & & & $\pm20$ & \textmu A & Recommended input voltage \\ Input current & $I_{IN}$ & & & $\pm20$ & \textmu A & Recommended input voltage \\
\thickhline \thickhline
\end{tabularx} \end{tabularx}
\end{threeparttable} \end{threeparttable}
\end{table} \end{table}
All typical values of AC specifications are at $T_A = 25\degree C$, $V_{ID} = 300mV$, $V_{IC} = 1.3V$ unless otherwise given. All typical values of AC specifications are at $T_A = 25\degree C$, $V_{ID} = 300mV$, $V_{IC} = 1.3V$ unless otherwise given.
\begin{table}[h] \begin{table}[h]
\begin{threeparttable} \begin{threeparttable}
\caption{AC Specifications} \caption{AC Specifications}
\begin{tabularx}{\textwidth}{l | c c c | c | X} \begin{tabularx}{\textwidth}{l | c c c | c | X}
\thickhline \thickhline
\textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} & \textbf{Parameter} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\ \textbf{Unit} & \textbf{Conditions} \\
@ -382,60 +382,64 @@ All typical values of AC specifications are at $T_A = 25\degree C$, $V_{ID} = 30
LVDS clock jitter, & & \multirow{2}{*}{2.1} & \multirow{2}{*}{3.5} & \multirow{2}{*}{ps} & \multirow{2}{*}{400 MHz clock}\\ LVDS clock jitter, & & \multirow{2}{*}{2.1} & \multirow{2}{*}{3.5} & \multirow{2}{*}{ps} & \multirow{2}{*}{400 MHz clock}\\
random (RMS) & & & & & \\ random (RMS) & & & & & \\
\thickhline \thickhline
\end{tabularx} \end{tabularx}
\end{threeparttable} \end{threeparttable}
\end{table} \end{table}
\newpage \newpage
\section{Configuring IO Direction \& Termination} \section{Configuring IO Direction \& Termination}
\begin{multicols}{2}
The IO direction of each channel can be configured by DIP switches, which are found at the top of the card. \begin{multicols}{2}
\begin{itemize}
The IO direction of each channel can be configured by DIP switches, which are found at the top of the card.
\begin{itemize}
\itemsep0em \itemsep0em
\item IO direction switch closed (\texttt{ON}) \\ \item IO direction switch closed (\texttt{ON}) \\
Fixes the corresponding bank to output. The IO direction cannot be changed by I\textsuperscript{2}C. Fixes the corresponding bank to output. The IO direction cannot be changed by I\textsuperscript{2}C.
\item IO direction switch open (OFF) \\ \item IO direction switch open (OFF) \\
The corresponding bank is set to input by default. IO direction \textit{can} be changed by I\textsuperscript{2}C. The corresponding bank is set to input by default. IO direction \textit{can} be changed by I\textsuperscript{2}C.
\end{itemize} \end{itemize}
\vspace*{\fill}\columnbreak \vspace*{\fill}\columnbreak
\begin{center}
\begin{center}
\centering \centering
\includegraphics[height=1.5in]{lvds_ttl_switches.jpg} \includegraphics[height=1.5in]{lvds_ttl_switches.jpg}
\captionof{figure}{Position of switches} \captionof{figure}{Position of switches}
\end{center} \end{center}
\end{multicols}
\end{multicols}
\newpage \newpage
\codesection{2245 LVDS-TTL card} \codesection{2245 LVDS-TTL card}
Timing accuracy in these examples is well under 1 nanosecond thanks to ARTIQ RTIO infrastructure. Timing accuracy in these examples is well under 1 nanosecond thanks to ARTIQ RTIO infrastructure.
\subsection{One pulse per second} \subsection{One pulse per second}
The channel should be configured as output in both gateware and hardware. The channel should be configured as output in both gateware and hardware.
\inputcolorboxminted{firstline=9,lastline=14}{examples/ttl.py} \inputcolorboxminted{firstline=9,lastline=14}{examples/ttl.py}
\subsection{Morse code} \subsection{Morse code}
This example demonstrates some basic algorithmic features of the ARTIQ-Python language. This example demonstrates some basic algorithmic features of the ARTIQ-Python language.
\inputcolorboxminted{firstline=22,lastline=39}{examples/ttl.py} \inputcolorboxminted{firstline=22,lastline=39}{examples/ttl.py}
\newpage \newpage
\subsection{Counting rising edges in a 1ms window} \subsection{Counting rising edges in a 1ms window}
The channel should be configured as input in both gateware and hardware. The channel should be configured as input in both gateware and hardware.
\inputcolorboxminted{firstline=47,lastline=52}{examples/ttl.py} \inputcolorboxminted{firstline=47,lastline=52}{examples/ttl.py}
This example code uses the software counter, which has a maximum count rate of approximately 1 million events per second. This example code uses the software counter, which has a maximum count rate of approximately 1 million events per second.
If the gateware counter is enabled on the TTL channel, it can typically count up to 125 million events per second: If the gateware counter is enabled on the TTL channel, it can typically count up to 125 million events per second:
\inputcolorboxminted{firstline=60,lastline=65}{examples/ttl.py} \inputcolorboxminted{firstline=60,lastline=65}{examples/ttl.py}
\subsection{Responding to an external trigger} \subsection{Responding to an external trigger}
One channel needs to be configured as input, and the other as output. One channel needs to be configured as input, and the other as output.
\inputcolorboxminted{firstline=74,lastline=80}{examples/ttl.py} \inputcolorboxminted{firstline=74,lastline=80}{examples/ttl.py}
\newcommand{\wrapspacer}[1]% #1 = special text \newcommand{\wrapspacer}[1]% #1 = special text
{\bgroup {\bgroup
\sbox0{\begin{minipage}{\linewidth}\hrule height0pt \sbox0{\begin{minipage}{\linewidth}\hrule height0pt
#1\hrule height0pt #1\hrule height0pt
\end{minipage}}% \end{minipage}}%
@ -445,12 +449,13 @@ One channel needs to be configured as input, and the other as output.
\advance\dimen0 by -\baselineskip \advance\dimen0 by -\baselineskip
\repeat \repeat
\noindent\strut\usebox0\par \noindent\strut\usebox0\par
\egroup} \egroup}
\newpage \newpage
\subsection{SPI Master Device}
If one of the two card EEM ports is configured as \texttt{dio\char`_spi} instead of \texttt{dio}, its associated TTL channels can be configured as SPI master devices. Invocation of an SPI transfer follows this pattern: \subsection{SPI Master Device}
\begin{enumerate} If one of the two card EEM ports is configured as \texttt{dio\char`_spi} instead of \texttt{dio}, its associated TTL channels can be configured as SPI master devices. Invocation of an SPI transfer follows this pattern:
\begin{enumerate}
% The config register can be set using set_config. % The config register can be set using set_config.
% However, the only difference between these 2 methods is that set_config accepts an arbitrary % However, the only difference between these 2 methods is that set_config accepts an arbitrary
% frequency, then translate into the rough frequency divisor for set_config_mu. % frequency, then translate into the rough frequency divisor for set_config_mu.
@ -462,11 +467,11 @@ If one of the two card EEM ports is configured as \texttt{dio\char`_spi} instead
\item Start the SPI transfer by writing the \texttt{data} register using \texttt{write()}. \item Start the SPI transfer by writing the \texttt{data} register using \texttt{write()}.
\item If the data from the SPI slave is to be read (i.e. \texttt{SPI\char`_INPUT} was set in \texttt{config}), invoke \texttt{read()} to read. \item If the data from the SPI slave is to be read (i.e. \texttt{SPI\char`_INPUT} was set in \texttt{config}), invoke \texttt{read()} to read.
\end{enumerate} \end{enumerate}
The list of configurations supported in the gateware are listed as below: The list of configurations supported in the gateware are listed as below:
\begin{table}[h] \begin{table}[h]
\centering \centering
\begin{tabular}{|c|l|} \begin{tabular}{|c|l|}
\hline \hline
@ -480,11 +485,11 @@ The list of configurations supported in the gateware are listed as below:
\texttt{SPI\char`_LSB\char`_FIRST} & LSB is the first on bit on the wire. \\ \hline \texttt{SPI\char`_LSB\char`_FIRST} & LSB is the first on bit on the wire. \\ \hline
\texttt{SPI\char`_HALF\char`_DUPLEX} & Use 3-wire SPI, where MOSI is both input \& output capable. \\ \hline \texttt{SPI\char`_HALF\char`_DUPLEX} & Use 3-wire SPI, where MOSI is both input \& output capable. \\ \hline
\end{tabular} \end{tabular}
\end{table} \end{table}
The following ARTIQ example demonstrates the flow of an SPI transaction on a typical SPI setup with 3 homogeneous slaves. The following ARTIQ example demonstrates the flow of an SPI transaction on a typical SPI setup with 3 homogeneous slaves.
The direction switches on the LVDS-TTL card should be set to the correct IO direction for all relevant channels before powering on. The direction switches on the LVDS-TTL card should be set to the correct IO direction for all relevant channels before powering on.
\begin{center} \begin{center}
\begin{circuitikz}[european, scale=1, every label/.append style={align=center}] \begin{circuitikz}[european, scale=1, every label/.append style={align=center}]
% SPI master % SPI master
\draw (0, 1.8) node[twoportshape, t={}, circuitikz/bipoles/twoport/width=2.8, circuitikz/bipoles/twoport/height=2, scale=1] (master) {}; \draw (0, 1.8) node[twoportshape, t={}, circuitikz/bipoles/twoport/width=2.8, circuitikz/bipoles/twoport/height=2, scale=1] (master) {};
@ -549,31 +554,32 @@ The direction switches on the LVDS-TTL card should be set to the correct IO dire
\node at (3.4, -0.2)[circle,fill,inner sep=0.7pt]{}; \node at (3.4, -0.2)[circle,fill,inner sep=0.7pt]{};
\end{circuitikz} \end{circuitikz}
\end{center} \end{center}
\newpage \newpage
\subsubsection{SPI Configuration}
The following examples will assume the SPI communication has the following properties: \subsubsection{SPI Configuration}
\begin{itemize} The following examples will assume the SPI communication has the following properties:
\begin{itemize}
\item Chip select (CS) is active low \item Chip select (CS) is active low
\item Serial clock (SCK) idle level is low \item Serial clock (SCK) idle level is low
\item Data is sampled on rising edge of SCK \& shifted out on falling edge of SCK \item Data is sampled on rising edge of SCK \& shifted out on falling edge of SCK
\item Most significant bit (MSB) first \item Most significant bit (MSB) first
\item Full duplex \item Full duplex
\end{itemize} \end{itemize}
The baseline configuration for an \texttt{SPIMaster} instance can be defined as such: The baseline configuration for an \texttt{SPIMaster} instance can be defined as such:
\inputcolorboxminted[0]{firstline=2,lastline=8}{examples/spi.py} \inputcolorboxminted[0]{firstline=2,lastline=8}{examples/spi.py}
The \texttt{SPI\char`_END} \& \texttt{SPI\char`_INPUT} flags will be modified during runtime in the following example. The \texttt{SPI\char`_END} \& \texttt{SPI\char`_INPUT} flags will be modified during runtime in the following example.
\subsubsection{SPI frequency} \subsubsection{SPI frequency}
Frequency of the SPI clock must be the result of RTIO clock frequency divided by an integer factor in [2, 257]. In the folowing examples, the SPI frequency will be set to 1 MHz by dividing the RTIO frequency (125 MHz) by 125. Frequency of the SPI clock must be the result of RTIO clock frequency divided by an integer factor in [2, 257]. In the folowing examples, the SPI frequency will be set to 1 MHz by dividing the RTIO frequency (125 MHz) by 125.
\inputcolorboxminted[0]{firstline=10,lastline=10}{examples/spi.py} \inputcolorboxminted[0]{firstline=10,lastline=10}{examples/spi.py}
\subsubsection{SPI write} \subsubsection{SPI write}
Typically, an SPI write operation involves sending an instruction and data to the SPI slaves. Suppose the instruction and data are 8 bits and 32 bits respectively. The timing diagram of such a write operation is shown in the following: Typically, an SPI write operation involves sending an instruction and data to the SPI slaves. Suppose the instruction and data are 8 bits and 32 bits respectively. The timing diagram of such a write operation is shown in the following:
\begin{center} \begin{center}
\begin{tikztimingtable} \begin{tikztimingtable}
[ [
timing/d/background/.style={fill=white}, timing/d/background/.style={fill=white},
timing/lslope=0.2 timing/lslope=0.2
@ -587,18 +593,19 @@ Typically, an SPI write operation involves sending an instruction and data to th
MOSI & [timing/counter/new={char=I, reset char=J, reset type=arg, increment=-1, text format=I}, timing/counter/new={char=A, reset char=R, reset type=arg, increment=-1, text format=D}] MOSI & [timing/counter/new={char=I, reset char=J, reset type=arg, increment=-1, text format=I}, timing/counter/new={char=A, reset char=R, reset type=arg, increment=-1, text format=D}]
UJ{7}8{2I}R{31}8{2A}; [dotted] D [dotted] D{}; R{7}8{2A}2U \\ UJ{7}8{2I}R{31}8{2A}; [dotted] D [dotted] D{}; R{7}8{2A}2U \\
MOSI & 53U \\ MOSI & 53U \\
\end{tikztimingtable}% \end{tikztimingtable}%
\end{center} \end{center}
\newpage \newpage
Suppose the instruction is \texttt{0x13}, while the data is \texttt{0xDEADBEEF}. In addition, both slave 1 \& 2 are selected. This SPI transaction can be performed with the following code:
\inputcolorboxminted{firstline=18,lastline=27}{examples/spi.py}
\subsubsection{SPI read} Suppose the instruction is \texttt{0x13}, while the data is \texttt{0xDEADBEEF}. In addition, both slave 1 \& 2 are selected. This SPI transaction can be performed with the following code:
A 32-bit read is represented by the following timing diagram: \inputcolorboxminted{firstline=18,lastline=27}{examples/spi.py}
\begin{center} \subsubsection{SPI read}
\begin{tikztimingtable} A 32-bit read is represented by the following timing diagram:
\begin{center}
\begin{tikztimingtable}
[ [
timing/d/background/.style={fill=white}, timing/d/background/.style={fill=white},
timing/lslope=0.2 timing/lslope=0.2
@ -613,13 +620,14 @@ A 32-bit read is represented by the following timing diagram:
UJ{7}8{2I}36U \\ UJ{7}8{2I}36U \\
MOSI & [timing/counter/new={char=A, reset char=R, reset type=arg, increment=-1, text format=D}] MOSI & [timing/counter/new={char=A, reset char=R, reset type=arg, increment=-1, text format=D}]
17UR{31}8{2A}; [dotted] D [dotted] D{}; R{7}8{2A}2U \\ 17UR{31}8{2A}; [dotted] D [dotted] D{}; R{7}8{2A}2U \\
\end{tikztimingtable}% \end{tikztimingtable}%
\end{center} \end{center}
Suppose the instruction is \texttt{0x81}, where only slave 0 is selected. This SPI transcation can be performed by the following code. Suppose the instruction is \texttt{0x81}, where only slave 0 is selected. This SPI transcation can be performed by the following code.
\inputcolorboxminted{firstline=35,lastline=49}{examples/spi.py} \inputcolorboxminted{firstline=35,lastline=49}{examples/spi.py}
\newpage \newpage
\ordersection{2245 LVDS-TTL} \ordersection{2245 LVDS-TTL}
\finalfootnote \finalfootnote

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