4410-4412: replace dead link

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architeuthis 2024-11-14 18:58:22 +01:00 committed by sb10q
parent bebd7bbfda
commit 49c06af717

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@ -285,7 +285,7 @@ It provides 4 channels of DDS (direct digital synthesis) at 1GS/s. Output freque
Specifications of parameters are based on the datasheets of the DDS IC
(AD9910\footnote{\label{ad9910}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/AD9910.pdf}},
AD9912\footnote{\label{ad9912}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/AD9912.pdf}}),
clock buffer IC (Si53312\footnote{\label{clock_buffer}\url{https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/Si53312.pdf}}),
clock buffer IC (Si53312\footnote{\label{clock_buffer}\url{https://www.skyworksinc.com/-/media/SkyWorks/SL/documents/public/data-sheets/Si5331x_datasheet.pdf}}),
digital attenuator IC (HMC542BLP4E\footnote{\label{attenuator}\url{https://www.analog.com/media/en/technical-documentation/data-sheets/hmc542b.pdf}}), Sinara project information\footnote{\label{urukul_wiki}\url{https://github.com/sinara-hw/Urukul/wiki\#details-specification-and-typical-performance-data}}
and corresponding test results\footnote{\label{sinara354}\url{https://github.com/sinara-hw/sinara/issues/354\#issuecomment-352859041}}.
\begin{table}[h]