forked from M-Labs/artiq-zynq
subkernel: fix DMA return control to wrong master
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@ -170,6 +170,7 @@ pub extern "C" fn dma_playback(timestamp: i64, ptr: i32, _uses_ddma: bool) {
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csr::rtio_dma::base_address_write(ptr as u32);
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csr::rtio_dma::time_offset_write(timestamp as u64);
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let old_cri_master = csr::cri_con::selected_read();
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csr::cri_con::selected_write(1);
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csr::rtio_dma::enable_write(1);
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#[cfg(has_drtio)]
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@ -183,7 +184,7 @@ pub extern "C" fn dma_playback(timestamp: i64, ptr: i32, _uses_ddma: bool) {
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});
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}
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while csr::rtio_dma::enable_read() != 0 {}
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csr::cri_con::selected_write(0);
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csr::cri_con::selected_write(old_cri_master);
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let error = csr::rtio_dma::error_read();
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if error != 0 {
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