forked from M-Labs/artiq-zynq
runtime: init the logger
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@ -45,9 +45,6 @@ checksum = "0f8cb7306107e4b10e64994de6d3274bd08996a7c1322a27b86482392f96be0a"
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[[package]]
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name = "dyld"
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version = "0.1.0"
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dependencies = [
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"libboard_zynq",
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]
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[[package]]
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name = "libasync"
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@ -185,6 +182,7 @@ dependencies = [
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"libboard_zynq",
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"libcortex_a9",
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"libsupport_zynq",
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"log",
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"num-derive",
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"num-traits",
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]
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@ -13,6 +13,7 @@ default = ["target_zc706"]
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num-traits = { version = "0.2", default-features = false }
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num-derive = "0.3"
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cslice = "0.3"
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log = "0.4"
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libboard_zynq = { git = "https://git.m-labs.hk/M-Labs/zc706.git" }
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libsupport_zynq = { git = "https://git.m-labs.hk/M-Labs/zc706.git" }
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libcortex_a9 = { git = "https://git.m-labs.hk/M-Labs/zc706.git" }
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@ -2,6 +2,7 @@
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#![no_main]
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extern crate alloc;
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extern crate log;
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use core::{cmp, str};
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@ -9,7 +10,7 @@ use libboard_zynq::{
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println,
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self as zynq, clocks::Clocks, clocks::source::{ClockSource, ArmPll, IoPll},
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};
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use libsupport_zynq::ram;
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use libsupport_zynq::{logger, ram};
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mod comms;
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mod pl;
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@ -33,6 +34,8 @@ fn identifier_read(buf: &mut [u8]) -> &str {
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#[no_mangle]
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pub fn main_core0() {
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println!("ARTIQ runtime starting...");
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let _ = logger::init();
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log::set_max_level(log::LevelFilter::Debug);
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const CPU_FREQ: u32 = 800_000_000;
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