From cbe36e336d31de04809d9ed9130dd4f85575c9da Mon Sep 17 00:00:00 2001 From: occheung Date: Wed, 12 Aug 2020 17:34:50 +0800 Subject: [PATCH] migen: changed eem port --- migen/fpga_config.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/migen/fpga_config.py b/migen/fpga_config.py index 0f613a2..8c980f1 100644 --- a/migen/fpga_config.py +++ b/migen/fpga_config.py @@ -4,7 +4,7 @@ from migen.fhdl.module import Module class UrukulConnector(Module): def __init__(self, platform): # Request EEM I/O & SPI - eem = platform.request("eem", 1) + eem = platform.request("eem", 0) spi = platform.request("spi") # Assert signal length