From a62c204b78af89d831aec4d32a8fd44df6b74fa4 Mon Sep 17 00:00:00 2001 From: occheung Date: Sun, 23 Aug 2020 22:28:32 +0800 Subject: [PATCH] migen: add io_update --- migen/fpga_config.py | 7 ++++++- migen/humpback.py | 12 +++++------- 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/migen/fpga_config.py b/migen/fpga_config.py index 685c307..db0eec3 100644 --- a/migen/fpga_config.py +++ b/migen/fpga_config.py @@ -16,10 +16,12 @@ class UrukulConnector(Module): platform.request("eem0_n", 2), platform.request("eem0", 3), platform.request("eem0", 4), - platform.request("eem0", 5) + platform.request("eem0", 5), + platform.request("eem0", 6) ] spi = platform.request("spi") led = platform.request("user_led") + io_update = platform.request("io_update") # Assert SPI resource length assert len(spi.sclk) == 1 @@ -61,6 +63,9 @@ class UrukulConnector(Module): eem0[5].p.eq(spi.cs[2]), eem0[5].n.eq(~spi.cs[2]), + eem0[6].p.eq(io_update), + eem0[6].n.eq(~io_update), + led.eq(1) ] diff --git a/migen/humpback.py b/migen/humpback.py index f2799f9..c31a76b 100644 --- a/migen/humpback.py +++ b/migen/humpback.py @@ -31,16 +31,14 @@ _io.append( ) ) -# Insert LVDS input +# Resource: DDS I/O_Update +''' + io_update -> PB13 : B12 +''' _io.append( - ("eem_in", 2, - Subsignal("p", Pins("C1")), - Subsignal("n", Pins("C2")), - IOStandard("LVDS25"), - ) + ("io_update", 0, Pins("B12"), IOStandard("LVCMOS33")) ) - # Inherit Platform to gain the programmed clock attribute class HumpbackPlatform(Platform): def __init__(self):