humpback-dds/migen/fpga_config.py

38 lines
883 B
Python
Raw Normal View History

2020-08-09 02:03:47 +08:00
from humpback import HumpbackPlatform
from migen.fhdl.module import Module
class UrukulConnector(Module):
def __init__(self, platform):
# Request EEM I/O & SPI
eem = platform.request("eem", 1)
spi = platform.request("spi")
# Assert signal length
assert len(eem.p) == 8
assert len(eem.n) == 8
assert len(spi.sclk) == 1
assert len(spi.mosi) == 1
assert len(spi.miso) == 1
assert len(spi.cs) == 3
# Flip positive signal as negative output
self.comb += eem.n.eq(~eem.p)
# Link EEM to SPI
self.comb += [
eem.p[0].eq(spi.sclk),
eem.p[1].eq(spi.mosi),
2020-08-09 18:46:06 +08:00
spi.miso.eq(eem.p[2]),
2020-08-09 02:03:47 +08:00
eem.p[3].eq(spi.cs[0]),
eem.p[4].eq(spi.cs[1]),
eem.p[5].eq(spi.cs[2]),
]
2020-08-09 18:46:06 +08:00
# Debug purposes: Tie EEM MISO to EEM MOSI
# self.comb += eem.p[2].eq(eem.n[1])
2020-08-09 13:42:18 +08:00
2020-08-09 02:03:47 +08:00
if __name__ == "__main__":
platform = HumpbackPlatform()
platform.build(UrukulConnector(platform))