From 50667f0a13839bee519bd5e55dbad60a91b38a67 Mon Sep 17 00:00:00 2001 From: Sebastien Bourdeauducq Date: Fri, 17 Apr 2020 14:05:45 +0800 Subject: [PATCH] core1: reset -> disable, add restart function --- experiments/src/main.rs | 2 +- libsupport_zynq/src/boot.rs | 25 ++++++++++++++----------- 2 files changed, 15 insertions(+), 12 deletions(-) diff --git a/experiments/src/main.rs b/experiments/src/main.rs index 92ab8cf..aaabfd2 100644 --- a/experiments/src/main.rs +++ b/experiments/src/main.rs @@ -151,7 +151,7 @@ pub fn main_core0() { println!("{} -> {}", i, j); } }); - core1.reset(); + core1.disable(); libcortex_a9::asm::dsb(); print!("Core1 stack [{:08X}..{:08X}]:", &core1.stack[0] as *const _ as u32, &core1.stack[core1.stack.len() - 1] as *const _ as u32); diff --git a/libsupport_zynq/src/boot.rs b/libsupport_zynq/src/boot.rs index d442bcb..3a998bc 100644 --- a/libsupport_zynq/src/boot.rs +++ b/libsupport_zynq/src/boot.rs @@ -109,17 +109,6 @@ pub struct Core1> { } impl> Core1 { - pub fn reset(&self) { - unsafe { - CORE1_STACK.set(0); - } - - slcr::RegisterBlock::unlocked(|slcr| { - slcr.a9_cpu_rst_ctrl.modify(|_, w| w.a9_rst1(true)); - slcr.a9_cpu_rst_ctrl.modify(|_, w| w.a9_rst1(false)); - }); - } - /// Reset and start core1 /// /// The stack must not be in OCM because core1 still has to @@ -152,4 +141,18 @@ impl> Core1 { core } + + pub fn disable(&self) { + unsafe { + CORE1_STACK.set(0); + } + self.restart(); + } + + pub fn restart(&self) { + slcr::RegisterBlock::unlocked(|slcr| { + slcr.a9_cpu_rst_ctrl.modify(|_, w| w.a9_rst1(true)); + slcr.a9_cpu_rst_ctrl.modify(|_, w| w.a9_rst1(false)); + }); + } }