forked from M-Labs/nac3
gateware: fix VADJ I/O standard conflict
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6a361893c2
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@ -3,6 +3,7 @@
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import argparse
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import argparse
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from migen import *
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from migen import *
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from migen.build.generic_platform import *
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from migen.genlib.resetsync import AsyncResetSynchronizer
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from migen.genlib.resetsync import AsyncResetSynchronizer
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from migen.genlib.cdc import MultiReg
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from migen.genlib.cdc import MultiReg
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from migen_axi.integration.soc_core import SoCCore
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from migen_axi.integration.soc_core import SoCCore
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@ -115,6 +116,16 @@ class Simple(ZC706):
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self.add_rtio(rtio_channels)
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self.add_rtio(rtio_channels)
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# The NIST backplanes require setting VADJ to 3.3V by reprogramming the power supply.
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# This also changes the I/O standard for some on-board LEDs.
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leds_fmc33 = [
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("user_led_33", 0, Pins("Y21"), IOStandard("LVCMOS33")),
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("user_led_33", 1, Pins("G2"), IOStandard("LVCMOS15")),
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("user_led_33", 2, Pins("W21"), IOStandard("LVCMOS33")),
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("user_led_33", 3, Pins("A17"), IOStandard("LVCMOS15")),
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]
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class NIST_CLOCK(ZC706):
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class NIST_CLOCK(ZC706):
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"""
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"""
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NIST clock hardware, with old backplane and 11 DDS channels
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NIST clock hardware, with old backplane and 11 DDS channels
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@ -124,11 +135,12 @@ class NIST_CLOCK(ZC706):
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platform = self.platform
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platform = self.platform
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platform.add_extension(nist_clock.fmc_adapter_io)
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platform.add_extension(nist_clock.fmc_adapter_io)
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platform.add_extension(leds_fmc33)
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rtio_channels = []
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rtio_channels = []
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for i in range(4):
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for i in range(4):
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phy = ttl_simple.Output(platform.request("user_led", i))
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phy = ttl_simple.Output(platform.request("user_led_33", i))
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self.submodules += phy
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self.submodules += phy
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rtio_channels.append(rtio.Channel.from_phy(phy))
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rtio_channels.append(rtio.Channel.from_phy(phy))
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@ -174,11 +186,12 @@ class NIST_QC2(ZC706):
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platform = self.platform
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platform = self.platform
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platform.add_extension(nist_qc2.fmc_adapter_io)
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platform.add_extension(nist_qc2.fmc_adapter_io)
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platform.add_extension(leds_fmc33)
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rtio_channels = []
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rtio_channels = []
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for i in range(4):
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for i in range(4):
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phy = ttl_simple.Output(platform.request("user_led", i))
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phy = ttl_simple.Output(platform.request("user_led_33", i))
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self.submodules += phy
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self.submodules += phy
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rtio_channels.append(rtio.Channel.from_phy(phy))
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rtio_channels.append(rtio.Channel.from_phy(phy))
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