abdul124
/
nac3
forked from M-Labs/nac3
1
0
Fork 0
Code Pull Requests Activity

dma: use const initializer for manager

This commit is contained in:
Sebastien Bourdeauducq 2020-07-25 12:12:56 +08:00
parent 886582869c
commit e64f59723c
3 changed files with 14 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/runtime/src/kernel/core1.rs
View File

@ -15,7 +15,6 @@ use crate::eh_artiq;
use super::{ use super::{
api::resolve, api::resolve,
rpc::rpc_send_async, rpc::rpc_send_async,
dma::init_dma,
CHANNEL_0TO1, CHANNEL_1TO0, CHANNEL_0TO1, CHANNEL_1TO0,
KERNEL_CHANNEL_0TO1, KERNEL_CHANNEL_1TO0, KERNEL_CHANNEL_0TO1, KERNEL_CHANNEL_1TO0,
KERNEL_IMAGE, KERNEL_IMAGE,
@ -126,9 +125,6 @@ pub fn main_core1() {
enable_fpu(); enable_fpu();
debug!("FPU enabled on Core1"); debug!("FPU enabled on Core1");
init_dma();
debug!("Init DMA!");
let mut core1_tx = None; let mut core1_tx = None;
while core1_tx.is_none() { while core1_tx.is_none() {
core1_tx = CHANNEL_1TO0.lock().take(); core1_tx = CHANNEL_1TO0.lock().take();

37
src/runtime/src/kernel/dma.rs
View File

@ -46,7 +46,7 @@ pub struct Manager {
// Copied from https://github.com/m-labs/artiq/blob/master/artiq/firmware/runtime/rtio_dma.rs // Copied from https://github.com/m-labs/artiq/blob/master/artiq/firmware/runtime/rtio_dma.rs
// basically without modification except removing some warnings. // basically without modification except removing some warnings.
impl Manager { impl Manager {
pub fn new() -> Manager { pub const fn new() -> Manager {
Manager { Manager {
entries: BTreeMap::new(), entries: BTreeMap::new(),
recording_name: String::new(), recording_name: String::new(),
@ -106,7 +106,7 @@ impl Manager {
} }
static mut DMA_MANAGER: Option<Manager> = None; static mut DMA_MANAGER: Manager = Manager::new();
#[repr(C)] #[repr(C)]
pub struct DmaTrace { pub struct DmaTrace {
@ -114,16 +114,9 @@ pub struct DmaTrace {
address: i32, address: i32,
} }
pub fn init_dma() {
unsafe {
DMA_MANAGER = Some(Manager::new());
}
}
fn dma_record_flush() { fn dma_record_flush() {
unsafe { unsafe {
let manager = DMA_MANAGER.as_mut().unwrap(); DMA_MANAGER.record_append(&DMA_RECORDER.buffer[..DMA_RECORDER.data_len]);
manager.record_append(&DMA_RECORDER.buffer[..DMA_RECORDER.data_len]);
DMA_RECORDER.data_len = 0; DMA_RECORDER.data_len = 0;
} }
} }
@ -143,8 +136,7 @@ pub extern fn dma_record_start(name: CSlice<u8>) {
dma_record_output_wide as *const ()).unwrap(); dma_record_output_wide as *const ()).unwrap();
DMA_RECORDER.active = true; DMA_RECORDER.active = true;
let manager = DMA_MANAGER.as_mut().unwrap(); DMA_MANAGER.record_start(name);
manager.record_start(name);
} }
} }
@ -163,8 +155,7 @@ pub extern fn dma_record_stop(duration: i64) {
rtio::output_wide as *const ()).unwrap(); rtio::output_wide as *const ()).unwrap();
DMA_RECORDER.active = false; DMA_RECORDER.active = false;
let manager = DMA_MANAGER.as_mut().unwrap(); DMA_MANAGER.record_stop(duration as u64);
manager.record_stop(duration as u64);
} }
} }
@ -238,23 +229,21 @@ pub extern fn dma_record_output_wide(target: i32, words: CSlice<i32>) {
pub extern fn dma_erase(name: CSlice<u8>) { pub extern fn dma_erase(name: CSlice<u8>) {
let name = str::from_utf8(name.as_ref()).unwrap(); let name = str::from_utf8(name.as_ref()).unwrap();
let manager = unsafe { unsafe {
DMA_MANAGER.as_mut().unwrap() DMA_MANAGER.erase(name);
}; };
manager.erase(name);
} }
pub extern fn dma_retrieve(name: CSlice<u8>) -> DmaTrace { pub extern fn dma_retrieve(name: CSlice<u8>) -> DmaTrace {
let name = str::from_utf8(name.as_ref()).unwrap(); let name = str::from_utf8(name.as_ref()).unwrap();
let manager = unsafe { let (trace, duration) = unsafe {
DMA_MANAGER.as_mut().unwrap() DMA_MANAGER.with_trace(name, |trace, duration| (trace.map(|v| {
dcci_slice(v);
dsb();
v.as_ptr()
}), duration))
}; };
let (trace, duration) = manager.with_trace(name, |trace, duration| (trace.map(|v| {
dcci_slice(v);
dsb();
v.as_ptr()
}), duration));
match trace { match trace {
Some(ptr) => Ok(DmaTrace { Some(ptr) => Ok(DmaTrace {
address: ptr as i32, address: ptr as i32,

1
src/runtime/src/main.rs
View File

@ -4,6 +4,7 @@
#![feature(alloc_error_handler)] #![feature(alloc_error_handler)]
#![feature(panic_info_message)] #![feature(panic_info_message)]
#![feature(c_variadic)] #![feature(c_variadic)]
#![feature(const_btree_new)]
extern crate alloc; extern crate alloc;