From 59dac8bdf518f81f64c3a0110168a20d2712358b Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Thu, 23 Sep 2021 19:38:48 +0800
Subject: [PATCH] nac3embedded: compile for RISC-V ARTIQ coredevice

---
 nac3embedded/src/lib.rs | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/nac3embedded/src/lib.rs b/nac3embedded/src/lib.rs
index cc3efc33..3ee1ef72 100644
--- a/nac3embedded/src/lib.rs
+++ b/nac3embedded/src/lib.rs
@@ -146,24 +146,22 @@ impl Nac3 {
             builder.populate_module_pass_manager(&passes);
             passes.run_on(module);
 
-            let triple = TargetMachine::get_default_triple();
+            let triple = TargetTriple::create("riscv32-unknown-linux");
             let target =
                 Target::from_triple(&triple).expect("couldn't create target from target triple");
             let target_machine = target
                 .create_target_machine(
                     &triple,
                     "",
-                    "",
+                    "+a,+m",
                     OptimizationLevel::Default,
-                    RelocMode::Default,
+                    RelocMode::PIC,
                     CodeModel::Default,
                 )
                 .expect("couldn't create target machine");
             target_machine
                 .write_to_file(module, FileType::Object, Path::new(&format!("{}.o", module.get_name().to_str().unwrap())))
                 .expect("couldn't write module to file");
-
-            // println!("IR:\n{}", module.print_to_string().to_str().unwrap());
         })));
         let threads: Vec<String> = (0..4).map(|i| format!("module{}", i)).collect();
         let threads: Vec<_> = threads.iter().map(|s| s.as_str()).collect();