forked from M-Labs/artiq-zynq
use simple RTIO now interface without pinning
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44b37aba7d
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f562ff95c3
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@ -6,7 +6,6 @@ use libcortex_a9::{mutex::Mutex, sync_channel::{self, sync_channel}};
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use libsupport_zynq::boot::Core1;
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use dyld;
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use crate::pl::csr;
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use crate::rtio;
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@ -75,8 +74,9 @@ macro_rules! api {
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fn resolve(required: &[u8]) -> Option<u32> {
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let api = &[
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/* proxified syscalls */
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api!(now = csr::rtio::NOW_HI_ADDR as *const _),
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api!(now_mu = rtio::now_mu),
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api!(at_mu = rtio::at_mu),
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api!(delay_mu = rtio::delay_mu),
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api!(rtio_init = rtio::init),
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api!(rtio_get_destination_status = rtio::get_destination_status),
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@ -36,6 +36,24 @@ pub extern fn get_counter() -> i64 {
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}
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}
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pub extern fn now_mu() -> i64 {
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unsafe {
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csr::rtio::now_read() as i64
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}
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}
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pub extern fn at_mu(t: i64) {
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unsafe {
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csr::rtio::now_write(t as u64);
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}
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}
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pub extern fn delay_mu(dt: i64) {
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unsafe {
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csr::rtio::now_write(csr::rtio::now_read() + dt as u64);
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}
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}
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// writing the LSB of o_data (offset=0) triggers the RTIO write
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#[inline(always)]
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pub unsafe fn rtio_o_data_write(offset: usize, data: u32) {
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@ -52,7 +70,7 @@ pub unsafe fn rtio_i_data_read(offset: usize) -> u32 {
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#[inline(never)]
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unsafe fn process_exceptional_status(channel: i32, status: u8) {
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let timestamp = *(csr::rtio::NOW_HI_ADDR as *const i64);
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let timestamp = csr::rtio::now_read() as i64;
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if status & RTIO_O_STATUS_WAIT != 0 {
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while csr::rtio::o_status_read() & RTIO_O_STATUS_WAIT != 0 {}
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}
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2
zc706.py
2
zc706.py
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@ -41,7 +41,7 @@ class ZC706(SoCCore):
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self.submodules.rtio_tsc = rtio.TSC("async", glbl_fine_ts_width=3)
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self.submodules.rtio_core = rtio.Core(self.rtio_tsc, rtio_channels)
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self.csr_devices.append("rtio_core")
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self.submodules.rtio = rtio.KernelInitiator(self.rtio_tsc)
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self.submodules.rtio = rtio.KernelInitiator(self.rtio_tsc, now64=True)
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self.csr_devices.append("rtio")
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self.comb += self.rtio.cri.connect(self.rtio_core.cri)
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