forked from M-Labs/artiq-zynq
runtime: implement acpki RTIO output
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537f4968eb
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b915176b29
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@ -428,6 +428,7 @@ dependencies = [
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"num-derive",
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"num-traits",
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"unwind",
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"vcell",
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"void",
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]
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@ -24,6 +24,7 @@ async-recursion = "0.3"
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fatfs = { version = "0.3", features = ["core_io"], default-features = false }
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log_buffer = { version = "1.2" }
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libm = { version = "0.2", features = ["unstable"] }
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vcell = "0.1"
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libboard_zynq = { git = "https://git.m-labs.hk/M-Labs/zc706.git" }
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libsupport_zynq = { default-features = false, features = ["alloc_core"], git = "https://git.m-labs.hk/M-Labs/zc706.git" }
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@ -1,9 +1,18 @@
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use cslice::CSlice;
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use vcell::VolatileCell;
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use libcortex_a9::asm;
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use crate::artiq_raise;
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use crate::pl::csr;
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pub const RTIO_O_STATUS_WAIT: i32 = 1;
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pub const RTIO_O_STATUS_UNDERFLOW: i32 = 2;
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pub const RTIO_O_STATUS_DESTINATION_UNREACHABLE: i32 = 4;
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pub const RTIO_I_STATUS_WAIT_EVENT: i32 = 1;
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pub const RTIO_I_STATUS_OVERFLOW: i32 = 2;
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pub const RTIO_I_STATUS_WAIT_STATUS: i32 = 4;
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pub const RTIO_I_STATUS_DESTINATION_UNREACHABLE: i32 = 8;
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#[repr(C)]
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pub struct TimestampedData {
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@ -11,9 +20,40 @@ pub struct TimestampedData {
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data: i32,
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}
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#[repr(C, align(32))]
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struct Transaction {
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request_cmd: i8,
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padding0: i8,
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padding1: i8,
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padding2: i8,
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request_target: i32,
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request_timestamp: i64,
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request_data: i64,
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padding: i64,
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reply_status: VolatileCell<i32>,
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reply_data: VolatileCell<i32>,
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reply_timestamp: VolatileCell<u64>
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}
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static mut TRANSACTION_BUFFER: Transaction = Transaction {
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request_cmd: 0,
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padding0: 0,
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padding1: 0,
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padding2: 0,
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request_target: 0,
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request_timestamp: 0,
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request_data: 0,
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padding: 0,
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reply_status: VolatileCell::new(0),
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reply_data: VolatileCell::new(0),
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reply_timestamp: VolatileCell::new(0)
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};
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pub extern fn init() {
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unsafe {
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csr::rtio_core::reset_write(1);
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csr::rtio::engine_addr_base_write(&TRANSACTION_BUFFER as *const Transaction as u32);
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csr::rtio::enable_write(1);
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}
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}
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@ -30,22 +70,65 @@ pub extern fn get_counter() -> i64 {
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}
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pub extern fn now_mu() -> i64 {
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unimplemented!();
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unsafe { TRANSACTION_BUFFER.request_timestamp }
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}
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pub extern fn at_mu(t: i64) {
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unimplemented!();
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unsafe { TRANSACTION_BUFFER.request_timestamp = t }
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}
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pub extern fn delay_mu(dt: i64) {
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unimplemented!();
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unsafe { TRANSACTION_BUFFER.request_timestamp += dt }
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}
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#[inline(never)]
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unsafe fn process_exceptional_status(channel: i32, status: i32) {
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let timestamp = now_mu();
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if status & RTIO_O_STATUS_WAIT != 0 {
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// FIXME: this is a kludge and probably buggy (kernel interrupted?)
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while csr::rtio::o_status_read() as i32 & RTIO_O_STATUS_WAIT != 0 {}
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}
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if status & RTIO_O_STATUS_UNDERFLOW != 0 {
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artiq_raise!("RTIOUnderflow",
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"RTIO underflow at {0} mu, channel {1}, slack {2} mu",
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timestamp, channel as i64, timestamp - get_counter());
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}
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if status & RTIO_O_STATUS_DESTINATION_UNREACHABLE != 0 {
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artiq_raise!("RTIODestinationUnreachable",
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"RTIO destination unreachable, output, at {0} mu, channel {1}",
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timestamp, channel as i64, 0);
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}
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}
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pub extern fn output(target: i32, data: i32) {
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unimplemented!();
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unsafe {
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// Clear status so we can observe response
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TRANSACTION_BUFFER.reply_status.set(0);
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TRANSACTION_BUFFER.request_cmd = 0;
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TRANSACTION_BUFFER.request_target = target;
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TRANSACTION_BUFFER.request_data = data as i64;
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asm::dmb();
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asm::sev();
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let mut status;
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loop {
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status = TRANSACTION_BUFFER.reply_status.get();
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if status != 0 {
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break
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}
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}
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let status = status & !0x10000;
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if status != 0 {
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process_exceptional_status(target >> 8, status);
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}
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}
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}
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pub extern fn output_wide(target: i32, data: CSlice<i32>) {
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// TODO
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unimplemented!();
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}
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@ -62,5 +145,6 @@ pub extern fn input_timestamped_data(timeout: i64, channel: i32) -> TimestampedD
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}
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pub fn write_log(data: &[i8]) {
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// TODO
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unimplemented!();
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}
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