forked from M-Labs/artiq-zynq
fix cargo fmt
This commit is contained in:
parent
ad076dd4e9
commit
6088e6bb6f
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@ -137,7 +137,7 @@ pub enum Packet {
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},
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AnalyzerHeaderRequest {
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destination: u8
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destination: u8,
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},
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AnalyzerHeader {
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sent_bytes: u32,
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@ -316,7 +316,7 @@ impl Packet {
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},
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0xa0 => Packet::AnalyzerHeaderRequest {
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destination: reader.read_u8()?
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destination: reader.read_u8()?,
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},
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0xa1 => Packet::AnalyzerHeader {
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sent_bytes: reader.read_u32()?,
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@ -324,7 +324,7 @@ impl Packet {
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overflow_occurred: reader.read_bool()?,
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},
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0xa2 => Packet::AnalyzerDataRequest {
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destination: reader.read_u8()?
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destination: reader.read_u8()?,
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},
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0xa3 => {
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let last = reader.read_bool()?;
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@ -334,9 +334,9 @@ impl Packet {
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Packet::AnalyzerData {
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last: last,
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length: length,
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data: data
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data: data,
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}
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}
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},
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0xb0 => {
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let destination = reader.read_u8()?;
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@ -573,7 +573,7 @@ impl Packet {
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Packet::AnalyzerHeader {
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sent_bytes,
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total_byte_count,
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overflow_occurred
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overflow_occurred,
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} => {
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writer.write_u8(0xa1)?;
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writer.write_u32(sent_bytes)?;
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@ -584,11 +584,7 @@ impl Packet {
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writer.write_u8(0xa2)?;
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writer.write_u8(destination)?;
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}
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Packet::AnalyzerData {
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last,
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length,
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data
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} => {
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Packet::AnalyzerData { last, length, data } => {
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writer.write_u8(0xa3)?;
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writer.write_bool(last)?;
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writer.write_u16(length)?;
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@ -1,10 +1,11 @@
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use alloc::{rc::Rc, vec::Vec};
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use core::cell::RefCell;
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use libasync::{smoltcp::TcpStream, task};
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use libboard_artiq::drtio_routing;
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use libboard_zynq::{smoltcp::Error, timer::GlobalTimer};
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use libcortex_a9::{cache, mutex::Mutex};
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use log::{debug, info, warn, error};
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use core::cell::RefCell;
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use alloc::{rc::Rc, vec::Vec};
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use libboard_artiq::drtio_routing;
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use log::{debug, error, info, warn};
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use crate::{pl, proto_async::*};
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@ -49,13 +50,15 @@ pub mod remote_analyzer {
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pub total_byte_count: u64,
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pub sent_bytes: u32,
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pub error: bool,
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pub data: Vec<u8>
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pub data: Vec<u8>,
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}
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pub async fn get_data(aux_mutex: &Rc<Mutex<bool>>,
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pub async fn get_data(
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aux_mutex: &Rc<Mutex<bool>>,
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routing_table: &drtio_routing::RoutingTable,
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up_destinations: &Rc<RefCell<[bool; drtio_routing::DEST_COUNT]>>,
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timer: GlobalTimer) -> Result<RemoteBuffer, &'static str> {
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timer: GlobalTimer,
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) -> Result<RemoteBuffer, &'static str> {
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// gets data from satellites and returns consolidated data
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let mut remote_data: Vec<u8> = Vec::new();
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let mut remote_error = false;
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@ -64,7 +67,7 @@ pub mod remote_analyzer {
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let data_vec = match drtio::analyzer_query(aux_mutex, routing_table, up_destinations, timer).await {
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Ok(data_vec) => data_vec,
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Err(e) => return Err(e)
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Err(e) => return Err(e),
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};
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for data in data_vec {
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remote_total_bytes += data.total_byte_count;
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@ -77,7 +80,7 @@ pub mod remote_analyzer {
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total_byte_count: remote_total_bytes,
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sent_bytes: remote_sent_bytes,
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error: remote_error,
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data: remote_data
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data: remote_data,
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})
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}
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}
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@ -101,10 +104,13 @@ async fn write_header(stream: &mut TcpStream, header: &Header) -> Result<(), Err
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Ok(())
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}
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async fn handle_connection(stream: &mut TcpStream, _aux_mutex: &Rc<Mutex<bool>>,
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async fn handle_connection(
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stream: &mut TcpStream,
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_aux_mutex: &Rc<Mutex<bool>>,
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_routing_table: &drtio_routing::RoutingTable,
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_up_destinations: &Rc<RefCell<[bool; drtio_routing::DEST_COUNT]>>,
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_timer: GlobalTimer) -> Result<(), Error> {
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_timer: GlobalTimer,
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) -> Result<(), Error> {
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info!("received connection");
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let data = unsafe { &BUFFER.data[..] };
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@ -113,7 +119,11 @@ async fn handle_connection(stream: &mut TcpStream, _aux_mutex: &Rc<Mutex<bool>>,
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let total_byte_count = unsafe { pl::csr::rtio_analyzer::dma_byte_count_read() as u64 };
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let pointer = (total_byte_count % BUFFER_SIZE as u64) as usize;
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let wraparound = total_byte_count >= BUFFER_SIZE as u64;
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let sent_bytes = if wraparound { BUFFER_SIZE as u32 } else { total_byte_count as u32 };
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let sent_bytes = if wraparound {
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BUFFER_SIZE as u32
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} else {
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total_byte_count as u32
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};
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if overflow_occurred {
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warn!("overflow occured");
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@ -126,23 +136,28 @@ async fn handle_connection(stream: &mut TcpStream, _aux_mutex: &Rc<Mutex<bool>>,
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let remote = remote_analyzer::get_data(_aux_mutex, _routing_table, _up_destinations, _timer).await;
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#[cfg(has_drtio)]
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let (header, remote_data) = match remote {
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Ok(remote) => (Header {
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Ok(remote) => (
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Header {
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total_byte_count: total_byte_count + remote.total_byte_count,
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sent_bytes: sent_bytes + remote.sent_bytes,
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error_occurred: overflow_occurred | bus_error_occurred | remote.error,
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log_channel: pl::csr::CONFIG_RTIO_LOG_CHANNEL as u8,
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dds_onehot_sel: true
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}, remote.data),
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dds_onehot_sel: true,
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},
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remote.data,
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),
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Err(e) => {
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error!("Error getting remote analyzer data: {}", e);
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(Header {
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(
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Header {
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total_byte_count: total_byte_count,
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sent_bytes: sent_bytes,
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error_occurred: true,
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log_channel: pl::csr::CONFIG_RTIO_LOG_CHANNEL as u8,
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dds_onehot_sel: true
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dds_onehot_sel: true,
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},
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Vec::new())
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Vec::new(),
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)
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}
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};
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@ -169,10 +184,12 @@ async fn handle_connection(stream: &mut TcpStream, _aux_mutex: &Rc<Mutex<bool>>,
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Ok(())
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}
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pub fn start(aux_mutex: &Rc<Mutex<bool>>,
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pub fn start(
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aux_mutex: &Rc<Mutex<bool>>,
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routing_table: &Rc<RefCell<drtio_routing::RoutingTable>>,
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up_destinations: &Rc<RefCell<[bool; drtio_routing::DEST_COUNT]>>,
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timer: GlobalTimer,) {
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timer: GlobalTimer,
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) {
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let aux_mutex = aux_mutex.clone();
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let routing_table = routing_table.clone();
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let up_destinations = up_destinations.clone();
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@ -21,8 +21,8 @@ pub mod drtio {
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use log::{error, info, warn};
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use super::*;
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use crate::{rtio_dma::remote_dma, ASYNC_ERROR_BUSY, ASYNC_ERROR_COLLISION, ASYNC_ERROR_SEQUENCE_ERROR,
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SEEN_ASYNC_ERRORS, analyzer::remote_analyzer::RemoteBuffer};
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use crate::{analyzer::remote_analyzer::RemoteBuffer, rtio_dma::remote_dma, ASYNC_ERROR_BUSY,
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ASYNC_ERROR_COLLISION, ASYNC_ERROR_SEQUENCE_ERROR, SEEN_ASYNC_ERRORS};
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pub fn startup(
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aux_mutex: &Rc<Mutex<bool>>,
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@ -527,37 +527,48 @@ pub mod drtio {
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aux_mutex: &Rc<Mutex<bool>>,
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routing_table: &drtio_routing::RoutingTable,
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timer: GlobalTimer,
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destination: u8
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destination: u8,
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) -> Result<RemoteBuffer, &'static str> {
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let linkno = routing_table.0[destination as usize][0] - 1;
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let reply = aux_transact(
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aux_mutex,
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linkno,
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&Packet::AnalyzerHeaderRequest { destination: destination },
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&Packet::AnalyzerHeaderRequest {
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destination: destination,
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},
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timer,
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)
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.await;
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let (sent, total, overflow) = match reply {
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Ok(Packet::AnalyzerHeader {
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sent_bytes, total_byte_count, overflow_occurred }
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) => (sent_bytes, total_byte_count, overflow_occurred),
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sent_bytes,
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total_byte_count,
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overflow_occurred,
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}) => (sent_bytes, total_byte_count, overflow_occurred),
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Ok(_) => return Err("received unexpected aux packet during remote analyzer header request"),
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Err(e) => return Err(e)
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Err(e) => return Err(e),
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};
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let mut remote_data: Vec<u8> = Vec::new();
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if sent > 0 {
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let mut last_packet = false;
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while !last_packet {
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let reply = aux_transact(aux_mutex, linkno,
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&Packet::AnalyzerDataRequest { destination: destination }, timer,).await;
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let reply = aux_transact(
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aux_mutex,
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linkno,
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&Packet::AnalyzerDataRequest {
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destination: destination,
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},
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timer,
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)
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.await;
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match reply {
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Ok(Packet::AnalyzerData { last, length, data }) => {
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last_packet = last;
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remote_data.extend(&data[0..length as usize]);
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},
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}
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Ok(_) => return Err("received unexpected aux packet during remote analyzer data request"),
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Err(e) => return Err(e)
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Err(e) => return Err(e),
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}
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}
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}
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@ -566,11 +577,12 @@ pub mod drtio {
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sent_bytes: sent,
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total_byte_count: total,
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error: overflow,
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data: remote_data
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data: remote_data,
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})
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}
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pub async fn analyzer_query(aux_mutex: &Rc<Mutex<bool>>,
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pub async fn analyzer_query(
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aux_mutex: &Rc<Mutex<bool>>,
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routing_table: &drtio_routing::RoutingTable,
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up_destinations: &Rc<RefCell<[bool; drtio_routing::DEST_COUNT]>>,
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timer: GlobalTimer,
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@ -1,6 +1,5 @@
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use libboard_artiq::pl::csr;
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use libboard_artiq::{drtioaux_proto::ANALYZER_MAX_SIZE, pl::csr};
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use libcortex_a9::cache;
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use libboard_artiq::drtioaux_proto::ANALYZER_MAX_SIZE;
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const BUFFER_SIZE: usize = 512 * 1024;
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@ -9,9 +8,7 @@ struct Buffer {
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data: [u8; BUFFER_SIZE],
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}
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static mut BUFFER: Buffer = Buffer {
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data: [0; BUFFER_SIZE]
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};
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static mut BUFFER: Buffer = Buffer { data: [0; BUFFER_SIZE] };
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fn arm() {
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unsafe {
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@ -36,18 +33,18 @@ fn disarm() {
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pub struct Analyzer {
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// necessary for keeping track of sent data
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sent_bytes: usize,
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data_iter: usize
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data_iter: usize,
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}
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pub struct Header {
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pub total_byte_count: u64,
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pub sent_bytes: u32,
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pub error: bool
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pub error: bool,
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}
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pub struct AnalyzerSliceMeta {
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pub len: u16,
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pub last: bool
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pub last: bool,
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}
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impl Analyzer {
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@ -56,7 +53,7 @@ impl Analyzer {
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arm();
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Analyzer {
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sent_bytes: 0,
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data_iter: 0
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data_iter: 0,
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}
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}
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@ -71,8 +68,16 @@ impl Analyzer {
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let bus_err = unsafe { csr::rtio_analyzer::dma_bus_error_read() != 0 };
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let total_byte_count = unsafe { csr::rtio_analyzer::dma_byte_count_read() as u64 };
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let wraparound = total_byte_count >= BUFFER_SIZE as u64;
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self.sent_bytes = if wraparound { BUFFER_SIZE } else { total_byte_count as usize };
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self.data_iter = if wraparound { (total_byte_count % BUFFER_SIZE as u64) as usize } else { 0 };
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self.sent_bytes = if wraparound {
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BUFFER_SIZE
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} else {
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total_byte_count as usize
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};
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self.data_iter = if wraparound {
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(total_byte_count % BUFFER_SIZE as u64) as usize
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} else {
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0
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};
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if overflow {
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warn!("overflow occured");
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@ -84,14 +89,18 @@ impl Analyzer {
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Header {
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total_byte_count: total_byte_count,
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sent_bytes: self.sent_bytes as u32,
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error: overflow | bus_err
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error: overflow | bus_err,
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}
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}
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pub fn get_data(&mut self, data_slice: &mut [u8; ANALYZER_MAX_SIZE]) -> AnalyzerSliceMeta {
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let data = unsafe { &BUFFER.data[..] };
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let i = self.data_iter;
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let len = if i + ANALYZER_MAX_SIZE < self.sent_bytes { ANALYZER_MAX_SIZE } else { self.sent_bytes - i };
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let len = if i + ANALYZER_MAX_SIZE < self.sent_bytes {
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ANALYZER_MAX_SIZE
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} else {
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self.sent_bytes - i
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};
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let last = i + len == self.sent_bytes;
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if i + len >= BUFFER_SIZE {
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data_slice[..len].clone_from_slice(&data[i..BUFFER_SIZE]);
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@ -107,7 +116,7 @@ impl Analyzer {
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AnalyzerSliceMeta {
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len: len as u16,
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last: last
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last: last,
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}
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}
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}
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@ -20,15 +20,14 @@ extern crate alloc;
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use core::sync::atomic::{AtomicBool, Ordering};
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use analyzer::Analyzer as Analyzer;
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use analyzer::Analyzer;
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use dma::Manager as DmaManager;
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use embedded_hal::blocking::delay::DelayUs;
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#[cfg(feature = "target_kasli_soc")]
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use libboard_artiq::io_expander;
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#[cfg(has_si5324)]
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use libboard_artiq::si5324;
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use libboard_artiq::{drtio_routing, drtioaux, identifier_read, logger, pl::csr};
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use libboard_artiq::{drtioaux_proto::ANALYZER_MAX_SIZE};
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use libboard_artiq::{drtio_routing, drtioaux, drtioaux_proto::ANALYZER_MAX_SIZE, identifier_read, logger, pl::csr};
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#[cfg(feature = "target_kasli_soc")]
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use libboard_zynq::error_led::ErrorLED;
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use libboard_zynq::{gic, i2c::I2c, mpcore, print, println, stdio, time::Milliseconds, timer::GlobalTimer};
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|
@ -40,9 +39,9 @@ use libcortex_a9::{asm, interrupt_handler,
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use libregister::{RegisterR, RegisterW};
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use libsupport_zynq::ram;
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mod analyzer;
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mod dma;
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mod repeater;
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mod analyzer;
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fn drtiosat_reset(reset: bool) {
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unsafe {
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|
@ -416,24 +415,34 @@ fn process_aux_packet(
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)
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}
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drtioaux::Packet::AnalyzerHeaderRequest { destination: _destination } => {
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drtioaux::Packet::AnalyzerHeaderRequest {
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destination: _destination,
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} => {
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forward!(_routing_table, _destination, *_rank, _repeaters, &packet, timer);
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let header = analyzer.get_header();
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drtioaux::send(0, &drtioaux::Packet::AnalyzerHeader {
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drtioaux::send(
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0,
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&drtioaux::Packet::AnalyzerHeader {
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total_byte_count: header.total_byte_count,
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sent_bytes: header.sent_bytes,
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overflow_occurred: header.error,
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})
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},
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)
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}
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drtioaux::Packet::AnalyzerDataRequest { destination: _destination } => {
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drtioaux::Packet::AnalyzerDataRequest {
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destination: _destination,
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} => {
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forward!(_routing_table, _destination, *_rank, _repeaters, &packet, timer);
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let mut data_slice: [u8; ANALYZER_MAX_SIZE] = [0; ANALYZER_MAX_SIZE];
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let meta = analyzer.get_data(&mut data_slice);
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drtioaux::send(0, &drtioaux::Packet::AnalyzerData {
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drtioaux::send(
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0,
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&drtioaux::Packet::AnalyzerData {
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last: meta.last,
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length: meta.len,
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data: data_slice,
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})
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},
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)
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}
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|
||||
drtioaux::Packet::DmaAddTraceRequest {
|
||||
|
@ -483,7 +492,16 @@ fn process_aux_packets(
|
|||
) {
|
||||
let result = drtioaux::recv(0).and_then(|packet| {
|
||||
if let Some(packet) = packet {
|
||||
process_aux_packet(repeaters, routing_table, rank, packet, timer, i2c, dma_manager, analyzer)
|
||||
process_aux_packet(
|
||||
repeaters,
|
||||
routing_table,
|
||||
rank,
|
||||
packet,
|
||||
timer,
|
||||
i2c,
|
||||
dma_manager,
|
||||
analyzer,
|
||||
)
|
||||
} else {
|
||||
Ok(())
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue