forked from M-Labs/artiq-zynq
main: set exception vector table addr
linker: add exceptions start & end symbol
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63bf1c81d4
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@ -10,7 +10,9 @@ SECTIONS
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__text_start = .;
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.text :
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{
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__exceptions_start = .;
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KEEP(*(.text.exceptions));
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__exceptions_end = .;
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*(.text.boot);
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*(.text .text.*);
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} > SDRAM
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@ -21,7 +21,7 @@ use libboard_artiq::{identifier_read, logger, pl};
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use libboard_zynq::{gic, mpcore, timer::GlobalTimer};
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use libconfig::Config;
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use libcortex_a9::l2c::enable_l2_cache;
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use libsupport_zynq::ram;
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use libsupport_zynq::{exception_vectors, ram};
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use log::{info, warn};
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mod analyzer;
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@ -38,6 +38,11 @@ mod rtio_mgt;
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#[cfg(has_drtio)]
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mod subkernel;
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// linker symbols
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extern "C" {
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static __exceptions_start: u32;
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}
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#[cfg(all(feature = "target_kasli_soc", has_drtio))]
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async fn io_expanders_service(
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i2c_bus: RefCell<&mut libboard_zynq::i2c::I2c>,
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@ -77,6 +82,9 @@ static mut LOG_BUFFER: [u8; 1 << 17] = [0; 1 << 17];
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#[no_mangle]
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pub fn main_core0() {
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unsafe {
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exception_vectors::set_vector_table(&__exceptions_start as *const u32 as u32);
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}
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enable_l2_cache(0x8);
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let mut timer = GlobalTimer::start();
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@ -38,7 +38,7 @@ use libboard_zynq::error_led::ErrorLED;
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use libboard_zynq::{i2c::I2c, print, println, time::Milliseconds, timer::GlobalTimer};
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use libcortex_a9::{l2c::enable_l2_cache, regs::MPIDR};
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use libregister::RegisterR;
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use libsupport_zynq::ram;
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use libsupport_zynq::{exception_vectors, ram};
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use routing::Router;
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use subkernel::Manager as KernelManager;
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@ -48,6 +48,11 @@ mod repeater;
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mod routing;
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mod subkernel;
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// linker symbols
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extern "C" {
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static __exceptions_start: u32;
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}
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fn drtiosat_reset(reset: bool) {
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unsafe {
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csr::drtiosat::reset_write(if reset { 1 } else { 0 });
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@ -827,6 +832,9 @@ static mut LOG_BUFFER: [u8; 1 << 17] = [0; 1 << 17];
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#[no_mangle]
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pub extern "C" fn main_core0() -> i32 {
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unsafe {
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exception_vectors::set_vector_table(&__exceptions_start as *const u32 as u32);
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}
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enable_l2_cache(0x8);
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let mut timer = GlobalTimer::start();
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