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work around boot.bin/fsbl problems

* Use fsbl.elf sent to me by Xilinx tech support. None of the other FSBL images for ZC706, including the official one from 2019.2-zc706-release.tar.xz, appear to work (no UART output, no FPGA DONE).
* Prevent boot.bin creation tool from crashing due to long paths.
This commit is contained in:
Sebastien Bourdeauducq 2020-05-06 17:35:15 +08:00
parent 7c22b72129
commit 27466036a7
2 changed files with 13 additions and 6 deletions

View File

@ -96,17 +96,24 @@ in
buildInputs = [ mkbootimage ];
}
''
bif=`mktemp`
cat > $bif << EOF
# Do not use "long" paths in boot.bif, because embedded developers
# can't write software (mkbootimage will segfault).
# TODO: use self-built fsbl
bifdir=`mktemp -d`
cd $bifdir
ln -s ${./fsbl.elf} fsbl.elf
ln -s ${zc706-gateware}/top.bit top.bit
ln -s ${zc706-firmware}/runtime.elf runtime.elf
cat > boot.bif << EOF
the_ROM_image:
{
[bootloader]${zc706-fsbl}/fsbl.elf
${zc706-gateware}/top.bit
${zc706-firmware}/runtime.elf
[bootloader]fsbl.elf
top.bit
runtime.elf
}
EOF
mkdir $out $out/nix-support
mkbootimage $bif $out/boot.bin
mkbootimage boot.bif $out/boot.bin
echo file binary-dist $out/boot.bin >> $out/nix-support/hydra-build-products
'';
}

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fsbl.elf Normal file

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