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172 Commits 2 Branches 0 Tags 473 KiB
Commit Graph

95 Commits

Author SHA1 Message Date
occheung 8dbf621679 scpi: implement tst 2020-08-31 17:43:15 +08:00
occheung f60ec09b29 scpi: implement rst 2020-08-31 16:48:21 +08:00
occheung d78f85721f ethernet: minimal impl for urukul as scpi device 2020-08-31 13:32:08 +08:00
occheung b0272a6fc2 urukul: add commented code, but with lifetime conflict 2020-08-31 12:32:39 +08:00
occheung 49594dfb3b urukul: very bad constructor 2020-08-31 11:36:05 +08:00
occheung 69761c4517 cpld: fix indent 2020-08-31 09:34:38 +08:00
occheung 4852fc54ea cpld: detach from lib.rs 2020-08-31 09:31:56 +08:00
occheung f92b2ba6f5 ethernet: add scpi to silent socket example 2020-08-28 15:48:13 +08:00
occheung fa117c94bb ethernet: separate pin dec 2020-08-27 17:09:35 +08:00
occheung fbed41ebd3 dds: exclude RAM from impl_reg_io macro 2020-08-27 12:17:53 +08:00
occheung 1de13d6f3a dds: fix full amplitude scale 2020-08-27 11:15:42 +08:00
occheung 649b5b498b dds: add single tone control 2020-08-26 17:39:33 +08:00
occheung 1d3ced0d16 dds: add clock control 2020-08-26 16:49:37 +08:00
occheung 38b1c7528c dds: add register io 2020-08-26 13:18:50 +08:00
occheung 990fc075f1 cpld: add size_of 2020-08-26 11:04:39 +08:00
occheung 5f874e81b5 bitmask: add mask merging 2020-08-26 11:04:08 +08:00
occheung 181ef5c72a attenuator: fix reverse data 2020-08-25 12:20:24 +08:00
occheung 29abca72cd cpld: auto invoke io update 2020-08-24 17:03:44 +08:00
occheung 9ec5698f63 migen: replace ethernet conflict pin 2020-08-24 10:57:37 +08:00
occheung 6ef122c9a1 migen: beaufity eem res struct 2020-08-23 17:17:09 +08:00
occheung dbea9aba30 attenuator: fix return data 2020-08-21 14:18:33 +08:00
occheung 6e6e500f8a spi_slave: auto deselect chip 2020-08-18 15:25:32 +08:00
occheung 8547610661 dds: add register io 2020-08-17 12:15:11 +08:00
occheung afe00402b7 dds: add register macro 2020-08-17 11:45:42 +08:00
occheung f32de647d3 dds: add all cfg enum 2020-08-14 14:14:14 +08:00
occheung bb1feb65f7 dds: add cfg1 enum 2020-08-13 17:17:21 +08:00
occheung 495bf21575 bitmask_macro: separated from cfg_reg 2020-08-13 16:51:08 +08:00
occheung 31b84bc12d cfg_reg: mv bitmask operation to macro 2020-08-13 16:31:27 +08:00
occheung fe47cafb93 dds: init 2020-08-12 15:31:06 +08:00
occheung 765cd1d513 cfg_reg: split enum into status and cfg 2020-08-12 12:28:33 +08:00
occheung ccd6a1faf9 cfg_reg: add status getter 2020-08-12 12:26:15 +08:00
occheung 8f4a97c97e cfg_reg: add getter function 2020-08-12 12:00:11 +08:00
occheung 0543e98956 cfg_reg: add setter function 2020-08-12 11:50:24 +08:00
occheung e75c3d3342 cfg_reg: reorganize bitmasks 2020-08-11 16:55:31 +08:00
occheung 0df7ff71cf cfg_reg: add bitmask macro 2020-08-11 16:51:17 +08:00
occheung 4596dc29cb generic_spi_dev: removed 2020-08-11 11:32:10 +08:00
occheung a1a10d7afe cfg_reg: init 2020-08-11 11:29:47 +08:00
occheung 00938bcb23 attenuator: init 2020-08-11 00:07:07 +08:00
occheung 2def3ed95d rust: changed crate structure 2020-08-10 18:06:15 +08:00
occheung 429fbb7443 cpld: fixed unwanted mut 2020-08-10 17:22:46 +08:00
occheung a406dea0c7 cpld: spi slave WIP 2020-08-10 17:04:40 +08:00
occheung 8e7fe971cb cpld: add release 2020-08-10 00:52:05 +08:00
occheung 58e77ae671 cpld: basic switching capability 2020-08-09 18:46:06 +08:00
occheung 393138dc9a migen: debug spi connection 2020-08-09 13:42:18 +08:00
occheung 7351a9d58a rust: migrated 2020-08-07 13:36:00 +08:00