kasli-soc fix: eth phy: reset page to 0 for ident #95

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sb10q merged 1 commits from mwojcik/zynq-rs:eth_phy_page_fix into master 2022-03-10 17:21:54 +08:00

Turns out pages are persistent - if you run a new program that configures eth after one has been run already, the transceiver register page is set to 3, and the program will panic not being able to identify the phy. So on kasli-soc the page is reset back to 0 before an identification attempt.

Turns out pages are persistent - if you run a new program that configures eth after one has been run already, the transceiver register page is set to 3, and the program will panic not being able to identify the phy. So on kasli-soc the page is reset back to 0 before an identification attempt.
mwojcik added 1 commit 2022-03-10 17:16:10 +08:00

Does only the kasli-soc PHY have this page register business? If it's standard and the same on all PHYs, maybe we can have it for all boards.

Does only the kasli-soc PHY have this page register business? If it's standard and the same on all PHYs, maybe we can have it for all boards.
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Neither Red Pitaya's XWAY nor the Realtek use pages. Dunno about zc706's 88E1116R - the datasheet for that one doesn't mention any registers at all.

Neither Red Pitaya's XWAY nor the Realtek use pages. Dunno about zc706's 88E1116R - the datasheet for that one doesn't mention any registers at all.
sb10q merged commit 1c8e2c318c into master 2022-03-10 17:21:54 +08:00
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Reference: M-Labs/zynq-rs#95
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