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add support for PHY_RST GPIO #104

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sb10q merged 1 commits from jmatyas/zynq-rs:jma_dev into master 2023-09-07 18:19:53 +08:00
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jmatyas commented 2023-08-31 19:41:37 +08:00

Ethernet PHY on Kasli SoC requires hardware reset to be correctly initialized. Though PHY usually works with just software reset, it is rather coincidental behaviour. This pull request adds support for Kasli SoC Ethernet PHY reset pin and pulses it for 10 ms before software identifies the PHY.

Ethernet PHY on Kasli SoC requires hardware reset to be correctly initialized. Though PHY usually works with just software reset, it is rather coincidental behaviour. This pull request adds support for Kasli SoC Ethernet PHY reset pin and pulses it for 10 ms before software identifies the PHY.
jmatyas added 1 commit 2023-08-31 19:41:38 +08:00
sb10q commented 2023-09-04 14:28:16 +08:00
Owner

Thanks. Why is it marked WIP? What is needed to finalize it?

Thanks. Why is it marked WIP? What is needed to finalize it?
morgan was assigned by sb10q 2023-09-04 14:28:36 +08:00
jmatyas commented 2023-09-07 16:12:02 +08:00
Poster

Thanks. Why is it marked WIP? What is needed to finalize it?

Pardon, I misunderstood a statement somewhere during creation of a PR and I assumed that each PR should be marked as WIP initially. WIP prefix may be removed, it's all ready to finalize.

> Thanks. Why is it marked WIP? What is needed to finalize it? Pardon, I misunderstood a statement somewhere during creation of a PR and I assumed that each PR should be marked as WIP initially. WIP prefix may be removed, it's all ready to finalize.
sb10q changed title from WIP: add support for PHY_RST GPIO to add support for PHY_RST GPIO 2023-09-07 18:19:39 +08:00
sb10q merged commit c15b54f92b into master 2023-09-07 18:19:53 +08:00
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Reference: M-Labs/zynq-rs#104
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