various, split later

.cargo/config

@@ -1,9 +1,11 @@
 [target.armv7-none-eabihf]
 rustflags = [
   "-C", "link-arg=-Tlink.x",
-  "-C", "target-feature=a9,armv7-a,neon",
   "-C", "target-cpu=cortex-a9",
 ]
 
 [build]
 target = "armv7-none-eabihf.json"
+
+[future-incompat-report]
+frequency = "never"

Cargo.lock

@@ -34,9 +34,9 @@ checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd"
 
 [[package]]
 name = "compiler_builtins"
-version = "0.1.49"
+version = "0.1.108"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "20b1438ef42c655665a8ab2c1c6d605a305f031d38d9be689ddfef41a20f3aa2"
+checksum = "d68bc55329711cd719c2687bb147bc06211b0521f97ef398280108ccb23227e9"
 
 [[package]]
 name = "core_io"

Cargo.toml

@@ -9,6 +9,7 @@ members = [
   "experiments",
   "szl",
 ]
+resolver = "2"
 
 [profile.release]
 panic = "abort"

armv7-none-eabihf.json

@@ -4,7 +4,7 @@
   "emit-debug-gdb-scripts": false,
   "env": "",
   "executables": true,
-  "features": "+v7,+vfp3,-d32,+thumb2,-neon",
+  "features": "+v7,+vfp3,-d32,+thumb2,+neon,+a9,+armv7-a",
   "is-builtin": false,
   "linker": "rust-lld",
   "linker-flavor": "ld.lld",

experiments/Cargo.toml

@@ -3,7 +3,7 @@ name = "experiments"
 description = "Developing bare-metal Rust on Zynq"
 version = "0.0.0"
 authors = ["M-Labs"]
-edition = "2018"
+edition = "2021"
 
 [features]
 target_zc706 = ["libboard_zynq/target_zc706", "libsupport_zynq/target_zc706"]

experiments/src/main.rs

@@ -1,14 +1,13 @@
 #![no_std]
 #![no_main]
-#![allow(incomplete_features)]
 #![feature(naked_functions)]
-#![feature(asm)]
 #![feature(inline_const)]
 
 extern crate alloc;
 
 use alloc::collections::BTreeMap;
 use core::arch::asm;
+use::core::ptr::addr_of_mut;
 use libasync::{
     delay,
     smoltcp::{Sockets, TcpStream},
@@ -73,7 +72,7 @@ interrupt_handler!(IRQ, irq, __irq_stack0_start, __irq_stack1_start, {
             if id.0 == 0 {
                 gic.end_interrupt(id);
                 asm::exit_irq();
-                SP.write(&mut __stack1_start as *mut _ as u32);
+                SP.write(addr_of_mut!(__stack1_start) as u32);
                 asm::enable_irq();
                 CORE1_RESTART.store(false, Ordering::Relaxed);
                 notify_spin_lock();

flake.lock

@@ -2,16 +2,16 @@
   "nodes": {
     "nixpkgs": {
       "locked": {
-        "lastModified": 1736867362,
+        "lastModified": 1734529975,
-        "narHash": "sha256-i/UJ5I7HoqmFMwZEH6vAvBxOrjjOJNU739lnZnhUln8=",
+        "narHash": "sha256-ze3IJksru9dN0keqUxY0WNf8xrwfs8Ty/z9v/keyBbg=",
         "owner": "NixOS",
         "repo": "nixpkgs",
-        "rev": "9c6b49aeac36e2ed73a8c472f1546f6d9cf1addc",
+        "rev": "72d11d40b9878a67c38f003c240c2d2e1811e72a",
         "type": "github"
       },
       "original": {
         "owner": "NixOS",
-        "ref": "nixos-24.11",
+        "ref": "nixos-24.05",
         "repo": "nixpkgs",
         "type": "github"
       }

flake.nix

@@ -1,7 +1,7 @@
 {
   description = "Bare-metal Rust on Zynq-7000";
 
-  inputs.nixpkgs.url = github:NixOS/nixpkgs/nixos-24.11;
+  inputs.nixpkgs.url = github:NixOS/nixpkgs/nixos-24.05;
   inputs.rust-overlay = {
     url = "github:oxalica/rust-overlay?ref=snapshot/2024-08-01";
     inputs.nixpkgs.follows = "nixpkgs";
@@ -11,7 +11,7 @@
     let
       pkgs = import nixpkgs { system = "x86_64-linux"; overlays = [ (import rust-overlay) crosspkgs-overlay ]; };
       
-      rust = pkgs.rust-bin.nightly."2021-09-01".default.override {
+      rust = pkgs.rust-bin.nightly."2024-04-06".default.override {
         extensions = [ "rust-src" ];
         targets = [ ];
       };
@@ -95,9 +95,7 @@
         dontFixup = true;
       };
 
-      cargo-xbuild = pkgs.cargo-xbuild.overrideAttrs(oa: {
+      cargo-xbuild = pkgs.cargo-xbuild;
-        postPatch = "substituteInPlace src/sysroot.rs --replace 2021 2018";
-      });
 
       build-crate = name: crate: features: rustPlatform.buildRustPackage rec {
         name = "${crate}";
@@ -113,7 +111,7 @@
           };
         };
 
-        nativeBuildInputs = [ cargo-xbuild pkgs.llvmPackages_13.clang-unwrapped ];
+        nativeBuildInputs = [ cargo-xbuild pkgs.llvmPackages_18.clang-unwrapped ];
         buildPhase = ''
           export XARGO_RUST_SRC="${rust}/lib/rustlib/src/rust/library"
           export CARGO_HOME=$(mktemp -d cargo-home.XXX)
@@ -169,7 +167,7 @@
 
           pkgs.openocd pkgs.gdb
           pkgs.openssh pkgs.rsync
-          pkgs.llvmPackages_13.clang-unwrapped
+          pkgs.llvmPackages_18.clang-unwrapped
           (pkgs.python3.withPackages(ps: [ ps.pyftdi ]))
         ];
       };

libasync/Cargo.toml

@@ -3,7 +3,7 @@ name = "libasync"
 description = "low-level async support"
 version = "0.0.0"
 authors = ["M-Labs"]
-edition = "2018"
+edition = "2021"
 
 [dependencies]
 #futures = { version = "0.3", default-features = false }

libboard_zynq/Cargo.toml

@@ -3,7 +3,7 @@ name = "libboard_zynq"
 description = "Drivers for peripherals in the Zynq PS"
 version = "0.0.0"
 authors = ["M-Labs"]
-edition = "2018"
+edition = "2021"
 
 [features]
 target_zc706 = []

libboard_zynq/src/sdio/mod.rs

@@ -9,7 +9,6 @@ use super::time::Milliseconds;
 use embedded_hal::timer::CountDown;
 use libregister::{RegisterR, RegisterRW, RegisterW};
 use log::{trace, debug};
-use nb;
 
 /// Basic SDIO Struct with common low-level functions.
 pub struct Sdio {

libconfig/Cargo.toml

@@ -2,7 +2,7 @@
 name = "libconfig"
 version = "0.1.0"
 authors = ["M-Labs"]
-edition = "2018"
+edition = "2021"
 
 [dependencies]
 libboard_zynq = { path = "../libboard_zynq" }

libconfig/src/sd_reader.rs

@@ -1,5 +1,4 @@
 use core_io::{BufRead, Error, ErrorKind, Read, Result as IoResult, Seek, SeekFrom, Write};
-use fatfs;
 use libboard_zynq::sdio::{sd_card::SdCard, CmdTransferError};
 use log::debug;
 use alloc::vec::Vec;

libcortex_a9/Cargo.toml

@@ -2,7 +2,7 @@
 name = "libcortex_a9"
 version = "0.0.0"
 authors = ["M-Labs"]
-edition = "2018"
+edition = "2021"
 
 [features]
 power_saving = []

libcortex_a9/src/lib.rs

@@ -1,10 +1,6 @@
 #![no_std]
 #![feature(never_type)]
-#![feature(global_asm)]
-#![feature(asm)]
-#![allow(incomplete_features)]
 #![feature(inline_const)]
-#![feature(const_fn_trait_bound)]
 
 extern crate alloc;
 

libcortex_a9/src/mmu.rs

@@ -1,6 +1,7 @@
 use bit_field::BitField;
 use super::{regs::*, asm::*, cache::*};
 use libregister::RegisterW;
+use core::ptr::{addr_of_mut};
 
 #[derive(Copy, Clone)]
 #[repr(u8)]
@@ -136,7 +137,7 @@ pub struct L1Table {
 impl L1Table {
     pub fn get() -> &'static mut Self {
         unsafe {
-            &mut L1_TABLE
+            &mut *addr_of_mut!(L1_TABLE)
         }
     }
 

libcortex_a9/src/sync_channel.rs

@@ -37,7 +37,7 @@ impl<'a, T> Sender<'a, T> where T: Clone {
             notify_spin_lock();
             if !prev.is_null() {
                 unsafe {
-                    Box::from_raw(prev);
+                    let _ = Box::from_raw(prev);
                 }
             }
             Ok(())
@@ -91,7 +91,7 @@ impl<'a, T> Sender<'a, T> where T: Clone {
         for v in self.list.iter() {
             let original = v.swap(core::ptr::null_mut(), Ordering::Relaxed);
             if !original.is_null() {
-                Box::from_raw(original);
+                let _ = Box::from_raw(original);
             }
         }
     }
@@ -177,10 +177,7 @@ macro_rules! sync_channel {
         {
             use core::sync::atomic::{AtomicUsize, AtomicPtr};
             use $crate::sync_channel::{Sender, Receiver};
-            const fn new_atomic() -> AtomicPtr<$t> {
+            static LIST: [AtomicPtr<$t>; $cap + 1] = [const { AtomicPtr::new(core::ptr::null_mut()) }; $cap + 1];
-                AtomicPtr::new(core::ptr::null_mut())
-            }
-            static LIST: [AtomicPtr<$t>; $cap + 1] = [const { new_atomic() }; $cap + 1];
             static WRITE: AtomicUsize = AtomicUsize::new(0);
             static READ: AtomicUsize = AtomicUsize::new(0);
             (Sender::new(&LIST, &WRITE, &READ), Receiver::new(&LIST, &WRITE, &READ))

libregister/Cargo.toml

@@ -2,7 +2,7 @@
 name = "libregister"
 version = "0.0.0"
 authors = ["M-Labs"]
-edition = "2018"
+edition = "2021"
 
 [dependencies]
 vcell = "0.1"

libsupport_zynq/Cargo.toml

@@ -3,7 +3,7 @@ name = "libsupport_zynq"
 description = "Software support for running in the Zynq PS"
 version = "0.0.0"
 authors = ["M-Labs"]
-edition = "2018"
+edition = "2021"
 
 [features]
 target_zc706 = ["libboard_zynq/target_zc706"]
@@ -20,7 +20,7 @@ default = ["panic_handler", "dummy_irq_handler", "dummy_fiq_handler"]
 
 [dependencies]
 r0 = "1"
-compiler_builtins = "=0.1.49"
+compiler_builtins = "=0.1.108"
 linked_list_allocator = { version = "0.8", default-features = false, features = ["const_mut_refs"] }
 libregister = { path = "../libregister" }
 libcortex_a9 = { path = "../libcortex_a9" }

libsupport_zynq/src/boot.rs

@@ -1,5 +1,5 @@
 use r0::zero_bss;
-use core::ptr::write_volatile;
+use core::ptr::{addr_of, addr_of_mut, write_volatile};
 use core::arch::asm;
 use libregister::{
     VolatileCell,
@@ -43,7 +43,7 @@ unsafe extern "C" fn boot_core0() -> ! {
     let mpcore = mpcore::RegisterBlock::mpcore();
     mpcore.scu_invalidate.invalidate_all_cores();
 
-    zero_bss(&mut __bss_start, &mut __bss_end);
+    zero_bss(addr_of_mut!(__bss_start), addr_of_mut!(__bss_end));
 
     let mmu_table = mmu::L1Table::get()
         .setup_flat_layout();
@@ -66,10 +66,12 @@ unsafe extern "C" fn boot_core0() -> ! {
 unsafe extern "C" fn boot_core1() -> ! {
     l1_cache_init();
 
+    enable_fpu();
     let mpcore = mpcore::RegisterBlock::mpcore();
     mpcore.scu_invalidate.invalidate_core1();
 
-    let mmu_table = mmu::L1Table::get();
+    let mmu_table = mmu::L1Table::get()
+        .setup_flat_layout();
     mmu::with_mmu(mmu_table, || {
         ACTLR.enable_smp();
         ACTLR.enable_prefetch();
@@ -132,7 +134,7 @@ impl Core1 {
             CORE1_ENABLED.set(true);
         }
         // Flush cache-line
-        cache::dcc(unsafe { &CORE1_ENABLED });
+        cache::dcc(unsafe { &*addr_of!(CORE1_ENABLED) });
         if sdram {
             cache::dccmvac(0);
             asm::dsb();
@@ -153,7 +155,7 @@ impl Core1 {
     pub fn disable(&self) {
         unsafe {
             CORE1_ENABLED.set(false);
-            cache::dccmvac(&CORE1_ENABLED  as *const _ as usize);
+            cache::dccmvac(addr_of!(CORE1_ENABLED) as usize);
             asm::dsb();
         }
         self.restart();

libsupport_zynq/src/lib.rs

@@ -3,8 +3,6 @@
 #![feature(alloc_error_handler)]
 #![feature(panic_info_message)]
 #![feature(naked_functions)]
-#![feature(global_asm)]
-#![feature(asm)]
 
 pub extern crate alloc;
 pub extern crate compiler_builtins;

szl/Cargo.toml

@@ -3,7 +3,7 @@ name = "szl"
 description = "Simple Zynq Loader"
 version = "0.1.0"
 authors = ["M-Labs"]
-edition = "2018"
+edition = "2021"
 
 [features]
 target_zc706 = ["libboard_zynq/target_zc706", "libsupport_zynq/target_zc706", "libconfig/target_zc706"]

szl/src/main.rs

@@ -7,7 +7,7 @@ extern crate log;
 mod netboot;
 
 use alloc::rc::Rc;
-use core::mem;
+use core::{mem, ptr::{addr_of, addr_of_mut}};
 use core_io::{Read, Seek};
 use libboard_zynq::{
     self as zynq,
@@ -116,18 +116,18 @@ pub fn main_core0() {
 
     unsafe {
         let max_len =
-            &__runtime_end as *const usize as usize - &__runtime_start as *const usize as usize;
+            addr_of!(__runtime_end) as usize - addr_of!(__runtime_start) as usize;
         match slcr::RegisterBlock::unlocked(|slcr| slcr.boot_mode.read().boot_mode_pins()) {
             slcr::BootModePins::Jtag => netboot::netboot(
                 &mut bootgen_file,
                 config,
-                &mut __runtime_start as *mut usize as *mut u8,
+                addr_of_mut!(__runtime_start).cast(),
                 max_len,
             ),
             slcr::BootModePins::SdCard => {
                 if boot_sd(
                     &mut bootgen_file,
-                    &mut __runtime_start as *mut usize as *mut u8,
+                    addr_of_mut!(__runtime_start).cast(),
                     max_len,
                 )
                 .is_err()
@@ -137,7 +137,7 @@ pub fn main_core0() {
                     netboot::netboot(
                         &mut bootgen_file,
                         config,
-                        &mut __runtime_start as *mut usize as *mut u8,
+                        addr_of_mut!(__runtime_start).cast(),
                         max_len,
                     )
                 }
@@ -148,7 +148,7 @@ pub fn main_core0() {
                 netboot::netboot(
                     &mut bootgen_file,
                     config,
-                    &mut __runtime_start as *mut usize as *mut u8,
+                    addr_of_mut!(__runtime_start).cast(),
                     max_len,
                 )
             }