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No commits in common. "master" and "master" have entirely different histories.
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@ -18,5 +18,5 @@ embedded-hal = "0.2"
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libregister = { path = "../libregister" }
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libregister = { path = "../libregister" }
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libcortex_a9 = { path = "../libcortex_a9" }
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libcortex_a9 = { path = "../libcortex_a9" }
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libboard_zynq = { path = "../libboard_zynq" }
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libboard_zynq = { path = "../libboard_zynq" }
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libsupport_zynq = { path = "../libsupport_zynq", default-features = false, features = ["panic_handler", "dummy_fiq_handler"]}
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libsupport_zynq = { path = "../libsupport_zynq", default-features = false, features = ["panic_handler"]}
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libasync = { path = "../libasync" }
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libasync = { path = "../libasync" }
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@ -39,7 +39,7 @@ use libcortex_a9::{
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};
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};
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use libregister::{RegisterR, RegisterW};
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use libregister::{RegisterR, RegisterW};
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use libsupport_zynq::{
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use libsupport_zynq::{
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boot, exception_vectors, ram,
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boot, ram,
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};
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};
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use log::{info, warn};
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use log::{info, warn};
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use core::sync::atomic::{AtomicBool, Ordering};
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use core::sync::atomic::{AtomicBool, Ordering};
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@ -56,29 +56,19 @@ extern "C" {
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static CORE1_RESTART: AtomicBool = AtomicBool::new(false);
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static CORE1_RESTART: AtomicBool = AtomicBool::new(false);
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interrupt_handler!(IRQ, irq, __irq_stack0_start, __irq_stack1_start, {
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interrupt_handler!(IRQ, irq, __irq_stack0_start, __irq_stack1_start, {
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let mpcore = mpcore::RegisterBlock::mpcore();
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if MPIDR.read().cpu_id() == 1{
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let mut gic = gic::InterruptController::gic(mpcore);
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let mpcore = mpcore::RegisterBlock::mpcore();
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let id = gic.get_interrupt_id();
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let mut gic = gic::InterruptController::gic(mpcore);
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match MPIDR.read().cpu_id(){
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let id = gic.get_interrupt_id();
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0 => {
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if id.0 == 0 {
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if id.0 == 0 {
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gic.end_interrupt(id);
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println!("Interrupting core0...");
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asm::exit_irq();
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gic.end_interrupt(id);
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SP.write(&mut __stack1_start as *mut _ as u32);
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return;
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asm::enable_irq();
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}
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CORE1_RESTART.store(false, Ordering::Relaxed);
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},
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notify_spin_lock();
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1 => {
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main_core1();
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if id.0 == 0 {
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}
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gic.end_interrupt(id);
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asm::exit_irq();
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SP.write(&mut __stack1_start as *mut _ as u32);
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asm::enable_irq();
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CORE1_RESTART.store(false, Ordering::Relaxed);
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notify_spin_lock();
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main_core1();
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}
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},
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_ => {}
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}
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}
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stdio::drop_uart();
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stdio::drop_uart();
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println!("IRQ");
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println!("IRQ");
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@ -96,7 +86,6 @@ pub fn restart_core1() {
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#[no_mangle]
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#[no_mangle]
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pub fn main_core0() {
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pub fn main_core0() {
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exception_vectors::set_vector_table(0x0);
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// zynq::clocks::CpuClocks::enable_io(1_250_000_000);
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// zynq::clocks::CpuClocks::enable_io(1_250_000_000);
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enable_l2_cache(0x8);
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enable_l2_cache(0x8);
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println!("\nZynq experiments");
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println!("\nZynq experiments");
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@ -145,10 +134,6 @@ pub fn main_core0() {
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ddr.memtest();
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ddr.memtest();
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ram::init_alloc_ddr(&mut ddr);
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ram::init_alloc_ddr(&mut ddr);
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info!("Send software interrupt to core0");
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interrupt_controller.send_sgi(gic::InterruptId(0), gic::CPUCore::Core0.into());
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info!("Core0 returned from interrupt");
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boot::Core1::start(false);
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boot::Core1::start(false);
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let core1_req = unsafe { &mut CORE1_REQ.0 };
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let core1_req = unsafe { &mut CORE1_REQ.0 };
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14
flake.lock
14
flake.lock
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@ -3,11 +3,11 @@
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"mozilla-overlay": {
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"mozilla-overlay": {
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"flake": false,
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"flake": false,
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"locked": {
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"locked": {
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"lastModified": 1695805681,
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"lastModified": 1650459918,
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"narHash": "sha256-1ElPLD8eFfnuIk0G52HGGpRtQZ4QPCjChRlEOfkZ5ro=",
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"narHash": "sha256-sroCK+QJTmoXtcRkwZyKOP9iAYOPID2Bwdxn4GkG16w=",
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"owner": "mozilla",
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"owner": "mozilla",
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"repo": "nixpkgs-mozilla",
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"repo": "nixpkgs-mozilla",
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"rev": "6eabade97bc28d707a8b9d82ad13ef143836736e",
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"rev": "e1f7540fc0a8b989fb8cf701dc4fd7fc76bcf168",
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"type": "github"
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"type": "github"
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},
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},
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"original": {
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"original": {
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@ -18,16 +18,16 @@
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},
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},
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"nixpkgs": {
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"nixpkgs": {
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"locked": {
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"locked": {
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"lastModified": 1701389149,
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"lastModified": 1653920503,
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"narHash": "sha256-rU1suTIEd5DGCaAXKW6yHoCfR1mnYjOXQFOaH7M23js=",
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"narHash": "sha256-BBeCZwZImtjP3oYy4WogkQYy5OxNyfNciVSc1AfZgLQ=",
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"owner": "NixOS",
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"owner": "NixOS",
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"repo": "nixpkgs",
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"repo": "nixpkgs",
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"rev": "5de0b32be6e85dc1a9404c75131316e4ffbc634c",
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"rev": "a634c8f6c1fbf9b9730e01764999666f3436f10a",
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"type": "github"
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"type": "github"
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},
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},
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"original": {
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"original": {
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"owner": "NixOS",
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"owner": "NixOS",
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"ref": "nixos-23.11",
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"ref": "nixos-22.05",
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"repo": "nixpkgs",
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"repo": "nixpkgs",
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"type": "github"
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"type": "github"
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}
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}
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203
flake.nix
203
flake.nix
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@ -1,12 +1,12 @@
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{
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{
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description = "Bare-metal Rust on Zynq-7000";
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description = "Bare-metal Rust on Zynq-7000";
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inputs.nixpkgs.url = github:NixOS/nixpkgs/nixos-23.11;
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inputs.nixpkgs.url = github:NixOS/nixpkgs/nixos-22.05;
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inputs.mozilla-overlay = { url = github:mozilla/nixpkgs-mozilla; flake = false; };
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inputs.mozilla-overlay = { url = github:mozilla/nixpkgs-mozilla; flake = false; };
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outputs = { self, nixpkgs, mozilla-overlay }:
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outputs = { self, nixpkgs, mozilla-overlay }:
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let
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let
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pkgs = import nixpkgs { system = "x86_64-linux"; overlays = [ (import mozilla-overlay) crosspkgs-overlay ]; };
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pkgs = import nixpkgs { system = "x86_64-linux"; overlays = [ (import mozilla-overlay) ]; };
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rustManifest = pkgs.fetchurl {
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rustManifest = pkgs.fetchurl {
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url = "https://static.rust-lang.org/dist/2021-01-29/channel-rust-nightly.toml";
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url = "https://static.rust-lang.org/dist/2021-01-29/channel-rust-nightly.toml";
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@ -26,29 +26,148 @@
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cargo = rust;
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cargo = rust;
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});
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});
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crosspkgs-overlay = (self: super: {
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gnu-platform = "arm-none-eabi";
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pkgsCross = super.pkgsCross // {
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zynq-baremetal = import super.path {
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binutils-pkg = { zlib, extraConfigureFlags ? [] }: pkgs.stdenv.mkDerivation rec {
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system = "x86_64-linux";
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basename = "binutils";
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crossSystem = {
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version = "2.30";
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config = "arm-none-eabihf";
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name = "${basename}-${gnu-platform}-${version}";
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libc = "newlib";
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src = pkgs.fetchurl {
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gcc.cpu = "cortex-a9";
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url = "https://ftp.gnu.org/gnu/binutils/binutils-${version}.tar.bz2";
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gcc.fpu = "vfpv3";
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sha256 = "028cklfqaab24glva1ks2aqa1zxa6w6xmc8q34zs1sb7h22dxspg";
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||||||
};
|
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||||||
};
|
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||||||
};
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};
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||||||
});
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configureFlags = [
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"--enable-deterministic-archives"
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"--target=${gnu-platform}"
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"--with-cpu=cortex-a9"
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"--with-fpu=vfpv3"
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"--with-float=hard"
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"--with-mode=thumb"
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] ++ extraConfigureFlags;
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outputs = [ "out" "info" "man" ];
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depsBuildBuild = [ pkgs.buildPackages.stdenv.cc ];
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buildInputs = [ zlib ];
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enableParallelBuilding = true;
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meta = {
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||||||
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description = "Tools for manipulating binaries (linker, assembler, etc.)";
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longDescription = ''
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The GNU Binutils are a collection of binary tools. The main
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ones are `ld' (the GNU linker) and `as' (the GNU assembler).
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They also include the BFD (Binary File Descriptor) library,
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`gprof', `nm', `strip', etc.
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||||||
|
'';
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||||||
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homepage = http://www.gnu.org/software/binutils/;
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||||||
|
license = pkgs.lib.licenses.gpl3Plus;
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||||||
|
/* Give binutils a lower priority than gcc-wrapper to prevent a
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|
collision due to the ld/as wrappers/symlinks in the latter. */
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||||||
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priority = "10";
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||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
gcc-pkg = { gmp, mpfr, libmpc, platform-binutils, extraConfigureFlags ? [] }: pkgs.stdenv.mkDerivation rec {
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|
basename = "gcc";
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||||||
|
version = "9.1.0";
|
||||||
|
name = "${basename}-${gnu-platform}-${version}";
|
||||||
|
src = pkgs.fetchurl {
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||||||
|
url = "https://ftp.gnu.org/gnu/gcc/gcc-${version}/gcc-${version}.tar.xz";
|
||||||
|
sha256 = "1817nc2bqdc251k0lpc51cimna7v68xjrnvqzvc50q3ax4s6i9kr";
|
||||||
|
};
|
||||||
|
preConfigure = ''
|
||||||
|
mkdir build
|
||||||
|
cd build
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||||||
|
'';
|
||||||
|
configureScript = "../configure";
|
||||||
|
configureFlags = [
|
||||||
|
"--target=${gnu-platform}"
|
||||||
|
"--with-arch=armv7-a"
|
||||||
|
"--with-tune=cortex-a9"
|
||||||
|
"--with-fpu=vfpv3"
|
||||||
|
"--with-float=hard"
|
||||||
|
"--disable-libssp"
|
||||||
|
"--enable-languages=c"
|
||||||
|
"--with-as=${platform-binutils}/bin/${gnu-platform}-as"
|
||||||
|
"--with-ld=${platform-binutils}/bin/${gnu-platform}-ld" ] ++ extraConfigureFlags;
|
||||||
|
outputs = [ "out" "info" "man" ];
|
||||||
|
hardeningDisable = [ "format" "pie" ];
|
||||||
|
propagatedBuildInputs = [ gmp mpfr libmpc platform-binutils ];
|
||||||
|
enableParallelBuilding = true;
|
||||||
|
dontFixup = true;
|
||||||
|
};
|
||||||
|
|
||||||
|
newlib-pkg = { platform-binutils, platform-gcc }: pkgs.stdenv.mkDerivation rec {
|
||||||
|
pname = "newlib";
|
||||||
|
version = "3.1.0";
|
||||||
|
src = pkgs.fetchurl {
|
||||||
|
url = "ftp://sourceware.org/pub/newlib/newlib-${version}.tar.gz";
|
||||||
|
sha256 = "0ahh3n079zjp7d9wynggwrnrs27440aac04340chf1p9476a2kzv";
|
||||||
|
};
|
||||||
|
nativeBuildInputs = [ platform-binutils platform-gcc ];
|
||||||
|
configureFlags = [
|
||||||
|
"--target=${gnu-platform}"
|
||||||
|
|
||||||
|
"--with-cpu=cortex-a9"
|
||||||
|
"--with-fpu=vfpv3"
|
||||||
|
"--with-float=hard"
|
||||||
|
"--with-mode=thumb"
|
||||||
|
"--enable-interwork"
|
||||||
|
"--disable-multilib"
|
||||||
|
|
||||||
|
"--disable-newlib-supplied-syscalls"
|
||||||
|
"--with-gnu-ld"
|
||||||
|
"--with-gnu-as"
|
||||||
|
"--disable-newlib-io-float"
|
||||||
|
"--disable-werror"
|
||||||
|
];
|
||||||
|
dontFixup = true;
|
||||||
|
};
|
||||||
|
gnutoolchain = rec {
|
||||||
|
binutils-bootstrap = pkgs.callPackage binutils-pkg { };
|
||||||
|
gcc-bootstrap = pkgs.callPackage gcc-pkg {
|
||||||
|
platform-binutils = binutils-bootstrap;
|
||||||
|
extraConfigureFlags = [ "--disable-libgcc" ];
|
||||||
|
};
|
||||||
|
newlib = pkgs.callPackage newlib-pkg {
|
||||||
|
platform-binutils = binutils-bootstrap;
|
||||||
|
platform-gcc = gcc-bootstrap;
|
||||||
|
};
|
||||||
|
binutils = pkgs.callPackage binutils-pkg {
|
||||||
|
extraConfigureFlags = [ "--with-lib-path=${newlib}/arm-none-eabi/lib" ];
|
||||||
|
};
|
||||||
|
gcc = pkgs.callPackage gcc-pkg {
|
||||||
|
platform-binutils = binutils;
|
||||||
|
extraConfigureFlags = [ "--enable-newlib" "--with-headers=${newlib}/arm-none-eabi/include" ];
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
cargo-xbuild = rustPlatform.buildRustPackage rec {
|
||||||
|
pname = "cargo-xbuild";
|
||||||
|
version = "0.6.5";
|
||||||
|
|
||||||
|
src = pkgs.fetchFromGitHub {
|
||||||
|
owner = "rust-osdev";
|
||||||
|
repo = pname;
|
||||||
|
rev = "v${version}";
|
||||||
|
sha256 = "18djvygq9v8rmfchvi2hfj0i6fhn36m716vqndqnj56fiqviwxvf";
|
||||||
|
};
|
||||||
|
cargoSha256 = "13sj9j9kl6js75h9xq0yidxy63vixxm9q3f8jil6ymarml5wkhx8";
|
||||||
|
|
||||||
|
meta = with pkgs.lib; {
|
||||||
|
description = "Automatically cross-compiles the sysroot crates core, compiler_builtins, and alloc";
|
||||||
|
homepage = "https://github.com/rust-osdev/cargo-xbuild";
|
||||||
|
license = with licenses; [ mit asl20 ];
|
||||||
|
maintainers = with maintainers; [ johntitor xrelkd ];
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
mkbootimage = pkgs.stdenv.mkDerivation {
|
mkbootimage = pkgs.stdenv.mkDerivation {
|
||||||
pname = "mkbootimage";
|
pname = "mkbootimage";
|
||||||
version = "2.3dev";
|
version = "2.2";
|
||||||
|
|
||||||
src = pkgs.fetchFromGitHub {
|
src = pkgs.fetchFromGitHub {
|
||||||
owner = "antmicro";
|
owner = "antmicro";
|
||||||
repo = "zynq-mkbootimage";
|
repo = "zynq-mkbootimage";
|
||||||
rev = "872363ce32c249f8278cf107bc6d3bdeb38d849f";
|
rev = "4ee42d782a9ba65725ed165a4916853224a8edf7";
|
||||||
sha256 = "sha256-5FPyAhUWZDwHbqmp9J2ZXTmjaXPz+dzrJMolaNwADHs=";
|
sha256 = "1k1mbsngqadqihzjgvwvsrkvryxy5ladpxd9yh9iqn2s7fxqwqa9";
|
||||||
};
|
};
|
||||||
|
|
||||||
propagatedBuildInputs = [ pkgs.libelf pkgs.pcre ];
|
propagatedBuildInputs = [ pkgs.libelf pkgs.pcre ];
|
||||||
|
@ -61,7 +180,6 @@
|
||||||
mkdir -p $out/bin
|
mkdir -p $out/bin
|
||||||
cp mkbootimage $out/bin
|
cp mkbootimage $out/bin
|
||||||
'';
|
'';
|
||||||
hardeningDisable = [ "fortify" ];
|
|
||||||
};
|
};
|
||||||
|
|
||||||
fsbl = { board ? "zc706" }: pkgs.stdenv.mkDerivation {
|
fsbl = { board ? "zc706" }: pkgs.stdenv.mkDerivation {
|
||||||
|
@ -69,20 +187,19 @@
|
||||||
src = pkgs.fetchFromGitHub {
|
src = pkgs.fetchFromGitHub {
|
||||||
owner = "Xilinx";
|
owner = "Xilinx";
|
||||||
repo = "embeddedsw";
|
repo = "embeddedsw";
|
||||||
rev = "xilinx_v2022.2";
|
rev = "65c849ed46c88c67457e1fc742744f96db968ff1";
|
||||||
sha256 = "sha256-UDz9KK/Hw3qM1BAeKif30rE8Bi6C2uvuZlvyvtJCMfw=";
|
sha256 = "1rvl06ha40dzd6s9aa4sylmksh4xb9dqaxq462lffv1fdk342pda";
|
||||||
};
|
};
|
||||||
|
patches = [ ./fsbl.patch ];
|
||||||
nativeBuildInputs = [
|
nativeBuildInputs = [
|
||||||
pkgs.pkgsCross.zynq-baremetal.buildPackages.binutils
|
pkgs.gnumake
|
||||||
pkgs.pkgsCross.zynq-baremetal.buildPackages.gcc
|
gnutoolchain.binutils
|
||||||
|
gnutoolchain.gcc
|
||||||
];
|
];
|
||||||
patchPhase = ''
|
patchPhase = ''
|
||||||
|
patch -p1 -i ${./fsbl.patch}
|
||||||
patchShebangs lib/sw_apps/zynq_fsbl/misc/copy_bsp.sh
|
patchShebangs lib/sw_apps/zynq_fsbl/misc/copy_bsp.sh
|
||||||
|
echo 'SEARCH_DIR("${gnutoolchain.newlib}/arm-none-eabi/lib");' >> lib/sw_apps/zynq_fsbl/src/lscript.ld
|
||||||
for x in lib/sw_apps/zynq_fsbl/src/Makefile lib/sw_apps/zynq_fsbl/misc/copy_bsp.sh lib/bsp/standalone/src/arm/cortexa9/gcc/Makefile; do
|
|
||||||
substituteInPlace $x \
|
|
||||||
--replace "arm-none-eabi-" "arm-none-eabihf-"
|
|
||||||
done
|
|
||||||
'';
|
'';
|
||||||
buildPhase = ''
|
buildPhase = ''
|
||||||
cd lib/sw_apps/zynq_fsbl/src
|
cd lib/sw_apps/zynq_fsbl/src
|
||||||
|
@ -96,10 +213,6 @@
|
||||||
dontFixup = true;
|
dontFixup = true;
|
||||||
};
|
};
|
||||||
|
|
||||||
cargo-xbuild = pkgs.cargo-xbuild.overrideAttrs(oa: {
|
|
||||||
postPatch = "substituteInPlace src/sysroot.rs --replace 2021 2018";
|
|
||||||
});
|
|
||||||
|
|
||||||
build-crate = name: crate: features: rustPlatform.buildRustPackage rec {
|
build-crate = name: crate: features: rustPlatform.buildRustPackage rec {
|
||||||
name = "${crate}";
|
name = "${crate}";
|
||||||
|
|
||||||
|
@ -108,9 +221,9 @@
|
||||||
) ./.;
|
) ./.;
|
||||||
cargoLock = { lockFile = ./Cargo.lock; };
|
cargoLock = { lockFile = ./Cargo.lock; };
|
||||||
|
|
||||||
nativeBuildInputs = [ cargo-xbuild pkgs.llvmPackages_14.clang-unwrapped ];
|
nativeBuildInputs = [ cargo-xbuild pkgs.llvmPackages_9.clang-unwrapped ];
|
||||||
buildPhase = ''
|
buildPhase = ''
|
||||||
export XARGO_RUST_SRC="${rust}/lib/rustlib/src/rust/library"
|
export XARGO_RUST_SRC="${rustPlatform.rust.rustc}/lib/rustlib/src/rust/library"
|
||||||
export CARGO_HOME=$(mktemp -d cargo-home.XXX)
|
export CARGO_HOME=$(mktemp -d cargo-home.XXX)
|
||||||
pushd ${crate}
|
pushd ${crate}
|
||||||
cargo xbuild --release --frozen \
|
cargo xbuild --release --frozen \
|
||||||
|
@ -127,7 +240,6 @@
|
||||||
|
|
||||||
doCheck = false;
|
doCheck = false;
|
||||||
dontFixup = true;
|
dontFixup = true;
|
||||||
auditable = false;
|
|
||||||
};
|
};
|
||||||
|
|
||||||
targetCrates = target: {
|
targetCrates = target: {
|
||||||
|
@ -153,20 +265,21 @@
|
||||||
|
|
||||||
hydraJobs = packages.x86_64-linux;
|
hydraJobs = packages.x86_64-linux;
|
||||||
|
|
||||||
inherit rust rustPlatform;
|
inherit rustPlatform;
|
||||||
|
|
||||||
devShell.x86_64-linux = pkgs.mkShell {
|
devShell.x86_64-linux = pkgs.mkShell {
|
||||||
name = "zynq-rs-dev-shell";
|
name = "zynq-rs-dev-shell";
|
||||||
buildInputs = [
|
buildInputs = with pkgs; [
|
||||||
rust
|
rustPlatform.rust.rustc
|
||||||
|
rustPlatform.rust.cargo
|
||||||
|
cacert
|
||||||
cargo-xbuild
|
cargo-xbuild
|
||||||
mkbootimage
|
|
||||||
|
|
||||||
pkgs.openocd pkgs.gdb
|
openocd gdb
|
||||||
pkgs.openssh pkgs.rsync
|
openssh rsync
|
||||||
pkgs.llvmPackages_14.clang-unwrapped
|
llvmPackages_9.clang-unwrapped
|
||||||
(pkgs.python3.withPackages(ps: [ ps.pyftdi ]))
|
(python3.withPackages(ps: [ ps.pyftdi ]))
|
||||||
];
|
mkbootimage ];
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
}
|
}
|
|
@ -0,0 +1,31 @@
|
||||||
|
diff --git a/lib/sw_apps/zynq_fsbl/src/Makefile b/lib/sw_apps/zynq_fsbl/src/Makefile
|
||||||
|
index 0e3ccdf1c5..a5b02f386e 100644
|
||||||
|
--- a/lib/sw_apps/zynq_fsbl/src/Makefile
|
||||||
|
+++ b/lib/sw_apps/zynq_fsbl/src/Makefile
|
||||||
|
@@ -71,11 +71,14 @@ endif
|
||||||
|
all: $(EXEC)
|
||||||
|
|
||||||
|
$(EXEC): $(LIBS) $(OBJS) $(INCLUDES)
|
||||||
|
- cp $(BSP_DIR)/$(BOARD)/ps7_init.* .
|
||||||
|
$(LINKER) $(LD1FLAGS) -o $@ $(OBJS) $(LDFLAGS)
|
||||||
|
rm -rf $(OBJS)
|
||||||
|
-
|
||||||
|
-
|
||||||
|
+
|
||||||
|
+.PHONY: ps7_init
|
||||||
|
+
|
||||||
|
+ps7_init:
|
||||||
|
+ cp $(BSP_DIR)/$(BOARD)/ps7_init.* .
|
||||||
|
+
|
||||||
|
$(LIBS):
|
||||||
|
echo "Copying BSP files"
|
||||||
|
$(BSP_DIR)/copy_bsp.sh $(BOARD) $(CC)
|
||||||
|
@@ -86,7 +89,7 @@ $(LIBS):
|
||||||
|
make -C $(BSP_DIR) -k all "CC=armcc" "AR=armar" "C_FLAGS= -O2 -c" "EC_FLAGS=--debug --wchar32"; \
|
||||||
|
fi;
|
||||||
|
|
||||||
|
-%.o:%.c
|
||||||
|
+%.o:%.c ps7_init
|
||||||
|
$(CC) $(CC_FLAGS) $(CFLAGS) $(ECFLAGS) -c $< -o $@ $(INCLUDEPATH)
|
||||||
|
|
||||||
|
%.o:%.S
|
|
@ -18,6 +18,8 @@ impl ErrorLED {
|
||||||
.pullup(true)
|
.pullup(true)
|
||||||
.disable_rcvr(true)
|
.disable_rcvr(true)
|
||||||
);
|
);
|
||||||
|
// reset
|
||||||
|
slcr.gpio_rst_ctrl.reset_gpio();
|
||||||
});
|
});
|
||||||
|
|
||||||
Self::error_led_common(0xFFFF - 0x0080)
|
Self::error_led_common(0xFFFF - 0x0080)
|
||||||
|
|
|
@ -13,9 +13,6 @@ mod regs;
|
||||||
pub mod rx;
|
pub mod rx;
|
||||||
pub mod tx;
|
pub mod tx;
|
||||||
|
|
||||||
use super::time::Milliseconds;
|
|
||||||
use embedded_hal::timer::CountDown;
|
|
||||||
|
|
||||||
/// Size of all the buffers
|
/// Size of all the buffers
|
||||||
pub const MTU: usize = 1536;
|
pub const MTU: usize = 1536;
|
||||||
/// Maximum MDC clock
|
/// Maximum MDC clock
|
||||||
|
@ -303,18 +300,11 @@ impl<GEM: Gem> Eth<GEM, (), ()> {
|
||||||
fn gem_common(macaddr: [u8; 6]) -> Self {
|
fn gem_common(macaddr: [u8; 6]) -> Self {
|
||||||
GEM::setup_clock(TX_1000);
|
GEM::setup_clock(TX_1000);
|
||||||
|
|
||||||
#[cfg(feature="target_kasli_soc")]
|
|
||||||
{
|
|
||||||
let mut eth_reset_pin = PhyRst::rst_pin();
|
|
||||||
eth_reset_pin.reset();
|
|
||||||
}
|
|
||||||
|
|
||||||
let mut inner = EthInner {
|
let mut inner = EthInner {
|
||||||
gem: PhantomData,
|
gem: PhantomData,
|
||||||
link: None,
|
link: None,
|
||||||
};
|
};
|
||||||
inner.init();
|
inner.init();
|
||||||
|
|
||||||
inner.configure(macaddr);
|
inner.configure(macaddr);
|
||||||
|
|
||||||
let phy = Phy::find(&mut inner).expect("phy");
|
let phy = Phy::find(&mut inner).expect("phy");
|
||||||
|
@ -492,69 +482,6 @@ impl<'a, GEM: Gem> smoltcp::phy::Device<'a> for &mut Eth<GEM, rx::DescList, tx::
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
pub struct PhyRst {
|
|
||||||
regs: regs::GpioRegisterBlock,
|
|
||||||
count_down: super::timer::global::CountDown<Milliseconds>,
|
|
||||||
}
|
|
||||||
|
|
||||||
impl PhyRst {
|
|
||||||
pub fn rst_pin() -> Self {
|
|
||||||
slcr::RegisterBlock::unlocked(|slcr| {
|
|
||||||
// Hardware Reset for PHY
|
|
||||||
slcr.mio_pin_47.write(
|
|
||||||
slcr::MioPin47::zeroed()
|
|
||||||
.l3_sel(0b000)
|
|
||||||
.io_type(slcr::IoBufferType::Lvcmos18)
|
|
||||||
.pullup(true)
|
|
||||||
.disable_rcvr(true)
|
|
||||||
);
|
|
||||||
});
|
|
||||||
Self::eth_reset_common(0xFFFF - 0x8000)
|
|
||||||
}
|
|
||||||
|
|
||||||
fn delay_ms(&mut self, ms: u64) {
|
|
||||||
self.count_down.start(Milliseconds(ms));
|
|
||||||
nb::block!(self.count_down.wait()).unwrap();
|
|
||||||
}
|
|
||||||
|
|
||||||
fn eth_reset_common(gpio_output_mask: u16) -> Self {
|
|
||||||
let self_ = Self {
|
|
||||||
regs: regs::GpioRegisterBlock::regs(),
|
|
||||||
count_down: unsafe { super::timer::GlobalTimer::get() }.countdown(),
|
|
||||||
};
|
|
||||||
|
|
||||||
// Setup GPIO output mask
|
|
||||||
self_.regs.gpio_output_mask.modify(|_, w| {
|
|
||||||
w.mask(gpio_output_mask)
|
|
||||||
});
|
|
||||||
|
|
||||||
self_.regs.gpio_direction.modify(|_, w| {
|
|
||||||
w.phy_rst(true)
|
|
||||||
});
|
|
||||||
|
|
||||||
self_
|
|
||||||
}
|
|
||||||
|
|
||||||
fn oe(&mut self, oe: bool) {
|
|
||||||
self.regs.gpio_output_enable.modify(|_, w| {
|
|
||||||
w.phy_rst(oe)
|
|
||||||
})
|
|
||||||
}
|
|
||||||
|
|
||||||
fn toggle(&mut self, o: bool) {
|
|
||||||
self.regs.gpio_output_mask.modify(|_, w| {
|
|
||||||
w.phy_rst(o)
|
|
||||||
})
|
|
||||||
}
|
|
||||||
|
|
||||||
pub fn reset(&mut self) {
|
|
||||||
self.toggle(false); // drive phy_rst (active LOW) pin low
|
|
||||||
self.oe(true); // enable pin's output
|
|
||||||
self.delay_ms(10);
|
|
||||||
self.toggle(true);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
struct EthInner<GEM: Gem> {
|
struct EthInner<GEM: Gem> {
|
||||||
gem: PhantomData<GEM>,
|
gem: PhantomData<GEM>,
|
||||||
|
|
|
@ -110,49 +110,6 @@ pub struct RegisterBlock {
|
||||||
pub design_cfg5: RO<u32>,
|
pub design_cfg5: RO<u32>,
|
||||||
}
|
}
|
||||||
|
|
||||||
pub struct GpioRegisterBlock {
|
|
||||||
pub gpio_output_mask: &'static mut OutputMask,
|
|
||||||
pub gpio_direction: &'static mut Direction,
|
|
||||||
pub gpio_output_enable: &'static mut OutputEnable,
|
|
||||||
}
|
|
||||||
|
|
||||||
impl GpioRegisterBlock {
|
|
||||||
pub fn regs() -> Self {
|
|
||||||
Self {
|
|
||||||
gpio_output_mask: OutputMask::new(),
|
|
||||||
gpio_direction: Direction::new(),
|
|
||||||
gpio_output_enable: OutputEnable::new(),
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
register!(gpio_output_mask,
|
|
||||||
/// MASK_DATA_1_SW:
|
|
||||||
/// Maskable output data for MIO[47:32]
|
|
||||||
OutputMask, RW, u32);
|
|
||||||
register_at!(OutputMask, 0xE000A008, new);
|
|
||||||
register_bit!(gpio_output_mask,
|
|
||||||
/// Output for PHY_RST (MIO[47])
|
|
||||||
phy_rst, 15);
|
|
||||||
register_bits!(gpio_output_mask,
|
|
||||||
mask, u16, 16, 31);
|
|
||||||
register!(gpio_direction,
|
|
||||||
/// DIRM_1:
|
|
||||||
/// Direction mode for MIO[53:32]; 0/1 = in/out
|
|
||||||
Direction, RW, u32);
|
|
||||||
register_at!(Direction, 0xE000A244, new);
|
|
||||||
register_bit!(gpio_direction,
|
|
||||||
/// Direction for PHY_RST
|
|
||||||
phy_rst, 15);
|
|
||||||
register!(gpio_output_enable,
|
|
||||||
/// OEN_1:
|
|
||||||
/// Output enable for MIO[53:32]
|
|
||||||
OutputEnable, RW, u32);
|
|
||||||
register_at!(OutputEnable, 0xE000A248, new);
|
|
||||||
register_bit!(gpio_output_enable,
|
|
||||||
/// Output enable for PHY_RST
|
|
||||||
phy_rst, 15);
|
|
||||||
|
|
||||||
register_at!(RegisterBlock, 0xE000B000, gem0);
|
register_at!(RegisterBlock, 0xE000B000, gem0);
|
||||||
register_at!(RegisterBlock, 0xE000C000, gem1);
|
register_at!(RegisterBlock, 0xE000C000, gem1);
|
||||||
|
|
||||||
|
|
|
@ -115,7 +115,7 @@ impl InterruptController {
|
||||||
let m = (id.0 >> 2) as usize;
|
let m = (id.0 >> 2) as usize;
|
||||||
let n = (8 * (id.0 & 3)) as usize;
|
let n = (8 * (id.0 & 3)) as usize;
|
||||||
unsafe {
|
unsafe {
|
||||||
self.mpcore.icdiptr[m].modify(|mut icdiptr| *icdiptr.set_bits(n..=n+1, target_cpu as u32));
|
self.mpcore.icdiptr[m].modify(|mut icdiptr| *icdiptr.set_bits(n..=n+1, target_cpu as u32 + 1));
|
||||||
}
|
}
|
||||||
|
|
||||||
// sensitivity
|
// sensitivity
|
||||||
|
|
|
@ -53,6 +53,8 @@ impl I2c {
|
||||||
.pullup(false)
|
.pullup(false)
|
||||||
.disable_rcvr(true)
|
.disable_rcvr(true)
|
||||||
);
|
);
|
||||||
|
// Reset
|
||||||
|
slcr.gpio_rst_ctrl.reset_gpio();
|
||||||
});
|
});
|
||||||
|
|
||||||
Self::i2c_common(0xFFFF - 0x000C, 0xFFFF - 0x0002)
|
Self::i2c_common(0xFFFF - 0x000C, 0xFFFF - 0x0002)
|
||||||
|
|
|
@ -34,12 +34,6 @@ pub fn isb() {
|
||||||
unsafe { llvm_asm!("isb" :::: "volatile") }
|
unsafe { llvm_asm!("isb" :::: "volatile") }
|
||||||
}
|
}
|
||||||
|
|
||||||
/// Enable FIQ
|
|
||||||
#[inline]
|
|
||||||
pub unsafe fn enable_fiq() {
|
|
||||||
llvm_asm!("cpsie f":::: "volatile");
|
|
||||||
}
|
|
||||||
|
|
||||||
/// Enable IRQ
|
/// Enable IRQ
|
||||||
#[inline]
|
#[inline]
|
||||||
pub unsafe fn enable_irq() {
|
pub unsafe fn enable_irq() {
|
||||||
|
|
|
@ -36,9 +36,7 @@ pub fn notify_spin_lock() {
|
||||||
}
|
}
|
||||||
|
|
||||||
#[macro_export]
|
#[macro_export]
|
||||||
/// Interrupt handler, which setup the stack and preserve registers before jumping to actual interrupt handler.
|
/// Interrupt handler, which setup the stack and jump to actual interrupt handler.
|
||||||
/// Registers r0-r12, PC, SP and CPSR are restored after the actual handler.
|
|
||||||
///
|
|
||||||
/// - `name` is the name of the interrupt, should be the same as the one defined in vector table.
|
/// - `name` is the name of the interrupt, should be the same as the one defined in vector table.
|
||||||
/// - `name2` is the name for the actual handler, should be different from name.
|
/// - `name2` is the name for the actual handler, should be different from name.
|
||||||
/// - `stack0` is the stack for the interrupt handler when called from core0.
|
/// - `stack0` is the stack for the interrupt handler when called from core0.
|
||||||
|
@ -46,7 +44,8 @@ pub fn notify_spin_lock() {
|
||||||
/// - `body` is the body of the actual interrupt handler, should be a normal unsafe rust function
|
/// - `body` is the body of the actual interrupt handler, should be a normal unsafe rust function
|
||||||
/// body.
|
/// body.
|
||||||
///
|
///
|
||||||
/// Note that the interrupt handler would use the same stack as normal programs by default.
|
/// Note that the interrupt handler would use the same stack as normal programs by default, so
|
||||||
|
/// interrupt handlers should not return to normal program or it may corrupt the stack.
|
||||||
macro_rules! interrupt_handler {
|
macro_rules! interrupt_handler {
|
||||||
($name:ident, $name2:ident, $stack0:ident, $stack1:ident, $body:block) => {
|
($name:ident, $name2:ident, $stack0:ident, $stack1:ident, $body:block) => {
|
||||||
#[link_section = ".text.boot"]
|
#[link_section = ".text.boot"]
|
||||||
|
@ -55,27 +54,19 @@ macro_rules! interrupt_handler {
|
||||||
pub unsafe extern "C" fn $name() -> ! {
|
pub unsafe extern "C" fn $name() -> ! {
|
||||||
asm!(
|
asm!(
|
||||||
// setup SP, depending on CPU 0 or 1
|
// setup SP, depending on CPU 0 or 1
|
||||||
// and preserve registers
|
|
||||||
"sub lr, lr, #4",
|
|
||||||
"stmfd sp!, {{r0-r12, lr}}",
|
|
||||||
"mrc p15, #0, r0, c0, c0, #5",
|
"mrc p15, #0, r0, c0, c0, #5",
|
||||||
concat!("movw r1, :lower16:", stringify!($stack0)),
|
concat!("movw r1, :lower16:", stringify!($stack0)),
|
||||||
concat!("movt r1, :upper16:", stringify!($stack0)),
|
concat!("movt r1, :upper16:", stringify!($stack0)),
|
||||||
"tst r0, #3",
|
"tst r0, #3",
|
||||||
concat!("movwne r1, :lower16:", stringify!($stack1)),
|
concat!("movwne r1, :lower16:", stringify!($stack1)),
|
||||||
concat!("movtne r1, :upper16:", stringify!($stack1)),
|
concat!("movtne r1, :upper16:", stringify!($stack1)),
|
||||||
"mov r0, sp",
|
|
||||||
"mov sp, r1",
|
"mov sp, r1",
|
||||||
"push {{r0, r1}}", // 2 registers are pushed to maintain 8 byte stack alignment
|
|
||||||
concat!("bl ", stringify!($name2)),
|
concat!("bl ", stringify!($name2)),
|
||||||
"pop {{r0, r1}}",
|
|
||||||
"mov sp, r0",
|
|
||||||
"ldmfd sp!, {{r0-r12, pc}}^", // caret ^ : copy SPSR to the CPSR
|
|
||||||
options(noreturn)
|
options(noreturn)
|
||||||
);
|
);
|
||||||
}
|
}
|
||||||
|
|
||||||
#[no_mangle]
|
#[no_mangle]
|
||||||
pub unsafe extern "C" fn $name2() $body
|
pub unsafe extern "C" fn $name2() -> ! $body
|
||||||
};
|
};
|
||||||
}
|
}
|
||||||
|
|
|
@ -12,10 +12,9 @@ target_redpitaya = ["libboard_zynq/target_redpitaya"]
|
||||||
target_kasli_soc = ["libboard_zynq/target_kasli_soc"]
|
target_kasli_soc = ["libboard_zynq/target_kasli_soc"]
|
||||||
panic_handler = []
|
panic_handler = []
|
||||||
dummy_irq_handler = []
|
dummy_irq_handler = []
|
||||||
dummy_fiq_handler = []
|
|
||||||
alloc_core = []
|
alloc_core = []
|
||||||
|
|
||||||
default = ["panic_handler", "dummy_irq_handler", "dummy_fiq_handler"]
|
default = ["panic_handler", "dummy_irq_handler"]
|
||||||
|
|
||||||
[dependencies]
|
[dependencies]
|
||||||
r0 = "1"
|
r0 = "1"
|
||||||
|
|
|
@ -1,10 +1,6 @@
|
||||||
use libregister::{RegisterR, RegisterW};
|
use libregister::RegisterR;
|
||||||
use libcortex_a9::{regs::{DFSR, MPIDR, VBAR}, interrupt_handler};
|
use libcortex_a9::{regs::{DFSR, MPIDR}, interrupt_handler};
|
||||||
use libboard_zynq::{println, stdio};
|
use libboard_zynq::{println, stdio};
|
||||||
|
|
||||||
pub fn set_vector_table(base_addr: u32){
|
|
||||||
VBAR.write(base_addr);
|
|
||||||
}
|
|
||||||
|
|
||||||
interrupt_handler!(UndefinedInstruction, undefined_instruction, __irq_stack0_start, __irq_stack1_start, {
|
interrupt_handler!(UndefinedInstruction, undefined_instruction, __irq_stack0_start, __irq_stack1_start, {
|
||||||
stdio::drop_uart();
|
stdio::drop_uart();
|
||||||
|
@ -46,7 +42,6 @@ interrupt_handler!(IRQ, irq, __irq_stack0_start, __irq_stack1_start, {
|
||||||
loop {}
|
loop {}
|
||||||
});
|
});
|
||||||
|
|
||||||
#[cfg(feature = "dummy_fiq_handler")]
|
|
||||||
interrupt_handler!(FIQ, fiq, __irq_stack0_start, __irq_stack1_start, {
|
interrupt_handler!(FIQ, fiq, __irq_stack0_start, __irq_stack1_start, {
|
||||||
stdio::drop_uart();
|
stdio::drop_uart();
|
||||||
println!("FIQ");
|
println!("FIQ");
|
|
@ -54,7 +54,6 @@ unsafe extern "C" fn boot_core0() -> ! {
|
||||||
asm::dmb();
|
asm::dmb();
|
||||||
asm::dsb();
|
asm::dsb();
|
||||||
|
|
||||||
asm::enable_fiq();
|
|
||||||
asm::enable_irq();
|
asm::enable_irq();
|
||||||
main_core0();
|
main_core0();
|
||||||
panic!("return from main");
|
panic!("return from main");
|
||||||
|
@ -76,7 +75,6 @@ unsafe extern "C" fn boot_core1() -> ! {
|
||||||
asm::dmb();
|
asm::dmb();
|
||||||
asm::dsb();
|
asm::dsb();
|
||||||
|
|
||||||
asm::enable_fiq();
|
|
||||||
asm::enable_irq();
|
asm::enable_irq();
|
||||||
main_core1();
|
main_core1();
|
||||||
panic!("return from main_core1");
|
panic!("return from main_core1");
|
||||||
|
|
|
@ -9,7 +9,7 @@ pub extern crate alloc;
|
||||||
pub extern crate compiler_builtins;
|
pub extern crate compiler_builtins;
|
||||||
|
|
||||||
pub mod boot;
|
pub mod boot;
|
||||||
pub mod exception_vectors;
|
mod abort;
|
||||||
#[cfg(feature = "panic_handler")]
|
#[cfg(feature = "panic_handler")]
|
||||||
mod panic;
|
mod panic;
|
||||||
pub mod ram;
|
pub mod ram;
|
||||||
|
|
Loading…
Reference in New Issue