From df8fc1aed15ba232a092aa9e4c7844518ee200b4 Mon Sep 17 00:00:00 2001 From: simy46 Date: Fri, 24 Jan 2025 11:56:05 -0500 Subject: [PATCH] new target on pynqz2 and ps clk set to 50MHz --- libboard_zynq/src/clocks/source.rs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/libboard_zynq/src/clocks/source.rs b/libboard_zynq/src/clocks/source.rs index 6c547d1..296a2ef 100644 --- a/libboard_zynq/src/clocks/source.rs +++ b/libboard_zynq/src/clocks/source.rs @@ -12,6 +12,8 @@ pub const PS_CLK: u32 = 33_333_333; pub const PS_CLK: u32 = 33_333_333; #[cfg(feature = "target_kasli_soc")] pub const PS_CLK: u32 = 33_333_333; +#[cfg(feature = "target_pynqz2")] +pub const PS_CLK: u32 = 50_000_000; /// (pll_fdiv_max, (pll_cp, pll_res, lock_cnt)) const PLL_FDIV_LOCK_PARAM: &[(u16, (u8, u8, u16))] = &[