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zynq-rs
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sdio: better logging

This commit is contained in:
Sebastien Bourdeauducq 2020-06-13 16:31:25 +08:00
parent d3b488bfb3
commit 82ec1ba7a7
2 changed files with 6 additions and 6 deletions
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6
libboard_zynq/src/sdio/mod.rs
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@ -8,7 +8,7 @@ use super::slcr;
use super::time::Milliseconds; use super::time::Milliseconds;
use embedded_hal::timer::CountDown; use embedded_hal::timer::CountDown;
use libregister::{RegisterR, RegisterRW, RegisterW}; use libregister::{RegisterR, RegisterRW, RegisterW};
use log::debug; use log::{trace, debug};
use nb; use nb;
/// Basic SDIO Struct with common low-level functions. /// Basic SDIO Struct with common low-level functions.
@ -123,7 +123,7 @@ impl SDIO {
/// From XSdPs_Change_ClkFreq in xsdps_options.c. SPEC_V3 related code is removed as /// From XSdPs_Change_ClkFreq in xsdps_options.c. SPEC_V3 related code is removed as
/// our board would only be V1 or V2. /// our board would only be V1 or V2.
fn change_clk_freq(&mut self, freq: u32) { fn change_clk_freq(&mut self, freq: u32) {
debug!("Change clock frequency to {}", freq); debug!("Changing clock frequency to {}", freq);
self.regs self.regs
.clock_control .clock_control
.modify(|_, w| w.sd_clk_en(false).internal_clk_en(false)); .modify(|_, w| w.sd_clk_en(false).internal_clk_en(false));
@ -244,7 +244,7 @@ impl SDIO {
block_cnt: u16, block_cnt: u16,
transfer_mode: regs::transfer_mode_command::Write, transfer_mode: regs::transfer_mode_command::Write,
) -> Result<(), CmdTransferError> { ) -> Result<(), CmdTransferError> {
debug!("Send Cmd {:?}", cmd); trace!("Send Cmd {:?}", cmd);
let state = self.regs.present_state.read(); let state = self.regs.present_state.read();
if state.command_inhibit_cmd() { if state.command_inhibit_cmd() {
return Err(CmdTransferError::CmdInhibited); return Err(CmdTransferError::CmdInhibited);

6
libboard_zynq/src/sdio/sd_card.rs
View File

@ -1,7 +1,7 @@
use super::{adma::Adma2DescTable, cmd, CardType, CmdTransferError, SDIO}; use super::{adma::Adma2DescTable, cmd, CardType, CmdTransferError, SDIO};
use libcortex_a9::cache; use libcortex_a9::cache;
use libregister::{RegisterR, RegisterRW, RegisterW}; use libregister::{RegisterR, RegisterRW, RegisterW};
use log::debug; use log::{trace, debug};
#[derive(Debug)] #[derive(Debug)]
pub enum CardInitializationError { pub enum CardInitializationError {
@ -146,7 +146,7 @@ impl SdCard {
let mut scr: [u8; 32] = [0; 32]; let mut scr: [u8; 32] = [0; 32];
self.get_bus_width(&mut scr)?; self.get_bus_width(&mut scr)?;
debug!("{:?}", scr); trace!("SCR={:?}", scr);
if scr[1] & 0x4 != 0 { if scr[1] & 0x4 != 0 {
// 4bit support // 4bit support
debug!("4 bit support"); debug!("4 bit support");
@ -337,7 +337,7 @@ impl SdCard {
fn change_bus_width(&mut self) -> Result<(), CmdTransferError> { fn change_bus_width(&mut self) -> Result<(), CmdTransferError> {
use cmd::SdCmd::*; use cmd::SdCmd::*;
debug!("Changing bus speed"); debug!("Changing bus width");
self.sdio.cmd_transfer(CMD55, self.rel_card_addr, 0)?; self.sdio.cmd_transfer(CMD55, self.rel_card_addr, 0)?;
self.width_4_bit = true; self.width_4_bit = true;
self.sdio.cmd_transfer(ACMD6, 0x2, 0)?; self.sdio.cmd_transfer(ACMD6, 0x2, 0)?;