diff --git a/experiments/src/main.rs b/experiments/src/main.rs index 0f62d2f..14b0379 100644 --- a/experiments/src/main.rs +++ b/experiments/src/main.rs @@ -204,7 +204,7 @@ pub fn main_core0() { let mut err_cdwn = timer.countdown(); let mut err_state = true; let mut led = zynq::error_led::ErrorLED::error_led(); - task::spawn( async move { + task::spawn( async move { loop { led.toggle(err_state); err_state = !err_state; diff --git a/libboard_zynq/src/ddr/mod.rs b/libboard_zynq/src/ddr/mod.rs index b6ef3e7..3ae588e 100644 --- a/libboard_zynq/src/ddr/mod.rs +++ b/libboard_zynq/src/ddr/mod.rs @@ -249,9 +249,9 @@ impl DdrRam { #[cfg(feature = "target_ebaz4205")] self.regs.dram_param0.write( regs::DramParam0::zeroed() - .t_rc(0x1a) - .t_rfc_min(0x56) - .post_selfref_gap_x32(0x10) + .t_rc(0x1a) // 48.75 ns / 1.875 ns = 26 clock cycles + .t_rfc_min(0x56) // 160 ns / 1.875 ns = 85.333 --> 86 clock cycles + .post_selfref_gap_x32(0x10) // Default value ); #[cfg(feature = "target_redpitaya")] self.regs.dram_param0.write( @@ -270,8 +270,8 @@ impl DdrRam { #[cfg(feature = "target_ebaz4205")] self.regs.dram_param1.modify( |_, w| w - .t_faw(0x16) - .t_ras_min(0x13) + .t_faw(0x16) // 40 ns / 1.875 ns = 21.33 --> 22 clock cycles + .t_ras_min(0x13) // 35 ns / 1.875 ns = 18.66 --> 19 clock cycles ); #[cfg(feature = "target_redpitaya")] self.regs.dram_param1.modify( @@ -478,12 +478,11 @@ impl DdrRam { let megabytes = 1023; #[cfg(any( feature = "target_coraz7", + feature = "target_ebaz4205", feature = "target_redpitaya", feature = "target_kasli_soc", ))] let megabytes = 512; - #[cfg(feature = "target_ebaz4205")] - let megabytes = 256; megabytes * 1024 * 1024 } diff --git a/libboard_zynq/src/eth/phy/mod.rs b/libboard_zynq/src/eth/phy/mod.rs index 9e85392..5161609 100644 --- a/libboard_zynq/src/eth/phy/mod.rs +++ b/libboard_zynq/src/eth/phy/mod.rs @@ -83,7 +83,7 @@ pub struct Phy { const OUI_MARVELL: u32 = 0x005043; const OUI_REALTEK: u32 = 0x000732; const OUI_LANTIQ : u32 = 0x355969; -const OUI_ICPLUS : u32 = 0x0090c3; +const OUI_ICPLUS : u32 = 0x02430c; //only change pages on Kasli-SoC's Marvel 88E11xx #[cfg(feature="target_kasli_soc")] @@ -123,6 +123,7 @@ impl Phy { // IP101G-DS-R01 model: 5, rev: 4, + .. }) => true, _ => false, } @@ -148,7 +149,7 @@ impl Phy { { #[cfg(feature="target_kasli_soc")] pa.write_phy(self.addr, PAGE_REGISTER, PR::page().into()); - + let reg = pa.read_phy(self.addr, PR::addr()).into(); let reg = f(reg); pa.write_phy(self.addr, PR::addr(), reg.into()) @@ -167,7 +168,7 @@ impl Phy { PA: PhyAccess, F: FnMut(Leds) -> Leds, { - self.modify_reg(pa, f) + self.modify_reg(pa, f) } pub fn get_control(&self, pa: &mut PA) -> Control { diff --git a/libconfig/src/net_settings.rs b/libconfig/src/net_settings.rs index d3ffc31..6917b96 100644 --- a/libconfig/src/net_settings.rs +++ b/libconfig/src/net_settings.rs @@ -55,6 +55,10 @@ pub fn get_addresses(cfg: &Config) -> NetAddresses { let mut hardware_addr = EthernetAddress([0x02, 0x00, 0x00, 0x00, 0x00, 0x55]); #[cfg(feature = "target_redpitaya")] let mut ipv4_addr = IpAddress::v4(192, 168, 1, 55); + #[cfg(feature = "target_ebaz4205")] + let mut hardware_addr = EthernetAddress([0x02, 0x00, 0x00, 0x00, 0x00, 0x56]); + #[cfg(feature = "target_ebaz4205")] + let mut ipv4_addr = IpAddress::v4(192, 168, 1, 56); #[cfg(feature = "target_kasli_soc")] let mut hardware_addr = get_address_from_eeprom(); #[cfg(feature = "target_kasli_soc")] diff --git a/openocd/ebaz4205.cfg b/openocd/ebaz4205.cfg index db541f5..c1c0f08 100644 --- a/openocd/ebaz4205.cfg +++ b/openocd/ebaz4205.cfg @@ -4,7 +4,7 @@ adapter driver ftdi ftdi vid_pid 0x0403 0x6010 ftdi channel 0 # Every pin set as high impedance except TCK, TDI, TDO and TMS -ftdi layout_init 0x0088 0x008b +ftdi layout_init 0x0008 0x000b # nSRST defined on pin CN2-13 of the MiniModule (pin ADBUS5 [AD5] on the FT2232H chip) # This choice is arbitrary. Use other GPIO pin if desired.