From 97db1ea08ba2cce5b72572d4d8f949f0de4cf551 Mon Sep 17 00:00:00 2001
From: morgan <mc@m-labs.hk>
Date: Wed, 13 Dec 2023 12:43:54 +0800
Subject: [PATCH] docs: update limitation section

---
 README.md | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/README.md b/README.md
index b0d139b..b0481fe 100644
--- a/README.md
+++ b/README.md
@@ -48,4 +48,5 @@ source .venv/bin/activate
 </details><br>
 
 ## Limitation
-As the simulation is not cycle nor delay accurate, there will be more glitches than the hardware implementation
+1. The simulation is missing the switching delay of "receiving ADPLL -> DCXO output starting to change"
+2. The white noise is used to simulate jitter which may result in higher phase noise