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title = "nMigen"
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##### nMigen is a reboot of Migen, a Python toolbox for building complex digital hardware.
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nMigen is a reboot of [Migen](@/gateware/migen.md), our metaprogramming-based hardware description language. See the [Migen page](@/gateware/migen.md) for the basic ideas.
Although Migen works very well in production (it is used, for instance, in the [ARTIQ](@/experiment-control/artiq/) experiment control system, and the Amarisoft base stations), its design could be improved in many fundamental ways. nMigen reimplements Migen concepts from scratch to do so. nMigen also provides an extensive compatibility layer that makes it possible to build and simulate most Migen designs unmodified, as well as integrate modules written for Migen and nMigen.
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##### Environment
nMigen itself provides the core language, and is complemented by a number of external components. The nmigen-boards package contains definition files for various FPGA boards, providing information such as pin locations and clocks. The nmigen-stdio package provides libraries to interface to common I/O protocols such as I2C and SPI. The nmigen-soc package is a library that provides bus interconnect and configuration and status register (CSR) management. Finally, the HeavyX system uses all the previous components and integrates them into a complete system-on-chip solution, able to run Rust code on the Minerva RISC-V CPU core entirely written in nMigen.
##### Documentation
Documentation for nMigen and its external components is rather limited at the moment. However, you can follow the tutorial by LambdaConcept, and another tutorial by Robert Baruch, as well as his video series on building a 6800 CPU on an FPGA with nMigen: part 1 part 2 part 3 part 4.
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##### Code repositories
- nmigen
- nmigen-boards
- nmigen-stdio
- nmigen-soc
- heavyx
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