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43 Commits

Author SHA1 Message Date
Egor Savkin 937a767e0a Update options
* Separate Urukul 4412
* Add options for LVDS TTL
* Remove usb flash option
* Add cable lengths for fiber and copper options
* Add IP option for Stabilizer and Pounder

Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-21 14:34:50 +08:00
Egor Savkin a4ff9f7057 Rebase and fix warning in development mode
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 281f0a26f0 Add termination choices to stabilizer
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 159d4b631a Add phaser baseband/upconverter variants
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin e3a50f1b9a Add options to zotino, thermostat, sampler and pounder
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 72c1b1747c Add edge counter for the options to TTL
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 291332eaf4 Add HD68 cable options and fix first small cards options
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 2480b9ad54 Leave opt-out option only to the first kasli
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin cd780b83e4 Change ttl groups to banks and remove green leaf
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin bd15b8d19d Slightly promote new functionality and consider mono_eem modes on sampler/urukul for suservo
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin acdaeda699 Fix cards state being not updated on touchables
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 1a0b613044 Fix not-disappearing warnings and clocker clock slots
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 58bc01cf06 Small duplication removal
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 5559a04403 Remove redundant notifications about connectors and AD9910
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin ce31357802 Integrate clock/slots configuration into the calculator
Also adjust sizes

Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 79e4253e0f Fixed initial display of empty options in the options summary
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 840b0223a7 Still fixing the bug
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin dfbf9cbfe7 Fix scroll issue and found another bug
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin c55687e05a Add groups of options and some fixes for long lists of options
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin f67aa7fc51 Add external data for use per every card. Apply it for TTL and Suservo
Signed-off-by: esavkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin b245655c41 Fix tooltip showed out when options overlay was closed
Signed-off-by: esavkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin a3075a5691 Use tips on more cards
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 8db77cf8c7 Add tooltips with hints for the user
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 788653abaa Add icons to options titles
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 0df69499b8 Remove MAC from options
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 8bdfedc4b8 Reposition summary popup relative to icon respective to window width, hide on scroll
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 0fe665c0ba Hide popups on clicking outside of them
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 894c1d2e14 Update bundle file
Add custom options to more cards

Minor design adjustments: add margin-left to icon and optimize the icon

Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 23c7508358 Add popover for cart summary with options data
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 288a0cc74c Make overlay appear on button click
And fix options absense for non-carrier cards

Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 0be655f83a Make the design more compact
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin d72a295aa5 Adjust styles
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 4d5dd505ae Fix add of useless options to JSON
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin ac87fede4b Add switchline compact design
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin ff8a6d54bc Add switch and line
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin f93cf142f0 Fix JSON shop load
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin 1a7d44c121 Make it update state
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin d543e54326 Add basic demo example
Kinda works, but buggy

Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 15:40:44 +08:00
Egor Savkin f8c19cf9b9 Update funding design
Wrap each funder into the horizontal card with logo and description, increase margins for platinum/gold/... headers

Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 14:32:50 +08:00
Egor Savkin cb99047571 Articles from Nature magazine
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 14:28:39 +08:00
Egor Savkin 83a04be40e Sort publications - put individual works to the bottom, add expandable view
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 14:28:39 +08:00
Egor Savkin e576704db3 Add publications by "artiq" keyword
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-20 14:28:39 +08:00
Egor Savkin a93f210c92 Update icons for BNC cards - Sampler, IDC and TTL
Make connectors same across cards and adjust labels to fit them

Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-11-17 12:05:17 +08:00
18 changed files with 579 additions and 1316 deletions

View File

@ -6,6 +6,8 @@ template = "page.html"
[extra]
+++
{% layout_funding(position="center") %}
The free and open dissemination of methods and results is central to scientific progress.
The ARTIQ and Sinara authors, contributors, and supporters consider the free and open exchange of scientific tools to be equally important and have chosen the licensing terms of ARTIQ and Sinara accordingly. ARTIQ, including its gateware, the firmware, and the ARTIQ tools and libraries are licensed as LGPLv3+. The Sinara hardware designs are licensed under CERN OHL.
@ -13,68 +15,105 @@ This ensures that a user of ARTIQ or Sinara hardware designs obtains broad right
ARTIQ and the related components that we are developing ([Migen/MiSoC](/gateware/migen), [nMigen](/gateware/nmigen), [smoltcp](/software/smoltcp), [minimq](https://github.com/quartiq/minimq), [zynq-rs](https://git.m-labs.hk/m-labs/zynq-rs), [SiPyCo](https://github.com/m-labs/sipyco), [RayOpt](https://github.com/quartiq/rayopt), [WFVM](https://git.m-labs.hk/m-labs/wfvm), ...) need to be kept on a sound financial basis. We have been relying on a combination of [hardware sales](../place-order), sponsorships, and grants.
##### Sponsors
{% end %}
{% layout_funding(position="center", title="Sponsors") %}
We acknowledge support from our partners below. Please get in touch (sales@m-\*\*\*.hk) if you also want to move ARTIQ forward!
###### Platinum level
{% end %}
[![log nist](/images/logo_nist.png)](https://www.nist.gov/pml/time-and-frequency-division/ion-storage)
#### Platinum level
{% layout_funding(logo="/images/logo_nist.png", logo_link="https://www.nist.gov/pml/time-and-frequency-division/ion-storage", logo_alt="logo nist", title="NIST", position="left", icon="/images/icons/diamond.svg") %}
ARTIQ was initiated by the [Ion Storage Group](https://www.nist.gov/pml/time-and-frequency-division/ion-storage) at NIST, who provided valuable technical insight as well as financial support to develop the first version of the ARTIQ software and gateware targeting the KC705 development kit. This included some FPGA SoC libraries such as a SDRAM controller and PHYs, the first two iterations of the ARTIQ runtime including the development of [smoltcp](/software/smoltcp), the RTIO infrastructure and PHYs, the ARTIQ-Python LLVM-based compiler, RTIO DMA, the ARTIQ dashboard and browser, the ARTIQ master, and several controllers. They also supported the more recent ARTIQ port to Zynq, targeting the ZC706 development kit, and enabling ARTIQ-Python kernels to take advantage of the 1GHz CPU in the core device; as well as matrix and trigonometric function support in ARTIQ-Python kernels.
<small>*Disclaimer: NIST and the United States government are not providing an endorsement of ARTIQ.*</small>
[![logo oxford](/images/logo_oxford.png)](https://www2.physics.ox.ac.uk/research/ion-trap-quantum-computing-group)
{% end %}
{% layout_funding(logo="/images/logo_oxford.png", logo_link="https://www2.physics.ox.ac.uk/research/ion-trap-quantum-computing-group", logo_alt="logo oxford", title="Oxford", icon="/images/icons/diamond.svg", position="right") %}
The [University of Oxford](https://www2.physics.ox.ac.uk/research/ion-trap-quantum-computing-group) funded major improvements to the RTIO infrastructure: the Distributed RTIO (DRTIO) system that allows clock synchronization and RTIO command transfer between FPGAs using cost-effective high-speed serial links (e.g. over fiber optics), and changes to the RTIO architecture to improve scalability. They also funded the Sinara Sampler hardware and software, the [SU-Servo](https://m-labs.hk/artiq/manual-beta/core_drivers_reference.html?highlight=suservo#artiq.coredevice.suservo.SUServo) integrated laser intensity servo, parts of Urukul and Zotino, firmware development on the Sinara Thermostat, the Kasli v2.0 ARTIQ support, the Fastino ARTIQ support, parts of the Sinara Phaser gateware and software development, and significant parts of the Booster RF amplifier.
[![logo wut](/images/logo_wut.png)](http://www.ise.pw.edu.pl)
{% end %}
{% layout_funding(logo="/images/logo_wut.png", logo_link="http://www.ise.pw.edu.pl", logo_alt="logo wut", title="Warsaw University of Technology", icon="/images/icons/diamond.svg", position="left") %}
[Warsaw University of Technology](http://www.ise.pw.edu.pl) contributed most of the hardware designs and prototypes for the Sinara ecosystem.
###### Gold level
{% end %}
[![logo oregon](/images/logo_oregon.png)](https://ions.uoregon.edu/)
#### Gold level
{% layout_funding(logo="/images/logo_oregon.png", logo_link="https://ions.uoregon.edu/", logo_alt="logo oregon", title="University of Oregon", icon="/images/icons/gold-badge.svg", position="right") %}
The [University of Oregon](https://ions.uoregon.edu/) funded a large part of the Sinara Phaser gateware and software development, as well as firmware for the Pounder PDH/phase lock signal generator for Stabilizer.
[![logo duke](/images/duke_brown.svg)](https://brownlab.pratt.duke.edu/)
{% end %}
{% layout_funding(logo="/images/duke_brown.svg", logo_link="https://brownlab.pratt.duke.edu/", logo_alt="logo duke brown", title="Brown Lab at Duke University", icon="/images/icons/gold-badge.svg", position="left") %}
The [Brown Lab at Duke University](https://brownlab.pratt.duke.edu/) funded the migration of ARTIQ softcore platforms to the RISC-V architecture, memory protection support, and floating point unit support.
[![logo arl](/images/logo_arl_devcom.png)](http://brittonlab.umd.edu/)
{% end %}
{% layout_funding(logo="/images/logo_arl_devcom.png", logo_link="http://brittonlab.umd.edu/", logo_alt="logo arl", title="Army Research Lab", icon="/images/icons/gold-badge.svg", position="right") %}
The [Army Research Lab](http://brittonlab.umd.edu/) funded the SAWG high-throughput digital waveform generator, as well as ARTIQ support for the Sayma and Metlino boards.
{% end %}
###### Silver level
#### Silver level
[![logo quest](/images/logo_luh.png)](https://www.quest-lfs.uni-hannover.de/)
{% layout_funding(logo="/images/logo_luh.png", logo_link="https://www.quest-lfs.uni-hannover.de/", logo_alt="logo hannover", title="QUEST/Uni Hannover", icon="/images/icons/silver-badge.svg", position="left") %}
[QUEST/Uni Hannover](https://www.quest-lfs.uni-hannover.de/) funded gateware and software support for the Grabber EEM, partial Mirny support, part of the Fastino development, and part of Urukul synchronization support.
[![logo ptb](/images/logo_ptb.png)](http://ptb.de)
{% end %}
{% layout_funding(logo="/images/logo_ptb.png", logo_link="http://ptb.de", logo_alt="logo ptb", title="PTB", icon="/images/icons/silver-badge.svg", position="right") %}
PTB funded the development of lock-in amplifier support for the Sinara Stabilizer, as well as part of Urukul synchronization support.
[![logo uwisc](/images/logo_uwisc.png)](http://hexagon.physics.wisc.edu/)
{% end %}
{% layout_funding(logo="/images/logo_uwisc.png", logo_link="http://hexagon.physics.wisc.edu/", logo_alt="logo uwisc", title="University of Wisconsin-Madison", icon="/images/icons/silver-badge.svg", position="left") %}
The [University of Wisconsin-Madison](http://hexagon.physics.wisc.edu/) funded the development of Urukul RAM mode support.
{% end %}
{% layout_funding(title="MIT", icon="/images/icons/silver-badge.svg", position="right") %}
[MIT](http://web.mit.edu/~cua/www/quanta/) funded parts of the Sinara Phaser gateware and software development.
[![logo hu](/images/logo_hu.png)](https://www.physik.hu-berlin.de/en/qom/people/qom-group/markus/view)
{% end %}
{% layout_funding(logo="/images/logo_hu.png", logo_link="https://www.physik.hu-berlin.de/en/qom/people/qom-group/markus/view", logo_alt="logo hu", title="Humboldt University of Berlin", icon="/images/icons/silver-badge.svg", position="left") %}
[Humboldt University of Berlin](https://www.physik.hu-berlin.de/en/qom/people/qom-group/markus/view) funded [prototype digital spectroscopy modulation/demodulation firmware](https://github.com/quartiq/queenmod), which is part of the "Optical quantum technologies on nanosatellites" (QUEEN) project.
##### Grants
{% end %}
{% layout_funding(position="center", title="Grants") %}
Parts of ARTIQ and Sinara have been developed through the participation of our sister company QUARTIQ GmbH in European research grant programmes.
[![logo opticlock](/images/logo_opticlock.png)](https://www.opticlock.de/)
{% end %}
{% layout_funding(logo="/images/logo_opticlock.png", logo_link="https://www.opticlock.de/", logo_alt="logo opticlock", title="Opticlock", icon="/images/icons/grant.svg", position="left") %}
The BMBF project [Opticlock](https://www.opticlock.de/) developed an optical clock as a replacement for a hydrogen maser, based on a single ytterbium ion captured and laser-cooled in an ion trap. It helped fund the development of the Kasli, Urukul, Zotino and Sampler modules.
![logo aiartiq](/images/logo_aiartiq.png)
{% end %}
{% layout_funding(logo="/images/logo_aiartiq.png", logo_link="https://www.opticlock.de/", logo_alt="logo aiartiq", title="AI-ARTIQ", icon="/images/icons/grant.svg", position="right") %}
AI-ARTIQ develops a control platform for laser sources and atom interferometer-based quantum sensors.
{% end %}

View File

@ -6,6 +6,14 @@
- name: "arXiv"
path: "https://arxiv.org/pdf/1709.06952.pdf"
- title: "Experimental quantum key distribution certified by Bell's theorem"
authors: "D.P. Nadlinger, P. Drmota, B.C. Nichol, G. Araneda, D. Main, R. Srinivas, D.M. Lucas, C.J. Ballance, K. Ivanov, E. Y-Z. Tan, P. Sekatski, R.L. Urbanke, R. Renner, N. Sangouard, J-D. Bancal"
links:
- name: "Nature 607, 682686 (2022)"
path: "https://www.nature.com/articles/s41586-022-04941-5"
- name: "arXiv"
path: "https://arxiv.org/abs/2109.14600"
- title: "Programming languages and compiler design for realistic quantum hardware"
authors: "Frederic T. Chong, Diana Franklin & Margaret Martonosi"
links:
@ -53,6 +61,8 @@
links:
- name: "arXiv"
path: "https://arxiv.org/abs/2009.11482"
- name: "Nature 598, 281286 (2021)"
path: "https://www.nature.com/articles/s41586-021-03928-y"
- title: "Probing Qubit Memory Errors at the Part-per-Million Level"
authors: "M.A. Sepiol, A.C. Hughes, J.E. Tarlton, D.P. Nadlinger, T.G. Ballance, C.J. Ballance, T.P. Harty, A.M. Steane, J.F. Goodwin & D.M. Lucas"
@ -68,6 +78,14 @@
- name: "Science, Vol 364, Issue 6446, 21 June 2019"
path: "https://science.sciencemag.org/content/364/6446/1163"
- title: "Quantum amplification of boson-mediated interactions"
authors: "S.C. Burd, R. Srinivas, H.M. Knaack, W. Ge, A.C. Wilson, D.J. Wineland, D. Leibfried, J.J. Bollinger, D.T.C. Allcock, D.H. Slichter"
links:
- name: "Nat. Phys. 17, 898902 (2021)"
path: "https://www.nature.com/articles/s41567-021-01237-9"
- name: "arXiv"
path: "https://arxiv.org/abs/2009.14342"
- title: "State Readout of a Trapped Ion Qubit Using a Trap-Integrated Superconducting Photon Detector"
authors: "S.L. Todaro, V.B. Verma, K.C. McCormick, D.T.C. Allcock, R.P. Mirin, D.J. Wineland, S.W. Nam, A.C. Wilson, D. Leibfried & D.H. Slichter"
links:
@ -136,28 +154,6 @@
- name: "DAMOP20 poster"
path: "https://meetings.aps.org/Meeting/DAMOP20/Session/K01.113"
- title: "Short Time Fourier Transform Pulse Generator for Trapped Ion Quantum Gates"
authors: "Norman Krackow"
links:
- name: "local copy"
path: "/thesis_nkrackow.pdf"
- title: "Precise PID controller for quantum applications"
authors: "Jakub Matyas"
links:
- name: "Warsaw University of Technology, Engineer's thesis"
path: "https://repo.pw.edu.pl/info/bachelor/WUTe90de3461b53456c9d63c55d80d34220/"
- name: "local copy"
path: "/JMatyas_inz_v6.pdf"
- title: "Controller module for real-time quantum applications"
authors: "Paweł Kulik"
links:
- name: "Warsaw University of Technology, Masters's diploma thesis"
path: "https://repo.pw.edu.pl/info/master/WUT6212c3c3cdcd40ea9095f4ead6482596/"
- name: "local copy"
path: "/pawel_kulik_kasli_thesis_2019_compressed.pdf"
- title: "Driver module for quantum computer experiments: Kasli"
authors: "Paweł Kulik, Grzegorz Kasprowicz and Michał Gąska"
links:
@ -190,6 +186,182 @@
- name: "APS Division of Atomic and Molecular Physics Meeting 2019, abstract id.E01.164"
path: null
- title: "Progress towards ultracold Sr for the AION project — sub-microkelvin atoms and an optical-heterodyne diagnostic tool for injection-locked laser diodes"
authors: "E. Pasatembou, C.F.A. Baynham, O. Buchmüller, D. Evans, R. Hobson, L. Iannizzotto-Venezze, A. Josset"
links:
- name: "arXiv"
path: "https://arxiv.org/abs/2310.08500"
- title: "Experimental demonstration of enhanced violations of Leggett-Garg inequalities in a PT-symmetric trapped-ion qubit"
authors: "Pengfei Lu, Xinxin Rao, Teng Liu, Yang Liu, Ji Bian, Feng Zhu, Le Luo"
links:
- name: "arXiv"
path: "https://arxiv.org/abs/2309.06713"
- title: "Fast adiabatic transport of single laser-cooled <sup>9</sup>Be+ ions in a cryogenic Penning trap stack"
authors: "T. Meiners, J.-A. Coenders, J. Mielke, M. Niemann, J.M. Cornejo, S. Ulmer, C. Ospelkaus"
links:
- name: "arXiv"
path: "https://arxiv.org/abs/2309.06776"
- title: "Schlussbericht zum Verbundvorhaben Quanten-Inertialsensorsystem (QGyro)"
authors:
short: "S. Schön, S. Abend, E. v. Hinüber, N.B. Weddig,"
full: "B. Tennstedt, P. Barbey, M. Gersemann, T. Kersten, Yueyang Zou, Ashwin Rajagopalan, Mouine Abidi, Alexander Löwer, Ernst M. Rasel"
links:
- name: "Leibniz Universität Hannover"
path: "https://www.repo.uni-hannover.de/handle/123456789/14823"
- title: "One-Time Compilation of Device-Level Instructions for Quantum Subroutines"
authors: "Aniket S. Dalvi, Jacob Whitlow, Marissa D'Onofrio, Leon Riesebos, Tianyi Chen, Samuel Phiri, Kenneth R. Brown, Jonathan M. Baker"
links:
- name: "arXiv"
path: "https://arxiv.org/abs/2308.10787"
- title: "QUANT-NET: A testbed for quantum networking research over deployed fiber"
authors: "Inder Monga, Erhan Saglamyurek, Ezra Kissel, Hartmut Häffner, Wenji Wu"
links:
- name: "Association for Computing Machinery"
path: "https://dl.acm.org/doi/abs/10.1145/3610251.3610561"
- name: "eScholarship University of California"
path: "https://escholarship.org/uc/item/7hk9g5d3"
- title: "An environmental monitoring network for quantum gas experiments and devices"
authors: "T.J. Barrett, W. Evans, A. Gadge, S. Bhumbra, S. Sleegers, R. Shah, J. Fekete, F. Oručević and P. Krüger"
links:
- name: "IOPscience"
path: "https://iopscience.iop.org/article/10.1088/2058-9565/ac3385"
- title: "Adiabatically controlled motional states of a ground-state cooled CaO<sup>+</sup> and Ca<sup>+</sup> trapped ion chain"
authors: "Lu Qi, Evan C. Reed, Kenneth R. Brown"
links:
- name: "arXiv"
path: "https://arxiv.org/abs/2212.05105"
- title: "Dynamical low-noise microwave source for cold-atom experiments"
authors: "Bernd Meyer-Hoppe, Maximilian Baron, Christophe Cassens, Fabian Anders, Alexander Idel, Jan Peise, and Carsten Klempt"
links:
- name: "AIP Publishing"
path: "https://pubs.aip.org/aip/rsi/article/94/7/074705/2902630"
- title: "Fast, high-fidelity addressed single-qubit gates using efficient composite pulse sequences"
authors: "A.D. Leu, M.F. Gely, M.A. Weber, M.C. Smith, D.P. Nadlinger, D.M. Lucas"
links:
- name: "arXiv"
path: "https://arxiv.org/abs/2305.06725"
- title: "QisDAX: An Open Source Bridge from Qiskit to Trapped Ion Quantum Devices."
authors: "Kaustubh Jagdish Badrike"
links:
- name: "NCSU"
path: "https://repository.lib.ncsu.edu/bitstream/handle/1840.20/40949/etd.pdf"
- title: "Verifiable blind quantum computing with trapped ions and single photons"
authors: "P. Drmota, D.P. Nadlinger, D. Main, B.C. Nichol, E.M. Ainley, D. Leichtle, A. Mantri, E. Kashefi, R. Srinivas, G. Araneda, C.J. Ballance, D.M. Lucas"
links:
- name: "arXiv"
path: "https://arxiv.org/abs/2305.02936"
- title: "Low noise quantum frequency conversion of photons from a trapped barium ion to the telecom O-band"
authors: "Uday Saha, James D. Siverns, John Hannegan, Qudsia Quraishi, Edo Waks"
links:
- name: "arXiv"
path: "https://arxiv.org/abs/2305.01205"
- title: "Open-source electronics ecosystem for optical atomic clocks"
authors: "Piotr Morzyński, Sławomir Bilicki, Marcin Bober, Adam Ledziński, Marcin Witkowski, Mehrdad Zarei and Michał Zawada"
links:
- name: "IOPscience"
path: "https://iopscience.iop.org/article/10.1088/1361-6501/acc5a1"
- title: "Transient fluorescence with a single trapped ion"
authors: "Nicolás Nuñez Barreto, Lucas Giardino, Carla Crucianelli, Muriel Bonetto, Martin Drechsler, Christian Tomás Schmiegelow"
links:
- name: "arXiv"
path: "https://arxiv.org/abs/2303.00650"
- title: "Sampler: Open-Source Data Acquisition Module for Quantum Physics"
authors: "Kasprowicz Grzegorz, Harty Thomas, Bourdeauducq Sébastien, Jördens Robert, Allcock David, Slichter Daniel, Nadlinger David, Britton Joseph W. ,Sotirova Ana"
links:
- name: "BazTech"
path: "https://yadda.icm.edu.pl/baztech/element/bwmeta1.element.baztech-e97e8039-a7dd-4283-b1af-45b6a61993d1"
- title: "Practical Implementation of an Analogue and Digital Electronics System for a Modular Cosmic Ray Detector — MCORD"
authors:
short: "Marcin Bielewicz, Aleksandr Bancer, Andrzej Dziedzic, Jaroslaw Grzyb,"
full: "Elzbieta Jaworska, Grzegorz Kasprowicz, Michal Kiecana, Piotr Kolasinski, Michal Kuc, Michal Kuklewski, Marcin Pietrzak, Krzysztof Pozniak, Maciej Sitek, Mikolaj Sowinski, Łukasz ´Swiderski, Agnieszka Syntfeld-Kazuch, Jaroslaw Szewinski and Wojciech Marek Zabołotny"
links:
- name: "MDPI"
path: "https://www.mdpi.com/2079-9292/12/6/1492"
- title: "Cold highly charged ions in a radio-frequency trap with superconducting magnetic shielding"
authors:
short: "Elwin A. Dijck, Christian Warnecke, Malte Wehrheim, Ruben B. Henninger, Julia Eff,"
full: "Kostas Georgiou, Andrea Graf, Stepan Kokh, Lakshmi P. Kozhiparambil Sajith, Christopher Mayo, Vera M. Schäfer, Claudia Volk, Piet O. Schmidt, Thomas Pfeifer, José R. Crespo López-Urrutia"
links:
- name: "arXiv"
path: "https://arxiv.org/abs/2306.01670"
- title: "Positronium laser cooling via the 1<sup>3</sup>S-2<sup>3</sup>P transition with a broadband laser pulse"
authors:
short: "AEgIS Collaboration:"
full: "L.T. Glöggler, N. Gusakova, B. Rienäcker, A. Camper, R. Caravita, S. Huck, M. Volponi, T. Wolz, L. Penasa, V. Krumins, F. Gustafsson, M. Auzins, B. Bergmann, P. Burian, R.S. Brusa, F. Castelli, R. Ciuryło, D. Comparat, G. Consolati, M. Doser, Ł. Graczykowski, M. Grosbart, F. Guatieri, S. Haider, M.A. Janik, G. Kasprowicz, G. Khatri, Ł.Kłosowski, G. Kornakov, L. Lappo, A. Linek, J. Malamant, S. Mariazzi, V. Petracek, M. Piwiński, S. Pospisil, L. Povolo, F. Prelz, S.A. Rangwala, T. Rauschendorfer, B.S. Rawat, V. Rodin, O.M. Røhne, H. Sandaker, P. Smolyanskiy, T. Sowiński, D. Tefelski, T. Vafeiadis, C.P. Welsch, M. Zawada, J. Zielinski, N. Zurlo"
links:
- name: "arXiv"
path: "https://arxiv.org/abs/2310.08760"
- name: "CERN"
path: "https://cds.cern.ch/record/2878376"
- title: "Open Hardware in Quantum Technology"
authors:
short: "Nathan Shammah, Anurag Saha Roy, Carmen G. Almudever, Sébastien Bourdeauducq, Anastasiia Butko,"
full: "Gustavo Cancelo, Susan M. Clark, Johannes Heinsoo, Loïc Henriet, Gang Huang, Christophe Jurczak, Janne Kotilahti, Alessandro Landra, Ryan LaRose, Andrea Mari, Kasra Nowrouzi, Caspar Ockeloen-Korppi, Guen Prawiroatmodjo, Irfan Siddiqi, William J. Zeng"
links:
- name: "arXiv"
path: "https://arxiv.org/abs/2309.17233"
- title: "Weighing antimatter: AEg over bar IS Phase 2, upgrades and first data"
authors: "M. Volponi, G. Consolati, AEgIS Collaboration"
links:
- name: "Politecnico di Milano"
path: "https://re.public.polimi.it/handle/11311/1249382"
- title: "The Electronic Control System of a Trapped-Ion Quantum Processor: A Systematic Literature Review"
authors: "Stefanie Castillo"
links:
- name: "IEEE"
path: "https://ieeexplore.ieee.org/abstract/document/10164086"
- title: "Engineering a Control System for a Logical Qubit-Scalee Trapped Ion Quantum Computer"
authors: "Andrew Russ Risinger"
links:
- name: "Duke"
path: "https://iontrap.duke.edu/files/2023/07/thesis-arr-2023-04-16.pdf"
- title: "An optical clock based on a highly charged ion"
authors: "Lukas Josef Spieß"
links:
- name: "Leibniz Universität Hannover"
path: "https://www.repo.uni-hannover.de/handle/123456789/13801"
- title: "Advances in performance and automation of a single ytterbium ion optical clock"
authors: "Alexandra Tofful"
links:
- name: "Imperial College London"
path: "https://spiral.imperial.ac.uk/handle/10044/1/103468"
- title: "A many-channel FPGA control system"
authors: "Daniel T. Schussheim, Kurt Gibble"
links:
- name: "arXiv"
path: "https://arxiv.org/abs/2307.16008"
- title: "Radium ions and radioactive molecules for probing new physics"
authors: "Mingyu Fan"
links:
- name: "eScholarship University of California"
path: "https://escholarship.org/uc/item/5j42z6c8"
- title: "Programowalny sterownik siłownika piezoelektrycznego"
authors: "Adam Kołodyński"
links:
@ -212,4 +384,27 @@
- name: "Warsaw University of Technology, Master's thesis"
path: null
- name: "local copy"
path: "/TomaszPrzywozki_v3.pdf"
path: "/TomaszPrzywozki_v3.pdf"
- title: "Short Time Fourier Transform Pulse Generator for Trapped Ion Quantum Gates"
authors: "Norman Krackow"
links:
- name: "local copy"
path: "/thesis_nkrackow.pdf"
- title: "Precise PID controller for quantum applications"
authors: "Jakub Matyas"
links:
- name: "Warsaw University of Technology, Engineer's thesis"
path: "https://repo.pw.edu.pl/info/bachelor/WUTe90de3461b53456c9d63c55d80d34220/"
- name: "local copy"
path: "/JMatyas_inz_v6.pdf"
- title: "Controller module for real-time quantum applications"
authors: "Paweł Kulik"
links:
- name: "Warsaw University of Technology, Masters's diploma thesis"
path: "https://repo.pw.edu.pl/info/master/WUT6212c3c3cdcd40ea9095f4ead6482596/"
- name: "local copy"
path: "/pawel_kulik_kasli_thesis_2019_compressed.pdf"

View File

@ -242,4 +242,7 @@ a[aria-expanded='true']:after {
margin-right: 12px;
display: block;
float: left;
}
}
.hide-expanded[aria-expanded="true"], .show-expanded[aria-expanded="false"], .show-expanded {display: none;}
.hide-expanded[aria-expanded="false"], .show-expanded[aria-expanded="true"] {display: inline;}

View File

@ -83,10 +83,18 @@
.card h5,
.card h4,
h5 {
color: $brand-color;
}
h4 {
color: $color-primary;
margin-top: 3rem;
margin-bottom: 3rem;
text-align: center;
}
h3, h2, h1 {
color: $color-secondary;
}
@ -236,4 +244,22 @@ img.kf25 {
#root-shop, #root-shop>div {
height: 100%;
}
}
}
// follow respective border-[start, end, top, bottom] from bootstrap
@media (max-width: 767px) {
.funding-logo-start {
border-bottom:var(--bs-border-width) var(--bs-border-style) var(--bs-border-color)!important;
}
.funding-logo-end {
border-top:var(--bs-border-width) var(--bs-border-style) var(--bs-border-color)!important;
}
}
@media (min-width: 768px) {
.funding-logo-start {
border-right:var(--bs-border-width) var(--bs-border-style) var(--bs-border-color)!important;
}
.funding-logo-end {
border-left:var(--bs-border-width) var(--bs-border-style) var(--bs-border-color)!important;
}
}

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inkscape:showpageshadow="2"
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inkscape:pagecheckerboard="0"
inkscape:deskcolor="#d1d1d1"
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inkscape:zoom="6.2578125"
inkscape:cx="64.0799"
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inkscape:window-width="1920"
inkscape:window-height="1011"
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@ -2406,7 +2406,7 @@ class Shop extends React.PureComponent {
isMobile={isMobile}
title="Order hardware"
description="
Drag and drop the cards you want into the crate below to see how the combination would look like. Setup card's configuration by tapping at the top of the card. If you have any issues with this ordering system, or if you need other configurations, email us directly anytime at sales@m-****.hk. The price is estimated and must be confirmed by a quote."
Drag and drop the cards you want into the crate below to see how the combination would look like. Setup card's configuration by tapping at the top of the card, most of the options can be modified after shipment. If you have any issues with this ordering system, or if you need other configurations, email us directly anytime at sales@m-****.hk. The price is estimated and must be confirmed by a quote."
crateMode={
<CrateMode
items={crateModeItems}

View File

@ -443,9 +443,8 @@ export function OptionsSummaryPopup({id, options, data}) {
export function FillExtData(data, index) {
return {
has_previous_carrier: data.filter((value, item_index) => index > item_index && value.name === "Carrier").length > 0,
has_other_dio: data.filter((value, item_index) => index !== item_index && value.name &&value.name.endsWith("-TTL")).length > 0,
has_dds: data.filter(((value, _) => value.name === "DDS" && (!value.options_data || !value.options_data.mono_eem))).length > 0,
has_dds: data.filter(((value, _) => value.name === "DDS" && value.name_number === "4410" && (!value.options_data || !value.options_data.mono_eem))).length > 0,
has_sampler: data.filter(((value, _) => value.name === "Sampler" && (!value.options_data || !value.options_data.mono_eem))).length > 0,
}
}

View File

@ -78,14 +78,15 @@ const shop_data = {
[
{type: "Line", args: {title: "IPv4", outvar: "ipv4", fallback: "192.168.1.75/24", tip: "Set up IPv4 address used by core device"}},
{type: "SwitchLine", args: {title: "IPv6", outvar: "ipv6"}},
{type: "SwitchLine", args: {title: "Ext CLK", outvar: "ext_clk", fallback: {text: "125 MHz", checked: false}, tip: "Use external clock reference: 10, 80 (beta), 100 or 125 MHz. Other variants may be provided if needed."}},
{"if": [
{"!": {"var": "ext_data.has_previous_carrier"}},
{type: "Switch", args: {title: "Opt out from promotional USB-stick", outvar: "usb_opt_out", tip: "Do not ship a promotional USB-stick"}}
]}
{type: "SwitchLine", args: {title: "Ext CLK", outvar: "ext_clk", fallback: {text: "125 MHz", checked: false}, tip: "Use external clock reference: 10, 80 (beta), 100 or 125 MHz. Other variants may be provided if needed."}}
],
[
{type: "Switch", args: {title: "Optic fiber", outvar: "optics", tip: "Use optic fiber instead of direct attach copper cable"}}
{type: "Switch", args: {title: "Optical fiber", outvar: "optics", tip: "Use optical fiber instead of direct attach copper cable"}},
{"if": [
{"var": "optics"},
{type: "Radio", args: {title: "Fiber cable length", outvar: "cable_len", variants: ["1 M", "3 M", "5 M"], tip: "The desired length of the optical fiber cable", fallback: 1}},
{type: "Radio", args: {title: "Copper cable length", outvar: "cable_len", variants: ["0.5 M", "1 M", "2 M"], tip: "The desired length of the direct attach copper cable", fallback: 0}},
]}
]
]
}
@ -165,14 +166,15 @@ const shop_data = {
[
{type: "Line", args: {title: "IPv4", outvar: "ipv4", fallback: "192.168.1.75/24", tip: "Set up IPv4 address used by core device"}},
{type: "SwitchLine", args: {title: "IPv6", outvar: "ipv6"}},
{type: "SwitchLine", args: {title: "Ext CLK", outvar: "ext_clk", fallback: {text: "125 MHz", checked: false}, tip: "Use external clock reference: 10, 80 (beta), 100 or 125 MHz. Other variants may be provided if needed."}},
{"if": [
{"!": {"var": "ext_data.has_previous_carrier"}},
{type: "Switch", args: {title: "Opt out from promotional USB-stick", outvar: "usb_opt_out", tip: "Do not ship a promotional USB-stick"}}
]}
{type: "SwitchLine", args: {title: "Ext CLK", outvar: "ext_clk", fallback: {text: "125 MHz", checked: false}, tip: "Use external clock reference: 10, 80 (beta), 100 or 125 MHz. Other variants may be provided if needed."}}
],
[
{type: "Switch", args: {title: "Optic fiber", outvar: "optics", tip: "Use optic fiber instead of direct attach copper cable"}}
{type: "Switch", args: {title: "Optical fiber", outvar: "optics", tip: "Use optical fiber instead of direct attach copper cable"}},
{"if": [
{"var": "optics"},
{type: "Radio", args: {title: "Fiber cable length", outvar: "cable_len", variants: ["1 M", "3 M", "5 M"], tip: "The desired length of the optical fiber cable", fallback: 1}},
{type: "Radio", args: {title: "Copper cable length", outvar: "cable_len", variants: ["0.5 M", "1 M", "2 M"], tip: "The desired length of the direct attach copper cable", fallback: 0}},
]}
]
]
}
@ -533,6 +535,65 @@ const shop_data = {
],
datasheet_file: '/docs/sinara-datasheets/2245.pdf',
datasheet_name: '2245 LVDS-TTL datasheet',
options: [
{type: "Switch", args: {title: "Configure first RJ45", fallback: false, outvar: "conf_first_rj45", tip: "Configure channels 0-3"}},
{
"if": [
{"var": "conf_first_rj45"},
{type: "Group", items: [
{type: "Switch", args: {title: "Output channel #0", fallback: true, outvar: "output_0", tip: "Set channel #0 to output"}},
{type: "Switch", args: {title: "Output channel #1", fallback: true, outvar: "output_1", tip: "Set channel #1 to output"}},
{type: "Switch", args: {title: "Output channel #2", fallback: true, outvar: "output_2", tip: "Set channel #2 to output"}},
{type: "Switch", args: {title: "Output channel #3", fallback: true, outvar: "output_3", tip: "Set channel #3 to output"}},
]}
]
},
{type: "Switch", args: {title: "Configure second RJ45", fallback: false, outvar: "conf_second_rj45", tip: "Configure channels 4-7"}},
{
"if": [
{"var": "conf_second_rj45"},
{type: "Group", items: [
{type: "Switch", args: {title: "Output channel #4", fallback: true, outvar: "output_4", tip: "Set channel #4 to output"}},
{type: "Switch", args: {title: "Output channel #5", fallback: true, outvar: "output_5", tip: "Set channel #5 to output"}},
{type: "Switch", args: {title: "Output channel #6", fallback: true, outvar: "output_6", tip: "Set channel #6 to output"}},
{type: "Switch", args: {title: "Output channel #7", fallback: true, outvar: "output_7", tip: "Set channel #7 to output"}},
]}
]
},
{type: "Switch", args: {title: "Configure third RJ45", fallback: false, outvar: "conf_third_rj45", tip: "Configure channels 8-11"}},
{
"if": [
{"var": "conf_third_rj45"},
{type: "Group", items: [
{type: "Switch", args: {title: "Output channel #8", fallback: true, outvar: "output_8", tip: "Set channel #8 to output"}},
{type: "Switch", args: {title: "Output channel #9", fallback: true, outvar: "output_9", tip: "Set channel #9 to output"}},
{type: "Switch", args: {title: "Output channel #10", fallback: true, outvar: "output_10", tip: "Set channel #10 to output"}},
{type: "Switch", args: {title: "Output channel #11", fallback: true, outvar: "output_11", tip: "Set channel #11 to output"}},
]}
]
},
{type: "Switch", args: {title: "Configure fourth RJ45", fallback: false, outvar: "conf_fourth_rj45", tip: "Configure channels 12-15"}},
{
"if": [
{"var": "conf_fourth_rj45"},
{type: "Group", items: [
{type: "Switch", args: {title: "Output channel #12", fallback: true, outvar: "output_12", tip: "Set channel #12 to output"}},
{type: "Switch", args: {title: "Output channel #13", fallback: true, outvar: "output_13", tip: "Set channel #13 to output"}},
{type: "Switch", args: {title: "Output channel #14", fallback: true, outvar: "output_14", tip: "Set channel #14 to output"}},
{type: "Switch", args: {title: "Output channel #15", fallback: true, outvar: "output_15", tip: "Set channel #15 to output"}},
]}
]
},
{
"if": [
{"!": {"and": [{"var": "output_0"}, {"var": "output_1"}, {"var": "output_2"},{"var": "output_3"},
{"var": "output_4"}, {"var": "output_5"}, {"var": "output_6"},{"var": "output_7"},
{"var": "output_8"}, {"var": "output_9"}, {"var": "output_10"},{"var": "output_11"},
{"var": "output_12"}, {"var": "output_13"}, {"var": "output_14"},{"var": "output_15"}]}},
{type: "Switch", args: {title: "Edge counter", outvar: "edge_counter", tip: "Enable edge counter for inputs"}}
]
}
],
size: 'small',
type: null,
hp: 4,
@ -560,22 +621,20 @@ const shop_data = {
specs: [
'4 channel 1GS/s DDS.',
'Output frequency (-3 dB): <1 to >400 MHz.',
'Frequency resolution ~0.25 Hz (32 bit)',
'Nominal max output power 10 dBm.',
'Digital step attenuator 0 to -31.5dB.',
'RF switch (1ns temporal resolution), 70dB isolation.',
'AD9910 or AD9912 chip.',
'By default, we use the AD9910 as it provides more features. If you need the higher frequency resolution of the AD9912, leave us a note.',
'AD9910 and AD9912 cards can be used at the same time in the same crate.',
'External 5W power amplifier is available separately, leave us a note if interested.'
],
datasheet_file: '/docs/sinara-datasheets/4410-4412.pdf',
datasheet_name: '4410/4412 Urukul datasheet',
options: [
{type: "Switch", args: {title: "AD9912", outvar: "ad9912", tip: "AD9912 chip instead of AD9910"}},
{type: "Switch", args: {title: "Use 1 EEM", outvar: "mono_eem", tip: "Use one EEM port setup. RF switch and synchronization will be unavailable."}},
{
"if": [
{"or": [{"var": "ad9912"}, {"var": "mono_eem"}]},
{"var": "mono_eem"},
[
{type: "SwitchLine", args: {title: "Ext CLK", outvar: "ext_clk", fallback: {text: "125 MHz", checked: false}}},
],
@ -618,6 +677,47 @@ const shop_data = {
},
},
},
'urukul_4412': {
id: 'urukul_4412',
name: 'DDS',
name_number: '4412',
name_codename: 'Urukul',
price: 2350,
image: '/shop/graphic-03_Urukul-4412.svg',
specs: [
'4 channel 1GS/s DDS.',
'Higher frequency resolution ~8 µHz (47 bit)',
'Output frequency (-3 dB): <1 to >400 MHz.',
'Nominal max output power 10 dBm.',
'Digital step attenuator 0 to -31.5dB.',
'RF switch (1ns temporal resolution), 70dB isolation.',
'AD9912 chip.',
'AD9910 and AD9912 cards can be used at the same time in the same crate.',
'External 5W power amplifier is available separately, leave us a note if interested.'
],
datasheet_file: '/docs/sinara-datasheets/4410-4412.pdf',
datasheet_name: '4410/4412 Urukul datasheet',
options: [
{type: "Switch", args: {title: "Use 1 EEM", outvar: "mono_eem", tip: "Use one EEM port setup. RF switch and synchronization will be unavailable."}},
{type: "SwitchLine", args: {title: "Ext CLK", outvar: "ext_clk", fallback: {text: "125 MHz", checked: false}}}
],
size: 'small',
type: 'urukul',
hp: 4,
nbrSlotMin: 0,
nbrSlotMax: 0,
nbrClockMax: 0,
slotOccupied: 2,
clockOccupied: 1,
rules: {
resources: {
type: 'urukul',
icon: '/shop/icon-warning.svg',
name: 'Urukul',
message: 'This card needs a card that provides EEM and clocking connectors (e.g. Kasli) at its left.',
},
},
},
'phaser': {
id: 'phaser',
name: 'AWG',
@ -852,7 +952,7 @@ const shop_data = {
type: 'hd68',
hp: 4,
options: [
{type: "Radio", args: {title: "Cable length", outvar: "hd68_cable_len", variants: ["1 M", "2 M", "3 M"], tip: "The desired length of the HD68 cable", fallback: 1}},
{type: "Radio", args: {title: "Cable length", outvar: "cable_len", variants: ["1 M", "2 M", "3 M"], tip: "The desired length of the HD68 cable", fallback: 1}},
],
options_class: "hd68-idc",
nbrSlotMin: 1,
@ -1032,6 +1132,7 @@ const shop_data = {
'Can be controlled by Kasli or work stand-alone with PoE supply.'
],
options: [
{type: "SwitchLine", args: {title: "IP", outvar: "ip", fallback: {text: "DHCP", checked: false}, tip: "Set up IP address used by the device"}},
{type: "Switch", args: {title: "Ext power", outvar: "ext_pwr", "tip": "Use external power supply in order to reduce number of used EEM connectors"}},
{type: "Switch", args: {title: "Term #0", outvar: "term_0", tip: "Enable termination on ADC channel #0"}},
{type: "Switch", args: {title: "Term #1", outvar: "term_1", tip: "Enable termination on ADC channel #1"}}
@ -1185,6 +1286,7 @@ const shop_data = {
'AD9959 DDS (500MSPS, 10-bit).'
],
options: [
{type: "SwitchLine", args: {title: "IP", outvar: "ip", fallback: {text: "DHCP", checked: false}, tip: "Set up IP address used by the device"}},
{type: "Switch", args: {title: "Ext power", outvar: "ext_pwr", "tip": "Use external power supply in order to reduce number of used EEM connectors"}},
{type: "SwitchLine", args: {title: "Ext CLK", outvar: "ext_clk", fallback: {text: "125 MHz", checked: false}}},
{type: "Switch", args: {title: "Termination #0", outvar: "term_0", tip: "Enable termination on ADC channel #0"}},
@ -1252,6 +1354,7 @@ const shop_data = {
itemIds: [
'clocker',
'urukul',
'urukul_4412',
'phaser',
'mirny',
'almazny',

View File

@ -16,8 +16,19 @@
<div class="col">
<div class="card shadow h-100" >
<div class="card-body">
<strong class="card-title">{{ publication.title }}</strong>
<p class="card-text">{{ publication.authors }}</p>
<strong class="card-title">{{ publication.title | safe }}</strong>
{% if publication.authors.short or publication.authors.full %}
<p class="card-text">
{{ publication.authors.short | safe }}
<span class="collapse" id="viewdetails{{ publication.title | slugify | truncate(length=20, end="")}}">
{{ publication.authors.full }}
</span>
<a data-bs-toggle="collapse" class="hide-expanded" data-bs-target="#viewdetails{{ publication.title | slugify | truncate(length=20, end="") }}"> ...more</a>
<a data-bs-toggle="collapse" class="show-expanded" data-bs-target="#viewdetails{{ publication.title | slugify | truncate(length=20, end="") }}"><br>less</a>
</p>
{% else %}
<p class="card-text">{{ publication.authors }}</p>
{% endif %}
</div>
<div class="card-footer border-light-subtle">
{% for link in publication.links %}

View File

@ -0,0 +1,66 @@
{% if position == "left" %}
<div class="card mb-3 shadow" style="max-width: 80%;margin-right: 20%;">
<div class="row g-0">
<div class="col-md-4 funding-logo-start d-flex p-1 justify-content-center">
{% if logo %}
{% if logo_link %}<a href="{{ logo_link }}" class="align-self-center">{% endif %}
<img src="{{ logo }}" class="img-fluid rounded" alt="{{ logo_alt }}"/>
{% if logo_link %}</a>{% endif %}
{% endif %}
</div>
<div class="col-md-8">
<div class="card-body">
{% if title %}<h5 class="card-title">{{ title | markdown | safe }}</h5>{% endif %}
{% if icon %}
<span class="badge bg-transparent position-absolute top-0 start-100 translate-middle-x">
<img src="{{ icon }}" alt="{{ icon }}" class="rounded"
style="height: 2rem;"/>
</span>
{% endif %}
<p class="card-text">{{ body | markdown | safe }}</p>
</div>
</div>
</div>
</div>
{% elif position == "right" %}
<div class="card mb-3 shadow" style="max-width: 80%;margin-left: 20%;">
<div class="row g-0">
<div class="col-md-8">
<div class="card-body">
{% if title %}<h5 class="card-title text-end">{{ title | markdown | safe }}</h5>{% endif %}
{% if icon %}
<span class="badge bg-transparent position-absolute top-0 start-0 translate-middle-x">
<img src="{{ icon }}" alt="{{ icon }}" class="rounded"
style="height: 2rem;"/>
</span>
{% endif %}
<p class="card-text">{{ body | markdown | safe }}</p>
</div>
</div>
<div class="col-md-4 funding-logo-end d-flex p-1 justify-content-center">
{% if logo %}
{% if logo_link %}<a href="{{ logo_link }}" class="align-self-center">{% endif %}
<img src="{{ logo }}" class="img-fluid rounded" alt="{{ logo_alt }}"/>
{% if logo_link %}</a>{% endif %}
{% endif %}
</div>
</div>
</div>
{% else %}
<div class="card mb-3 shadow-sm" style="max-width: 100%;">
<div class="row g-0">
<div class="col-md-12">
<div class="card-body">
{% if title %}<h4 class="card-title text-center">{{ title | markdown | safe }}</h4>{% endif %}
<p class="card-text">{{ body | markdown | safe }}</p>
</div>
</div>
</div>
</div>
{% endif %}