formatting

This commit is contained in:
Sebastien Bourdeauducq 2021-03-23 18:16:39 +08:00
parent 4fd5276638
commit 0d6ab4ee96

View File

@ -392,12 +392,12 @@ const shop_data = {
price: 4260, price: 4260,
image: '/shop/graphic-03_Phaser.svg', image: '/shop/graphic-03_Phaser.svg',
specs: [ specs: [
'2x 1.25 GS/s IQ upconverters', '2x 1.25 GS/s IQ upconverters.',
'dual IQ mixer + 0.3 GHz to 4.8 GHz VCO + PLL', 'dual IQ mixer + 0.3 GHz to 4.8 GHz VCO + PLL.',
'31.5 dB range digital step attenuator (similar to Urukul)', '31.5 dB range digital step attenuator (similar to Urukul).',
'2 channels of 5 MS/s ADC (similar to Sampler)', '2 channels of 5 MS/s ADC (similar to Sampler).',
'Artix-7 FPGA', 'Artix-7 FPGA.',
'Internal MMCX clock from Kasli/Clocker and external SMA', 'Internal MMCX clock from Kasli/Clocker and external SMA.',
'The upconverter is optional, if you would like the baseband version please leave us a note.' 'The upconverter is optional, if you would like the baseband version please leave us a note.'
], ],
size: 'small', size: 'small',