How to design logic synthesis and place-and-route tools

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While many researchers and engineers agree that several obstacles stem from the proprietary tools of the FPGA vendors, writing an alternative from scratch has always been perceived to be far too complex of a task. This perception comes largely from the lack of generic knowledge about the internals of a synthesis and place-and-route tool and the absence of published details regarding particular FPGA architectures and bitstream formats. In order to encourage the development of alternative tools, we will attempt to shed some light on these concepts and give hints about how the Xilinx Spartan-6 architecture and bitstream format work and how they could be fully understood.

Part of the OHWR workshop held in Grenoble on October 9th, 2011.

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