register: add vexriscv-specific registers

Vexriscv in its normal configuration has its own registers for things
such as machine interrupts and system interrupts.  Add wrappers for
these registers.

Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
Sean Cross 2020-01-08 17:22:16 +08:00
parent 8bc0b06f95
commit fd54453416
6 changed files with 27 additions and 0 deletions

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@ -107,3 +107,10 @@ pub use self::mhpmeventx::*;
// TODO: Debug Mode Registers // TODO: Debug Mode Registers
// Vexriscv Registers
pub mod vdci;
pub mod vmim;
pub mod vmip;
pub mod vsim;
pub mod vsip;

4
src/register/vdci.rs Normal file
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@ -0,0 +1,4 @@
//! uscratch register
read_csr_as_usize!(0xCC0, __read_vdci);
write_csr_as_usize!(0xCC0, __write_vdci);

4
src/register/vmim.rs Normal file
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@ -0,0 +1,4 @@
//! uscratch register
read_csr_as_usize!(0xBC0, __read_vmim);
write_csr_as_usize!(0xBC0, __write_vmim);

4
src/register/vmip.rs Normal file
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@ -0,0 +1,4 @@
//! uscratch register
read_csr_as_usize!(0xFC0, __read_vmip);
write_csr_as_usize!(0xFC0, __write_vmip);

4
src/register/vsim.rs Normal file
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@ -0,0 +1,4 @@
//! uscratch register
read_csr_as_usize!(0x9C0, __read_vsim);
write_csr_as_usize!(0x9C0, __write_vsim);

4
src/register/vsip.rs Normal file
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@ -0,0 +1,4 @@
//! uscratch register
read_csr_as_usize!(0xDC0, __read_vsip);
write_csr_as_usize!(0xDC0, __write_vsip);