From 8d6b2fe111c85116db0e87ab0c48999006edf357 Mon Sep 17 00:00:00 2001 From: Vadim Kaushan Date: Wed, 6 Feb 2019 22:17:30 +0300 Subject: [PATCH 1/2] Add team e-mail to authors --- Cargo.toml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Cargo.toml b/Cargo.toml index 818a655..88cd9a1 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -2,7 +2,10 @@ name = "riscv" version = "0.4.0" repository = "https://github.com/rust-embedded/riscv" -authors = ["David Craven "] +authors = [ + "The RISC-V Team ", + "David Craven ", +] categories = ["embedded", "hardware-support", "no-std"] description = "Low level access to RISC-V processors" keywords = ["riscv", "register", "peripheral"] From e2ed39decd37f92683e9f5f9080ae45b10973f25 Mon Sep 17 00:00:00 2001 From: Vadim Kaushan Date: Thu, 7 Feb 2019 19:53:22 +0300 Subject: [PATCH 2/2] Leave just team e-mail in authors --- Cargo.toml | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 88cd9a1..3b19516 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -2,10 +2,7 @@ name = "riscv" version = "0.4.0" repository = "https://github.com/rust-embedded/riscv" -authors = [ - "The RISC-V Team ", - "David Craven ", -] +authors = ["The RISC-V Team "] categories = ["embedded", "hardware-support", "no-std"] description = "Low level access to RISC-V processors" keywords = ["riscv", "register", "peripheral"]