M-Labs/vexriscv-rust
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asm: use llvm_asm! macro()

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This has been adjusted as part of the drive to stabilize the asm!()
macro.

Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
Sean Cross 2020-08-04 17:18:10 +08:00
parent ba269ff348
commit c5fbc0cc82
2 changed files with 7 additions and 7 deletions
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2
Cargo.toml
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@ -1,6 +1,6 @@
[package] [package]
name = "vexriscv" name = "vexriscv"
version = "0.0.2" version = "0.0.3"
repository = "https://github.com/xobs/vexriscv-rust" repository = "https://github.com/xobs/vexriscv-rust"
authors = ["Sean Cross <sean@xobs.io>", "The RISC-V Team <risc-v@teams.rust-embedded.org>"] authors = ["Sean Cross <sean@xobs.io>", "The RISC-V Team <risc-v@teams.rust-embedded.org>"]
categories = ["embedded", "hardware-support", "no-std"] categories = ["embedded", "hardware-support", "no-std"]

12
src/register/macros.rs
View File

@ -9,7 +9,7 @@ macro_rules! read_csr {
#[cfg(all(riscv, feature = "inline-asm"))] #[cfg(all(riscv, feature = "inline-asm"))]
() => { () => {
let r: usize; let r: usize;
asm!("csrrs $0, $1, x0" : "=r"(r) : "i"($csr_number) :: "volatile"); llvm_asm!("csrrs $0, $1, x0" : "=r"(r) : "i"($csr_number) :: "volatile");
r r
} }
@ -38,7 +38,7 @@ macro_rules! read_csr_rv32 {
#[cfg(all(riscv32, feature = "inline-asm"))] #[cfg(all(riscv32, feature = "inline-asm"))]
() => { () => {
let r: usize; let r: usize;
asm!("csrrs $0, $1, x0" : "=r"(r) : "i"($csr_number) :: "volatile"); llvm_asm!("csrrs $0, $1, x0" : "=r"(r) : "i"($csr_number) :: "volatile");
r r
} }
@ -102,7 +102,7 @@ macro_rules! write_csr {
unsafe fn _write(bits: usize) { unsafe fn _write(bits: usize) {
match () { match () {
#[cfg(all(riscv, feature = "inline-asm"))] #[cfg(all(riscv, feature = "inline-asm"))]
() => asm!("csrrw x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"), () => llvm_asm!("csrrw x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"),
#[cfg(all(riscv, not(feature = "inline-asm")))] #[cfg(all(riscv, not(feature = "inline-asm")))]
() => { () => {
@ -128,7 +128,7 @@ macro_rules! write_csr_rv32 {
unsafe fn _write(bits: usize) { unsafe fn _write(bits: usize) {
match () { match () {
#[cfg(all(riscv32, feature = "inline-asm"))] #[cfg(all(riscv32, feature = "inline-asm"))]
() => asm!("csrrw x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"), () => llvm_asm!("csrrw x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"),
#[cfg(all(riscv32, not(feature = "inline-asm")))] #[cfg(all(riscv32, not(feature = "inline-asm")))]
() => { () => {
@ -178,7 +178,7 @@ macro_rules! set {
unsafe fn _set(bits: usize) { unsafe fn _set(bits: usize) {
match () { match () {
#[cfg(all(riscv, feature = "inline-asm"))] #[cfg(all(riscv, feature = "inline-asm"))]
() => asm!("csrrs x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"), () => llvm_asm!("csrrs x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"),
#[cfg(all(riscv, not(feature = "inline-asm")))] #[cfg(all(riscv, not(feature = "inline-asm")))]
() => { () => {
@ -204,7 +204,7 @@ macro_rules! clear {
unsafe fn _clear(bits: usize) { unsafe fn _clear(bits: usize) {
match () { match () {
#[cfg(all(riscv, feature = "inline-asm"))] #[cfg(all(riscv, feature = "inline-asm"))]
() => asm!("csrrc x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"), () => llvm_asm!("csrrc x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"),
#[cfg(all(riscv, not(feature = "inline-asm")))] #[cfg(all(riscv, not(feature = "inline-asm")))]
() => { () => {