Remove asm and interrupt modules
This commit is contained in:
Vadim Kaushan
parent
9bf5caafc2
commit
b4546d1827
24
asm.S
24
asm.S
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@ -40,31 +40,7 @@ __clear_ ## name: \
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#define RW32(offset, name)
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#define RO32(offset, name)
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#endif
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// ----------------------- //
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.section .text.__ebreak
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.global __ebreak
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__ebreak:
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ebreak
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ret
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.section .text.__wfi
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.global __wfi
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__wfi:
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wfi
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ret
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.section .text.__sfence_vma_all
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.global __sfence_vma_all
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__sfence_vma_all:
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sfence.vma
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ret
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.section .text.__sfence_vma
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.global __sfence_vma
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__sfence_vma:
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sfence.vma a0, a1
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ret
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// User Trap Setup
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RW(0x000, ustatus) // User status register
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77
src/asm.rs
77
src/asm.rs
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@ -1,77 +0,0 @@
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//! Assembly instructions
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macro_rules! instruction {
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($(#[$attr:meta])*, $fnname:ident, $asm:expr, $asm_fn:ident) => (
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$(#[$attr])*
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#[inline]
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pub unsafe fn $fnname() {
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match () {
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#[cfg(all(riscv, feature = "inline-asm"))]
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() => asm!($asm :::: "volatile"),
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#[cfg(all(riscv, not(feature = "inline-asm")))]
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() => {
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extern "C" {
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fn $asm_fn();
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}
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$asm_fn();
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}
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#[cfg(not(riscv))]
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() => unimplemented!(),
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}
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}
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)
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}
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instruction!(
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/// `EBREAK` instruction wrapper
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///
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/// Generates a breakpoint exception.
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, ebreak, "ebreak", __ebreak);
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instruction!(
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/// `WFI` instruction wrapper
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///
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/// Provides a hint to the implementation that the current hart can be stalled until an interrupt might need servicing.
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/// The WFI instruction is just a hint, and a legal implementation is to implement WFI as a NOP.
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, wfi, "wfi", __wfi);
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instruction!(
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/// `SFENCE.VMA` instruction wrapper (all address spaces and page table levels)
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///
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/// Synchronizes updates to in-memory memory-management data structures with current execution.
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/// Instruction execution causes implicit reads and writes to these data structures; however, these implicit references
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/// are ordinarily not ordered with respect to loads and stores in the instruction stream.
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/// Executing an `SFENCE.VMA` instruction guarantees that any stores in the instruction stream prior to the
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/// `SFENCE.VMA` are ordered before all implicit references subsequent to the `SFENCE.VMA`.
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, sfence_vma_all, "sfence.vma", __sfence_vma_all);
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/// `SFENCE.VMA` instruction wrapper
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///
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/// Synchronizes updates to in-memory memory-management data structures with current execution.
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/// Instruction execution causes implicit reads and writes to these data structures; however, these implicit references
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/// are ordinarily not ordered with respect to loads and stores in the instruction stream.
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/// Executing an `SFENCE.VMA` instruction guarantees that any stores in the instruction stream prior to the
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/// `SFENCE.VMA` are ordered before all implicit references subsequent to the `SFENCE.VMA`.
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#[inline]
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#[allow(unused_variables)]
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pub unsafe fn sfence_vma(asid: usize, addr: usize) {
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match () {
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#[cfg(all(riscv, feature = "inline-asm"))]
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() => asm!("sfence.vma $0, $1" :: "r"(asid), "r"(addr) :: "volatile"),
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#[cfg(all(riscv, not(feature = "inline-asm")))]
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() => {
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extern "C" {
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fn __sfence_vma(asid: usize, addr: usize);
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}
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__sfence_vma(asid, addr);
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}
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#[cfg(not(riscv))]
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() => unimplemented!(),
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}
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}
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@ -1,54 +0,0 @@
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//! Interrupts
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// NOTE: Adapted from cortex-m/src/interrupt.rs
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pub use bare_metal::{CriticalSection, Mutex, Nr};
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use register::mstatus;
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/// Disables all interrupts
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#[inline]
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pub unsafe fn disable() {
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match () {
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#[cfg(riscv)]
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() => mstatus::clear_mie(),
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#[cfg(not(riscv))]
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() => unimplemented!(),
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}
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}
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/// Enables all the interrupts
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///
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/// # Safety
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///
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/// - Do not call this function inside an `interrupt::free` critical section
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#[inline]
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pub unsafe fn enable() {
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match () {
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#[cfg(riscv)]
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() => mstatus::set_mie(),
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#[cfg(not(riscv))]
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() => unimplemented!(),
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}
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}
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/// Execute closure `f` in an interrupt-free context.
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///
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/// This as also known as a "critical section".
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pub fn free<F, R>(f: F) -> R
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where
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F: FnOnce(&CriticalSection) -> R,
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{
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let mstatus = mstatus::read();
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// disable interrupts
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unsafe { disable(); }
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let r = f(unsafe { &CriticalSection::new() });
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// If the interrupts were active before our `disable` call, then re-enable
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// them. Otherwise, keep them disabled
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if mstatus.mie() {
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unsafe { enable(); }
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}
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r
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}
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@ -21,6 +21,4 @@
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extern crate bare_metal;
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extern crate bit_field;
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pub mod asm;
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pub mod interrupt;
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pub mod register;
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