diff --git a/src/register/vdci.rs b/src/register/vdci.rs
index 60141bc..4c2c839 100644
--- a/src/register/vdci.rs
+++ b/src/register/vdci.rs
@@ -1,4 +1,4 @@
-//! uscratch register
+//! DCache Information register
 
 read_csr_as_usize!(0xCC0, __read_vdci);
 write_csr_as_usize!(0xCC0, __write_vdci);
diff --git a/src/register/vmim.rs b/src/register/vmim.rs
index eb231c0..a4b03e7 100644
--- a/src/register/vmim.rs
+++ b/src/register/vmim.rs
@@ -1,4 +1,4 @@
-//! uscratch register
+//! Machine IRQ Mask register
 
 read_csr_as_usize!(0xBC0, __read_vmim);
 write_csr_as_usize!(0xBC0, __write_vmim);
diff --git a/src/register/vmip.rs b/src/register/vmip.rs
index d975f54..958e768 100644
--- a/src/register/vmip.rs
+++ b/src/register/vmip.rs
@@ -1,4 +1,4 @@
-//! uscratch register
+//! Machine IRQ Pending register
 
 read_csr_as_usize!(0xFC0, __read_vmip);
 write_csr_as_usize!(0xFC0, __write_vmip);
diff --git a/src/register/vsim.rs b/src/register/vsim.rs
index 47eb5d6..7ed1d50 100644
--- a/src/register/vsim.rs
+++ b/src/register/vsim.rs
@@ -1,4 +1,4 @@
-//! uscratch register
+//! Supervisor IRQ Mask register
 
 read_csr_as_usize!(0x9C0, __read_vsim);
 write_csr_as_usize!(0x9C0, __write_vsim);
diff --git a/src/register/vsip.rs b/src/register/vsip.rs
index 0a97c8d..0c7b32c 100644
--- a/src/register/vsip.rs
+++ b/src/register/vsip.rs
@@ -1,4 +1,4 @@
-//! uscratch register
+//! Supervisor IRQ Pending register
 
 read_csr_as_usize!(0xDC0, __read_vsip);
 write_csr_as_usize!(0xDC0, __write_vsip);