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vexriscv-rust
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cargo: bump version to 0.0.2 

This version adds vexriscv-specific registers.

Signed-off-by: Sean Cross <sean@xobs.io>
This commit is contained in:
Sean Cross 2020-01-08 17:23:05 +08:00
parent fd54453416
commit 5846f57ab1
1 changed files with 1 additions and 1 deletions
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2
Cargo.toml
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@ -1,6 +1,6 @@
[package] [package]
name = "vexriscv" name = "vexriscv"
version = "0.0.1" version = "0.0.2"
repository = "https://github.com/xobs/vexriscv-rust" repository = "https://github.com/xobs/vexriscv-rust"
authors = ["Sean Cross <sean@xobs.io>", "The RISC-V Team <risc-v@teams.rust-embedded.org>"] authors = ["Sean Cross <sean@xobs.io>", "The RISC-V Team <risc-v@teams.rust-embedded.org>"]
categories = ["embedded", "hardware-support", "no-std"] categories = ["embedded", "hardware-support", "no-std"]